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1. 发明申请

US20150188037A1 MAGNETORESISTIVE RANDOM ACCESS MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME 审中-公开
标题翻译：磁性随机访问存储器件及其制造方法
公开(公告)号：US20150188037A1
公开(公告)日：2015-07-02
申请号：US14453110
申请日：2014-08-06
申请人： Kyung-Tae NAM , Kil-Ho LEE
发明人： Kyung-Tae NAM , Kil-Ho LEE
IPC分类号： H01L43/12 , H01L43/08 , H01L27/22 , H01L43/02
CPC分类号： H01L43/02 , G11C11/161 , H01L27/228 , H01L43/08 , H01L43/10 , H01L43/12
摘要： In a method of manufacturing an MRAM device, a lower electrode, a first pinning layer pattern, a tunnel barrier layer pattern and a free layer pattern sequentially stacked on a substrate may be formed. A first insulating interlayer may be formed on the substrate to cover the lower electrode, the first pinning layer pattern, the tunnel barrier layer pattern and the free layer pattern. The first insulating interlayer may be etched to form a recess exposing a top surface of the free layer pattern. A second pinning layer pattern may be formed to fill at least a portion of the recess. A wiring may be formed on the second pinning layer pattern.
摘要翻译：在制造MRAM器件的方法中，可以形成顺序堆叠在衬底上的下电极，第一钉扎层图案，隧道势垒层图案和自由层图案。可以在基板上形成第一绝缘中间层以覆盖下电极，第一钉扎层图案，隧道势垒层图案和自由层图案。可以蚀刻第一绝缘中间层以形成露出自由层图案的顶表面的凹部。可以形成第二钉扎层图案以填充凹部的至少一部分。可以在第二钉扎层图案上形成布线。

2. 发明授权

US08952434B2 Magnetic patterns and methods of forming magnetic patterns 有权
标题翻译：磁性图案和形成磁图案的方法
公开(公告)号：US08952434B2
公开(公告)日：2015-02-10
申请号：US13490681
申请日：2012-06-07
申请人： Kyung-Tae Nam
发明人： Kyung-Tae Nam
IPC分类号： H01L21/00 , G11B5/33 , H01L43/12 , H01L27/22
CPC分类号： H01L43/12 , G11C11/161 , H01L27/228
摘要： In a method of forming a magnetic pattern, a lower electrode layer is formed on a substrate. An insulating interlayer is formed on the lower electrode layer. The insulating interlayer is partially removed to form an opening. A first pinned layer pattern filling the opening is formed. A second pinned layer, a tunnel barrier layer, a free layer and an upper electrode layer are formed on the insulating interlayer and the first pinned layer pattern. The upper electrode layer, the free layer, the tunnel barrier layer and the second pinned layer are patterned to form a second pinned layer pattern, a tunnel barrier pattern, a free layer pattern and an upper electrode. The second pinned layer pattern covers an upper surface of the first pinned layer pattern.
摘要翻译：在形成磁图案的方法中，在基板上形成下电极层。在下电极层上形成绝缘中间层。部分去除绝缘中间层以形成开口。形成填充开口的第一固定层图案。在绝缘中间层和第一被钉扎层图案上形成第二被钉扎层，隧道势垒层，自由层和上部电极层。图案化上电极层，自由层，隧道势垒层和第二被钉扎层，以形成第二固定层图案，隧道势垒图案，自由层图案和上电极。第二钉扎层图案覆盖第一钉扎层图案的上表面。

3. 发明授权

US08892253B2 Swarm robot and sweeping method using swarm robot 有权
标题翻译：使用群体机器人的群体机器人和扫掠方法
公开(公告)号：US08892253B2
公开(公告)日：2014-11-18
申请号：US13222636
申请日：2011-08-31
申请人： Jeong-Seop Park , Sang-Hoon Ji , Sang-Moo Lee , Woong-Hee Shon , Kyung-Tae Nam
发明人： Jeong-Seop Park , Sang-Hoon Ji , Sang-Moo Lee , Woong-Hee Shon , Kyung-Tae Nam
IPC分类号： B25J13/00 , B25J9/16 , B25J5/00 , G05D1/02
CPC分类号： B25J9/1617 , B25J5/007 , G05D1/0246 , G05D1/0274 , G05D1/0278 , G05D1/0291 , G05D2201/0203 , Y10S901/01
摘要： A swarm robot and a sweeping method using the swarm robot are provided. The swarm robot removes a plurality of objects in a given sweeping area, and at least two swarm robots collaborate to remove the individual object. The swarm robot searches the sweeping area, detects environment information of the sweeping area, locates the swarm robot in the sweeping area, generates a local map and an object map using the environment information and the acquired position, moves to the object according to the local map and the object map, and removes the object.
摘要翻译：提供了使用群组机器人的群体机器人和扫描方法。群组机器人在给定的清扫区域中移除多个物体，并且至少两个群组机器人协作去除单独的物体。群扫描机器人搜索扫描区域，检测扫描区域的环境信息，将扫描区域中的群体机器人定位到扫描区域，使用环境信息和获取位置生成局部地图和对象图，并根据本地映射和对象映射，并删除对象。

4. 发明授权

US08575753B2 Semiconductor device having a conductive structure including oxide and non oxide portions 有权
标题翻译：具有包括氧化物和非氧化物部分的导电结构的半导体器件
公开(公告)号：US08575753B2
公开(公告)日：2013-11-05
申请号：US12787056
申请日：2010-05-25
申请人： Suk-hun Choi , Ki-ho Bae , Yi-koan Hong , Kyung-hyun Kim , Tae-hyun Kim , Kyung-tae Nam , Jun-ho Jeong
发明人： Suk-hun Choi , Ki-ho Bae , Yi-koan Hong , Kyung-hyun Kim , Tae-hyun Kim , Kyung-tae Nam , Jun-ho Jeong
IPC分类号： H01L29/40
CPC分类号： H01L27/228 , H01L21/76831 , H01L21/76834 , H01L21/76856 , H01L21/76888 , H01L23/5228 , H01L27/1021 , H01L27/2409 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/126 , H01L45/144 , H01L45/1666 , H01L45/1683 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes an interlayer insulating layer disposed on a substrate, the interlayer insulating layer comprising an opening exposing the substrate, a barrier layer pattern disposed within the opening, and a conductive pattern disposed on the barrier layer pattern, the conductive pattern having an oxidized portion extending out of the opening and a non-oxidized portion within the opening, wherein a width of the conductive pattern is determined by a thickness of the barrier layer pattern.
摘要翻译：半导体器件包括设置在衬底上的层间绝缘层，所述层间绝缘层包括露出衬底的开口，设置在所述开口内的阻挡层图案以及设置在所述阻挡层图案上的导电图案，所述导电图案具有氧化从开口延伸的部分和开口内的非氧化部分，其中导电图案的宽度由阻挡层图案的厚度确定。

5. 发明申请

US20110310657A1 RESISTIVE MEMORY DEVICES INCLUDING SELECTED REFERENCE MEMORY CELLS OPERATING RESPONSIVE TO READ OPERATIONS 有权
标题翻译：包括选择的参考存储器电容的电阻存储器件操作响应于读操作
公开(公告)号：US20110310657A1
公开(公告)日：2011-12-22
申请号：US13219582
申请日：2011-08-26
申请人： Hyun-Jo Kim , Kyung-Tae Nam , In-Gyu Baek , Se-Chung Oh , Jang-Eun Lee , Jun-Ho Jeong
发明人： Hyun-Jo Kim , Kyung-Tae Nam , In-Gyu Baek , Se-Chung Oh , Jang-Eun Lee , Jun-Ho Jeong
IPC分类号： G11C11/00
CPC分类号： G11C7/062 , G11C7/067 , G11C7/14 , G11C11/5664 , G11C11/5678 , G11C11/5685 , G11C13/0004 , G11C13/0007 , G11C13/0014 , G11C13/0016 , G11C13/004 , G11C2013/0054 , G11C2213/32 , G11C2213/79
摘要： A Resistance based Random Access Memory (ReRAM) can include a sense amplifier circuit that includes a first input coupled to a bit line of a reference cell in a first block of the ReRAM responsive to a read operation to a second block.
摘要翻译：基于电阻的随机存取存储器（ReRAM）可以包括读出放大器电路，其响应于对第二块的读取操作，包括耦合到ReRAM的第一块中的参考单元的位线的第一输入。

6. 发明授权

US08035145B2 Magnetic memory device 有权
标题翻译：磁存储器件
公开(公告)号：US08035145B2
公开(公告)日：2011-10-11
申请号：US12773451
申请日：2010-05-04
申请人： Jun-Soo Bae , Jang-Eun Lee , Hyun-Jo Kim , Se-Chung Oh , Kyung-Tae Nam
发明人： Jun-Soo Bae , Jang-Eun Lee , Hyun-Jo Kim , Se-Chung Oh , Kyung-Tae Nam
IPC分类号： H01L21/02
CPC分类号： G11C11/15 , B82Y25/00 , B82Y40/00 , H01F10/3254 , H01F10/3272 , H01F10/3281 , H01F41/302 , H01L43/08
摘要： A magnetic memory device is provided. The magnetic memory device includes an invariable pinning pattern and a variable pinning pattern on a substrate. A tunnel barrier pattern is interposed between the invariable pinning pattern and the variable pinning pattern, and the pinned pattern is interposed between the invariable pinning pattern and the tunnel barrier pattern. A storage free pattern is interposed between the tunnel barrier pattern and the variable pinning pattern, and a guide free pattern is interposed between the storage free pattern and the variable pinning pattern. A free reversing pattern is interposed between the storage and guide free patterns. The free reversing pattern reverses a magnetization direction of the storage free pattern and a magnetization direction of the guide free pattern in the opposite directions.
摘要翻译：提供磁存储器件。磁存储器件在衬底上包括不变的钉扎图案和可变的钉扎图案。在不变的钉扎图案和可变钉扎图案之间插入隧道势垒图案，并且钉扎图案介于不变钉扎图案和隧道屏障图案之间。在隧道势垒图案和可变钉扎图案之间插入无存储图案，并且在存储空闲图案和可变钉扎图案之间插入无引导图案。在存储和无引导模式之间插入一个自由的反转模式。自由反转图案反转无存储图案的磁化方向和反向自由图案的磁化方向。

7. 发明授权

US08023311B2 Resistive memory devices including selected reference memory cells operating responsive to read operations 有权
标题翻译：电阻式存储器件包括响应于读取操作而工作的选择的参考存储器单元
公开(公告)号：US08023311B2
公开(公告)日：2011-09-20
申请号：US12358936
申请日：2009-01-23
申请人： Hyun-Jo Kim , Kyung-Tae Nam , In-Gyu Baek , Se-Chung Oh , Jang-Eun Lee , Jun-Ho Jeong
发明人： Hyun-Jo Kim , Kyung-Tae Nam , In-Gyu Baek , Se-Chung Oh , Jang-Eun Lee , Jun-Ho Jeong
IPC分类号： G11C11/00
CPC分类号： G11C7/062 , G11C7/067 , G11C7/14 , G11C11/5664 , G11C11/5678 , G11C11/5685 , G11C13/0004 , G11C13/0007 , G11C13/0014 , G11C13/0016 , G11C13/004 , G11C2013/0054 , G11C2213/32 , G11C2213/79
摘要： A Resistance based Random Access Memory (ReRAM) can include a sense amplifier circuit that includes a first input coupled to a bit line of a reference cell in a first block of the ReRAM responsive to a read operation to a second block.
摘要翻译：基于电阻的随机存取存储器（ReRAM）可以包括读出放大器电路，其响应于对第二块的读取操作，包括耦合到ReRAM的第一块中的参考单元的位线的第一输入。

8. 发明授权

US07952914B2 Memory devices including multi-bit memory cells having magnetic and resistive memory elements and related methods 失效
标题翻译：存储器件包括具有磁性和电阻存储元件的多位存储单元和相关方法
公开(公告)号：US07952914B2
公开(公告)日：2011-05-31
申请号：US11804327
申请日：2007-05-17
申请人： In-Gyu Baek , Jang-Eun Lee , Se-Chung Oh , Kyung-Tae Nam , Jun-Ho Jeong
发明人： In-Gyu Baek , Jang-Eun Lee , Se-Chung Oh , Kyung-Tae Nam , Jun-Ho Jeong
IPC分类号： G11C11/00
CPC分类号： G11C11/15 , G11C11/005 , G11C11/161 , G11C11/1659 , G11C11/1675 , G11C11/5607 , G11C11/5678 , G11C13/00 , G11C13/0004 , G11C13/02 , H01L27/224 , H01L27/228 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/14 , H01L45/146 , H01L45/147 , Y10S977/754 , Y10S977/935
摘要： An integrated circuit memory device may include an integrated circuit substrate, and a multi-bit memory cell on the integrated circuit substrate. The multi-bit memory cell may be configured to store a first bit of data by changing a first characteristic of the multi-bit memory cell and to store a second bit of data by changing a second characteristic of the multi-bit memory cell. Moreover, the first and second characteristics may be different. Related methods are also discussed.
摘要翻译：集成电路存储器件可以包括集成电路衬底和集成电路衬底上的多位存储单元。多位存储器单元可以被配置为通过改变多位存储单元的第一特性来存储第一位数据，并且通过改变多位存储单元的第二特性来存储第二位数据。此外，第一和第二特征可以不同。还讨论了相关方法。

9. 发明授权

US07645619B2 Magnetic random access memory device and method of forming the same 有权
标题翻译：磁性随机存取存储器件及其形成方法
公开(公告)号：US07645619B2
公开(公告)日：2010-01-12
申请号：US12073098
申请日：2008-02-29
申请人： Se-Chung Oh , Jang-Eun Lee , Jun-Soo Bae , Hyun-Jo Kim , Kyung-Tae Nam , Young-Ki Ha
发明人： Se-Chung Oh , Jang-Eun Lee , Jun-Soo Bae , Hyun-Jo Kim , Kyung-Tae Nam , Young-Ki Ha
IPC分类号： H01L21/00
CPC分类号： G11C11/16 , B82Y10/00 , B82Y25/00 , G11B5/3909 , H01L27/228 , H01L43/08 , H01L43/12 , Y10T29/49034 , Y10T29/49044
摘要： Example embodiments of the present invention disclose a semiconductor memory device and a method of forming a memory device. A semiconductor memory device may include a digit line disposed on a substrate, an intermediate insulating layer covering the digit line, a magnetic tunnel junction (MTJ) pattern disposed on the intermediate insulating layer and over the digit line, the MTJ pattern including a sequentially stacked lower magnetic pattern, upper magnetic pattern, and capping pattern, wherein the capping pattern does not react with the upper magnetic pattern at a temperature above about 280° C., and a bit line connected to the capping pattern and disposed to intersect the digit line. A method of forming a semiconductor memory device may include forming a digit line on a substrate, forming an intermediate insulating layer covering the digit line, forming a magnetic tunnel junction (MTJ) pattern on the intermediate insulating layer, the MTJ pattern including a sequentially stacked lower magnetic pattern, upper magnetic pattern, and capping pattern, wherein the capping pattern does not react with the upper magnetic pattern at a temperature above about 280° C., performing an annealing operation at a temperature of about 350° C. or higher, and forming a bit line connected to the capping pattern and disposed to intersect the digit line.
摘要翻译：本发明的示例性实施例公开了半导体存储器件和形成存储器件的方法。半导体存储器件可以包括设置在衬底上的数字线，覆盖数字线的中间绝缘层，设置在中间绝缘层上方和数字线上的磁性隧道结（MTJ）图案，MTJ图案包括顺序堆叠下磁性图案，上磁性图案和封盖图案，其中封盖图案在高于约280℃的温度下不与上磁性图案反应，而位线连接到封盖图案并且设置成与数字线相交。形成半导体存储器件的方法可以包括在衬底上形成数字线，形成覆盖数字线的中间绝缘层，在中间绝缘层上形成磁隧道结（MTJ）图案，MTJ图案包括顺序层叠的较低的磁性图案，上部磁性图案和封盖图案，其中封盖图案在高于约280℃的温度下不与上部磁性图案反应，在约350℃或更高的温度下进行退火操作，并且形成连接到所述封盖图案并且设置成与所述数字线相交的位线。

10. 发明申请

US20090206427A1 MAGNETIC MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：磁记忆体装置及其制造方法
公开(公告)号：US20090206427A1
公开(公告)日：2009-08-20
申请号：US12372083
申请日：2009-02-17
申请人： Se-Chung Oh , Jang-Eun Lee , Kyung-Tae Nam , Woo-Jin Kim , Dae-Kyom Kim , Jun-ho Jeong , Seung-Yool Lee
发明人： Se-Chung Oh , Jang-Eun Lee , Kyung-Tae Nam , Woo-Jin Kim , Dae-Kyom Kim , Jun-ho Jeong , Seung-Yool Lee
IPC分类号： H01L29/82
CPC分类号： H01L43/08 , G11C11/161 , G11C11/1673 , G11C11/1675 , H01L43/10
摘要： A magnetic memory device and a method of fabricating the same. The magnetic memory device includes a free layer, a write element, and a read element. The write element changes the magnetization direction of the free layer, and the read element senses the magnetization direction of the free layer. Herein, the write element includes a current confinement layer having a width smaller than the minimum width of the free layer to locally increase the density of a current flowing through the write element.
摘要翻译：一种磁存储器件及其制造方法。磁存储器件包括自由层，写入元件和读取元件。写入元件改变自由层的磁化方向，并且读取元件感测自由层的磁化方向。这里，写元件包括具有小于自由层的最小宽度的宽度的电流限制层，以局部地增加流过写入元件的电流的密度。

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