会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Automatic program generation device and automatic program generation method
    • 自动程序生成装置和自动程序生成方法
    • US09015658B2
    • 2015-04-21
    • US13607087
    • 2012-09-07
    • Yasunori HashimotoRyota MibeShuhei NojiriSadahiro IshikawaKiyoshi YamaguchiKentaro Yoshimura
    • Yasunori HashimotoRyota MibeShuhei NojiriSadahiro IshikawaKiyoshi YamaguchiKentaro Yoshimura
    • G06F9/44
    • G06F8/30G06F8/36
    • A device and method automatically generate a program for buffering differences based on characteristics of a component. A buffer program for buffering differences of the way to use a component during different software environments is automatically generated. The device includes a controller for executing automatic generation of the buffer program, a memory including control information and a processing program, an input device for inputting the processing content of the component, and an output device for outputting the automatically generated buffer program. The memory records a plurality of forms for buffering the component as the control information and the controller extracts characteristic information based on the processing content of the component and records the extracted characteristic information as control information in the memory, selects a specified form based on the characteristic information, and generates the buffer program based on the selected form and the characteristic information.
    • 设备和方法基于组件的特性自动生成用于缓冲差异的程序。 自动生成用于缓冲在不同软件环境中使用组件的方式差异的缓冲程序。 该装置包括用于执行缓冲器程序的自动生成的控制器,包括控制信息和处理程序的存储器,用于输入部件的处理内容的输入装置,以及用于输出自动生成的缓冲器程序的输出装置。 存储器记录用于缓存部件的多个形式作为控制信息,并且控制器基于部件的处理内容提取特征信息,并将所提取的特征信息作为控制信息记录在存储器中,基于特性选择指定的形式 信息,并且基于所选择的形式和特征信息生成缓冲器程序。
    • 8. 发明授权
    • Multi-processor system
    • 多处理器系统
    • US07836233B2
    • 2010-11-16
    • US10642755
    • 2003-08-19
    • Kunihiko TsunedomiKentaro YoshimuraNobuyasu KanekawaTakanori YokoyamaMitsuru Watabe
    • Kunihiko TsunedomiKentaro YoshimuraNobuyasu KanekawaTakanori YokoyamaMitsuru Watabe
    • G06F13/00
    • G05B19/0421G05B2219/2231G05B2219/25178
    • A serial communication interface (SCI) cable 4 is provided between the slave processor 2 and the master processor 3. Both processors are connected with a communication interface for peripheral units (SPI: Serial Peripheral Interface) which enables fast transmission. The slave processor 2 transmits a transmission request command which requests at least one of data transmission and reception from the command communication section 220 to the master processor 3 through the SCI cable 4. The master processor 3 transfers data to and from the slave processor 2 in communication with the slave processor 2 by means of the data communication section 310 through the fast SPI cable 5 in response to a transmission request command sent from the slave processor 2 With this, the processing ability of a multi-processor system can be increased.
    • 在从属处理器2和主处理器3之间提供串行通信接口(SCI)电缆4.两个处理器都连接有外围设备的通信接口(SPI:串行外设接口),可实现快速传输。 从处理器2通过SCI电缆4发送从命令通信部220向主处理器3请求数据发送和接收中的至少一个的发送请求命令。主处理器3将来自从处理器2的数据传送到从处理器2 响应于从从属处理器2发送的发送请求命令,通过数据通信部分310通过快速SPI电缆5与从属处理器2进行通信。由此,可以增加多处理器系统的处理能力。