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1. 发明申请

US20130088596A1 MONITORING SYSTEM, METHOD FOR CONTROLLING THE SAME, AND SEMICONDUCTOR INTEGRATED CIRCUIT FOR THE SAME 审中-公开
标题翻译：监控系统，其控制方法及其半导体集成电路
公开(公告)号：US20130088596A1
公开(公告)日：2013-04-11
申请号：US13604493
申请日：2012-09-05
申请人： Kazuhisa RAITA , Akihiro SHIBATA , Naoyuki SHIMODA , Takeshi ENDOU
发明人： Kazuhisa RAITA , Akihiro SHIBATA , Naoyuki SHIMODA , Takeshi ENDOU
IPC分类号： H04N7/18
CPC分类号： H04N7/18 , B60R1/00 , B60R2300/40 , H04N7/183 , H04N17/002
摘要： An image comparison section provided in a monitoring system compares current image data with past image data acquired in at least one preceding cycle when a vehicle is determined to be in motion on the basis of an output signal input from a motion sensing section. On the basis of a comparison result, the image comparison section determines whether or not a camera or an image processing section broke down. When there is a failure, the image comparison section outputs an output signal reporting the failure to the image processing section. Upon receipt of the output signal, the image processing section performs image processing intended for the event of a failure, and transmits failure information while superimposing the failure information on an image signal, thereby changing a display device to a monochrome display or an alarm display.
摘要翻译：设置在监视系统中的图像比较部分基于从运动感测部分输入的输出信号，确定当车辆被确定为在运动时，将当前图像数据与在至少一个先前循环中获取的过去图像数据进行比较。基于比较结果，图像比较部确定相机或图像处理部分是否中断。当出现故障时，图像比较部分向图像处理部分输出报告故障的输出信号。在接收到输出信号时，图像处理部进行针对故障事件的图像处理，并且在故障信息叠加在图像信号上的同时发送故障信息，从而将显示装置变更为单色显示或报警显示。

2. 发明授权

US08558624B2 Semiconductor integrated circuit 有权
标题翻译：半导体集成电路
公开(公告)号：US08558624B2
公开(公告)日：2013-10-15
申请号：US12986557
申请日：2011-01-07
申请人： Kazuhisa Raita
发明人： Kazuhisa Raita
IPC分类号： H03B5/30 , H03K3/03
CPC分类号： H03K3/0315 , G06F1/08 , H03K5/19
摘要： A semiconductor integrated circuit capable of reliably detecting oscillation stop of a vibrator-type oscillation circuit and reliably restarting the oscillation circuit when oscillation stop is detected is provided. The semiconductor integrated circuit includes one or more main oscillation circuits configured to generate a main clock signal by a vibrator, a ring oscillator configured to always operate independently of the main oscillation circuit, a main clock detection circuit configured to monitor the main clock signal on the basis of an output clock signal of the ring oscillator and to determine an operation state of the main oscillation circuit, and an switch circuit configured to switch a combination of elements making up the main oscillation circuit in response to a detection result of the main clock detection circuit.
摘要翻译：提供一种半导体集成电路，其能够可靠地检测振动型振荡电路的振荡停止，并且在检测到振荡停止时可靠地重启振荡电路。半导体集成电路包括一个或多个主振荡电路，其被配置为通过振动器产生主时钟信号，环形振荡器被配置为总是独立于主振荡电路操作;主时钟检测电路，被配置为监视主时钟信号，并且确定主振荡电路的操作状态;以及开关电路，被配置为响应于主时钟检测的检测结果来切换构成主振荡电路的元件的组合电路。

3. 发明申请

US20080061894A1 Ring oscillator and semiconductor integrated circuit and electronic device including the same 失效
标题翻译：环形振荡器和半导体集成电路和电子设备包括相同
公开(公告)号：US20080061894A1
公开(公告)日：2008-03-13
申请号：US11892444
申请日：2007-08-23
申请人： Kazuhisa Raita , Ichiro Yamane , Yoshitaka Kitao , Toshifumi Hamaguchi , Takahiro Inauchi
发明人： Kazuhisa Raita , Ichiro Yamane , Yoshitaka Kitao , Toshifumi Hamaguchi , Takahiro Inauchi
IPC分类号： H03K3/03
CPC分类号： H03K3/0322 , H03K5/133 , H03K2005/00058 , H03K2005/00208 , H03L1/00 , H03L7/0995
摘要： A differential amplifier circuit includes: a differential transistor pair composed of first and second transistors; a first resistance connected to a junction point of the first and second transistors at one terminal and to a first voltage node at the other terminal; second and third resistances provided between the first and second transistors, respectively, and a second voltage node; and first and second passive circuits respectively connected to the second and third resistances, the load characteristics of the passive circuits changing according to a control signal supplied. A ring oscillator is composed of a plurality of such differential amplifier circuits connected in a loop.
摘要翻译：差分放大电路包括：由第一和第二晶体管组成的差分晶体管对; 连接到一个端子处的第一和第二晶体管的连接点的第一电阻和另一个端子处的第一电压节点的第一电阻; 分别设置在第一和第二晶体管之间的第二和第三电阻和第二电压节点; 以及分别连接到第二和第三电阻的第一和第二无源电路，无源电路的负载特性根据提供的控制信号而变化。环形振荡器由以循环连接的多个这样的差分放大器电路组成。

4. 发明授权

US07265707B2 Successive approximation type A/D converter 有权
标题翻译：逐次逼近型A / D转换器
公开(公告)号：US07265707B2
公开(公告)日：2007-09-04
申请号：US11407083
申请日：2006-04-20
申请人： Yukihiro Mizukami , Ichirou Yamane , Kazuhisa Raita
发明人： Yukihiro Mizukami , Ichirou Yamane , Kazuhisa Raita
IPC分类号： H03M1/34
CPC分类号： H03M1/002 , H03M1/468
摘要： An A/D converter of an successive approximation type according to the present invention comprises a sample hold circuit, a reference voltage generating circuit, a comparator for comparing the reference voltage generated by the reference voltage generating circuit to a value of the input analog signal retained in the sample hold circuit, a control circuit for successively controlling the reference voltage generating circuit so that a value of the reference voltage approximates to the value of the input analog signal retained in the sample hold circuit, a buffering circuit for outputting an output value corresponding to an output voltage of the comparator, a latch circuit for retaining the output value of the buffering circuit corresponding to the output value of the comparator per bit as a digital value, and a buffering control circuit for blocking a power supply to the buffering circuit during the sampling period is provided.
摘要翻译：根据本发明的逐次逼近型的A / D转换器包括采样保持电路，参考电压产生电路，比较器，用于将由参考电压产生电路产生的参考电压与保持的输入模拟信号的值进行比较在采样保持电路中，用于连续控制参考电压发生电路使得参考电压的值接近保持在采样保持电路中的输入模拟信号的值的控制电路，用于输出对应于输入值的输出值的缓冲电路与比较器的输出电压相对应的锁存电路，用于将与每比特比较器的输出值对应的缓冲电路的输出值保持为数字值;以及缓冲控制电路，用于在缓冲电路期间阻断对缓冲电路的电源提供采样周期。

5. 发明申请

US20070182499A1 Oscillation circuit 审中-公开
标题翻译：振荡电路
公开(公告)号：US20070182499A1
公开(公告)日：2007-08-09
申请号：US11703647
申请日：2007-02-08
申请人： Katsushi Wakai , Ichiro Yamane , Toshifumi Hamaguchi , Kazuhisa Raita
发明人： Katsushi Wakai , Ichiro Yamane , Toshifumi Hamaguchi , Kazuhisa Raita
IPC分类号： H03B5/20
CPC分类号： H03K4/502
摘要： A first comparator outputs a first signal indicative that a voltage determined according to the amount of charge stored in a first capacitor has reached a first reference voltage. A second comparator outputs a second signal indicative that a voltage determined according to the amount of charge stored in a second capacitor has reached a second reference voltage. An RS flip flop circuit is shifted to a set state by one of the first signal and the second signal and shifted to a reset state by the other signal. When the RS flip flop circuit is in the set state, the first capacitor is in a charge state, and the second capacitor is in a discharge state. When the RS flip flop circuit is in the reset state, the first capacitor is in a discharge state, and the second capacitor is in a charge state.
摘要翻译：第一比较器输出指示根据存储在第一电容器中的电荷量确定的电压已经达到第一参考电压的第一信号。第二比较器输出指示根据存储在第二电容器中的电荷量确定的电压已经达到第二参考电压的第二信号。 RS触发器电路通过第一信号和第二信号中的一个移位到设置状态，并通过另一个信号移位到复位状态。当RS触发电路处于置位状态时，第一电容器处于充电状态，第二电容器处于放电状态。当RS触发电路处于复位状态时，第一电容器处于放电状态，第二电容器处于充电状态。

6. 发明申请

US20060097769A1 Level shift circuit and semiconductor circuit device including the level shift circuit 审中-公开
标题翻译：电平移位电路和包括电平移位电路的半导体电路器件
公开(公告)号：US20060097769A1
公开(公告)日：2006-05-11
申请号：US11261593
申请日：2005-10-31
申请人： Yukihiro Mizukami , Kazuhisa Raita
发明人： Yukihiro Mizukami , Kazuhisa Raita
IPC分类号： H03L5/00
CPC分类号： H03K3/356113 , H03K17/102
摘要： In a level shift circuit constituted by n-channel MOS transistors (TN-A and TN-B) and p-channel MOS transistors (TP-A and TP-B), p-channel MOS transistors (TP-C and TP-D) constituting a current mirror circuit at the transistors (TP-A and TP-B), thereby limiting a direct tunneling current from VDDH to VSS and enabling high-speed operation.
摘要翻译：在由n沟道MOS晶体管（TN-A和TN-B）和p沟道MOS晶体管（TP-A和TP-B）构成的电平移动电路中，p沟道MOS晶体管（TP-C和TP-D ）在晶体管（TP-A和TP-B）处构成电流镜电路，从而将直接隧道电流从VDDH限制到VSS，并实现高速运行。

7. 发明申请

US20060238399A1 Successive approximation type A/D converter 有权
标题翻译：逐次逼近型A / D转换器
公开(公告)号：US20060238399A1
公开(公告)日：2006-10-26
申请号：US11407083
申请日：2006-04-20
申请人： Yukihiro Mizukami , Ichirou Yamane , Kazuhisa Raita
发明人： Yukihiro Mizukami , Ichirou Yamane , Kazuhisa Raita
IPC分类号： H03M1/12
CPC分类号： H03M1/002 , H03M1/468
摘要： An A/D converter of an successive approximation type according to the present invention comprises a sample hold circuit, a reference voltage generating circuit, a comparator for comparing the reference voltage generated by the reference voltage generating circuit to a value of the input analog signal retained in the sample hold circuit, a control circuit for successively controlling the reference voltage generating circuit so that a value of the reference voltage approximates to the value of the input analog signal retained in the sample hold circuit, a buffering circuit for outputting an output value corresponding to an output voltage of the comparator, a latch circuit for retaining the output value of the buffering circuit corresponding to the output value of the comparator per bit as a digital value, and a buffering control circuit for blocking a power supply to the buffering circuit during the sampling period is provided.
摘要翻译：根据本发明的逐次逼近型的A / D转换器包括采样保持电路，参考电压产生电路，比较器，用于将由参考电压产生电路产生的参考电压与保持的输入模拟信号的值进行比较在采样保持电路中，用于连续控制参考电压发生电路使得参考电压的值接近保持在采样保持电路中的输入模拟信号的值的控制电路，用于输出对应于输入值的输出值的缓冲电路与比较器的输出电压相对应的锁存电路，用于将与每比特比较器的输出值对应的缓冲电路的输出值保持为数字值;以及缓冲控制电路，用于在缓冲电路期间阻断对缓冲电路的电源提供采样周期。

8. 发明申请

US20110102092A1 SEMICONDUCTOR INTEGRATED CIRCUIT 有权
标题翻译：半导体集成电路
公开(公告)号：US20110102092A1
公开(公告)日：2011-05-05
申请号：US12986557
申请日：2011-01-07
申请人： Kazuhisa RAITA
发明人： Kazuhisa RAITA
IPC分类号： H03B5/02 , H03L7/08
CPC分类号： H03K3/0315 , G06F1/08 , H03K5/19
摘要： A semiconductor integrated circuit capable of reliably detecting oscillation stop of a vibrator-type oscillation circuit and reliably restarting the oscillation circuit when oscillation stop is detected is provided. The semiconductor integrated circuit includes one or more main oscillation circuits configured to generate a main clock signal by a vibrator, a ring oscillator configured to always operate independently of the main oscillation circuit, a main clock detection circuit configured to monitor the main clock signal on the basis of an output clock signal of the ring oscillator and to determine an operation state of the main oscillation circuit, and an switch circuit configured to switch a combination of elements making up the main oscillation circuit in response to a detection result of the main clock detection circuit.
摘要翻译：提供一种半导体集成电路，其能够可靠地检测振动型振荡电路的振荡停止，并且在检测到振荡停止时可靠地重启振荡电路。半导体集成电路包括一个或多个主振荡电路，其被配置为通过振动器产生主时钟信号，环形振荡器被配置为总是独立于主振荡电路操作;主时钟检测电路，被配置为监视主时钟信号，并且确定主振荡电路的操作状态;以及开关电路，被配置为响应于主时钟检测的检测结果来切换构成主振荡电路的元件的组合电路。

9. 发明授权

US07633351B2 Differential ring oscillator 失效
标题翻译：差分环形振荡器
公开(公告)号：US07633351B2
公开(公告)日：2009-12-15
申请号：US11892444
申请日：2007-08-23
申请人： Kazuhisa Raita , Ichiro Yamane , Yoshitaka Kitao , Toshifumi Hamaguchi , Takahiro Inauchi
发明人： Kazuhisa Raita , Ichiro Yamane , Yoshitaka Kitao , Toshifumi Hamaguchi , Takahiro Inauchi
IPC分类号： H03B5/24 , H03K3/03 , H03L1/00 , H03L1/02 , H03L7/08
CPC分类号： H03K3/0322 , H03K5/133 , H03K2005/00058 , H03K2005/00208 , H03L1/00 , H03L7/0995
摘要： A differential amplifier circuit includes: a differential transistor pair composed of first and second transistors; a first resistance connected to a junction point of the first and second transistors at one terminal and to a first voltage node at the other terminal; second and third resistances provided between the first and second transistors, respectively, and a second voltage node; and first and second passive circuits respectively connected to the second and third resistances, the load characteristics of the passive circuits changing according to a control signal supplied. A ring oscillator is composed of a plurality of such differential amplifier circuits connected in a loop.
摘要翻译：差分放大电路包括：由第一和第二晶体管组成的差分晶体管对; 连接到一个端子处的第一和第二晶体管的连接点的第一电阻和另一个端子处的第一电压节点的第一电阻; 分别设置在第一和第二晶体管之间的第二和第三电阻和第二电压节点; 以及分别连接到第二和第三电阻的第一和第二无源电路，无源电路的负载特性根据提供的控制信号而变化。环形振荡器由以循环连接的多个这样的差分放大器电路组成。

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