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1. 发明授权

US07265707B2 Successive approximation type A/D converter 有权
标题翻译：逐次逼近型A / D转换器
公开(公告)号：US07265707B2
公开(公告)日：2007-09-04
申请号：US11407083
申请日：2006-04-20
申请人： Yukihiro Mizukami , Ichirou Yamane , Kazuhisa Raita
发明人： Yukihiro Mizukami , Ichirou Yamane , Kazuhisa Raita
IPC分类号： H03M1/34
CPC分类号： H03M1/002 , H03M1/468
摘要： An A/D converter of an successive approximation type according to the present invention comprises a sample hold circuit, a reference voltage generating circuit, a comparator for comparing the reference voltage generated by the reference voltage generating circuit to a value of the input analog signal retained in the sample hold circuit, a control circuit for successively controlling the reference voltage generating circuit so that a value of the reference voltage approximates to the value of the input analog signal retained in the sample hold circuit, a buffering circuit for outputting an output value corresponding to an output voltage of the comparator, a latch circuit for retaining the output value of the buffering circuit corresponding to the output value of the comparator per bit as a digital value, and a buffering control circuit for blocking a power supply to the buffering circuit during the sampling period is provided.
摘要翻译：根据本发明的逐次逼近型的A / D转换器包括采样保持电路，参考电压产生电路，比较器，用于将由参考电压产生电路产生的参考电压与保持的输入模拟信号的值进行比较在采样保持电路中，用于连续控制参考电压发生电路使得参考电压的值接近保持在采样保持电路中的输入模拟信号的值的控制电路，用于输出对应于输入值的输出值的缓冲电路与比较器的输出电压相对应的锁存电路，用于将与每比特比较器的输出值对应的缓冲电路的输出值保持为数字值;以及缓冲控制电路，用于在缓冲电路期间阻断对缓冲电路的电源提供采样周期。

2. 发明申请

US20060238399A1 Successive approximation type A/D converter 有权
标题翻译：逐次逼近型A / D转换器
公开(公告)号：US20060238399A1
公开(公告)日：2006-10-26
申请号：US11407083
申请日：2006-04-20
申请人： Yukihiro Mizukami , Ichirou Yamane , Kazuhisa Raita
发明人： Yukihiro Mizukami , Ichirou Yamane , Kazuhisa Raita
IPC分类号： H03M1/12
CPC分类号： H03M1/002 , H03M1/468
摘要： An A/D converter of an successive approximation type according to the present invention comprises a sample hold circuit, a reference voltage generating circuit, a comparator for comparing the reference voltage generated by the reference voltage generating circuit to a value of the input analog signal retained in the sample hold circuit, a control circuit for successively controlling the reference voltage generating circuit so that a value of the reference voltage approximates to the value of the input analog signal retained in the sample hold circuit, a buffering circuit for outputting an output value corresponding to an output voltage of the comparator, a latch circuit for retaining the output value of the buffering circuit corresponding to the output value of the comparator per bit as a digital value, and a buffering control circuit for blocking a power supply to the buffering circuit during the sampling period is provided.
摘要翻译：根据本发明的逐次逼近型的A / D转换器包括采样保持电路，参考电压产生电路，比较器，用于将由参考电压产生电路产生的参考电压与保持的输入模拟信号的值进行比较在采样保持电路中，用于连续控制参考电压发生电路使得参考电压的值接近保持在采样保持电路中的输入模拟信号的值的控制电路，用于输出对应于输入值的输出值的缓冲电路与比较器的输出电压相对应的锁存电路，用于将与每比特比较器的输出值对应的缓冲电路的输出值保持为数字值;以及缓冲控制电路，用于在缓冲电路期间阻断对缓冲电路的电源提供采样周期。

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