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    • 1. 发明申请
    • DATA OUTPUT CIRCUIT IN A SEMICONDUCTOR MEMORY APPARATUS
    • 半导体存储器中的数据输出电路
    • US20120039134A1
    • 2012-02-16
    • US13279653
    • 2011-10-24
    • Jong Yeol YANG
    • Jong Yeol YANG
    • G11C7/10G11C8/08
    • G11C7/1051G11C7/1057
    • A data output circuit in a semiconductor memory apparatus includes a pre-driver configured to receive input data and then produce a pull-up signal and a pull-down signal, a pull-up driver configured to pull-up drive a first node in response to the pull-up signal and provide an additional pull-up drive when a voltage level on the first node transitions, a pull-down driver configured to pull-down drive a second node in response to the pull-down signal and provide an additional pull-down drive when a voltage level on the second node transitions, and a pad coupled to the first and second nodes to generate output data.
    • 半导体存储装置中的数据输出电路包括:预驱动器,被配置为接收输入数据,然后产生上拉信号和下拉信号;上拉驱动器,被配置为上拉驱动第一节点作为响应 到所述上拉信号并且当所述第一节点上的电压电平转换时提供额外的上拉驱动器,配置成下拉驱动器响应于所述下拉信号下拉驱动第二节点的下拉驱动器,并且提供额外的 当第二节点上的电压电平转换时,下拉驱动器和耦合到第一和第二节点的焊盘产生输出数据。
    • 2. 发明授权
    • Apparatus and method for controlling refresh with current dispersion effect in semiconductor device
    • 用于在半导体器件中用电流色散效应控制刷新的装置和方法
    • US07881140B2
    • 2011-02-01
    • US12229362
    • 2008-08-22
    • Jong Yeol Yang
    • Jong Yeol Yang
    • G11C7/00
    • G11C11/406G11C8/12G11C11/40618
    • A refresh control apparatus is provided which is capable of dispersing a peak current at an all-bank refresh mode and reducing the characteristic difference between the banks. The refresh control apparatus includes an internal refresh counter for outputting row address signals to select word lines when a refresh command is inputted from an external circuit, a row decoder for outputting row decoding signals to select all banks in response bank active signals and the row address signals, an enable signal control unit for sequentially outputting at a time interval sense amplifier enable signals in response to the bank active signals and the refresh command, and a sense amplifier for sequentially refreshing all of the banks at a time interval in response to the sense amplifier enable signals.
    • 提供了一种刷新控制装置,其能够以全部刷新模式分散峰值电流并且降低两组之间的特性差异。 刷新控制装置包括内部刷新计数器,用于当从外部电路输入刷新命令时输出行地址信号以选择字线;行解码器,用于输出行解码信号以选择响应库活动信号中的所有存储体,并且行地址 信号;使能信号控制单元,用于响应于存储体有效信号和刷新命令,以时间间隔顺序地输出读出放大器使能信号;以及读出放大器,用于响应于该感测在时间间隔顺序刷新所有存储区 放大器使能信号。
    • 4. 发明申请
    • DATA OUTPUT CIRCUIT IN A SEMICONDUCTOR MEMORY APPARATUS
    • 半导体存储器中的数据输出电路
    • US20100034032A1
    • 2010-02-11
    • US12410579
    • 2009-03-25
    • Jong Yeol YANG
    • Jong Yeol YANG
    • G11C7/00
    • G11C7/1051G11C7/1057
    • A data output circuit in a semiconductor memory apparatus includes a pre-driver configured to receive input data and then produce a pull-up signal and a pull-down signal, a pull-up driver configured to pull-up drive a first node in response to the pull-up signal and provide an additional pull-up drive when a voltage level on the first node transitions, a pull-down driver configured to pull-down drive a second node in response to the pull-down signal and provide an additional pull-down drive when a voltage level on the second node transitions, and a pad coupled to the first and second nodes to generate output data.
    • 半导体存储装置中的数据输出电路包括:预驱动器,被配置为接收输入数据,然后产生上拉信号和下拉信号;上拉驱动器,被配置为上拉驱动第一节点作为响应 到所述上拉信号并且当所述第一节点上的电压电平转换时提供额外的上拉驱动器,配置成下拉驱动器响应于所述下拉信号下拉驱动第二节点的下拉驱动器,并且提供额外的 当第二节点上的电压电平转换时,下拉驱动器和耦合到第一和第二节点的焊盘产生输出数据。
    • 5. 发明申请
    • Appartus and method for controlling refresh with current dispersion effect in semiconductor device
    • Appartus和用于控制半导体器件中当前色散效应的刷新方法
    • US20090238015A1
    • 2009-09-24
    • US12229362
    • 2008-08-22
    • Jong Yeol Yang
    • Jong Yeol Yang
    • G11C11/402G11C7/00G11C8/00
    • G11C11/406G11C8/12G11C11/40618
    • A refresh control apparatus is provided which is capable of dispersing a peak current at an all-bank refresh mode and reducing the characteristic difference between the banks. The refresh control apparatus includes an internal refresh counter for outputting row address signals to select word lines when a refresh command is inputted from an external circuit, a row decoder for outputting row decoding signals to select all banks in response bank active signals and the row address signals, an enable signal control unit for sequentially outputting at a time interval sense amplifier enable signals in response to the bank active signals and the refresh command, and a sense amplifier for sequentially refreshing all of the banks at a time interval in response to the sense amplifier enable signals.
    • 提供了一种刷新控制装置,其能够以全部刷新模式分散峰值电流并且降低两组之间的特性差异。 刷新控制装置包括内部刷新计数器,用于当从外部电路输入刷新命令时输出行地址信号以选择字线;行解码器,用于输出行解码信号以选择响应库活动信号中的所有存储体,并且行地址 信号;使能信号控制单元,用于响应于存储体有效信号和刷新命令,以时间间隔顺序地输出读出放大器使能信号;以及读出放大器,用于响应于该感测在时间间隔顺序刷新所有存储区 放大器使能信号。
    • 6. 发明申请
    • DRY-ETCHING GAS FOR SEMICONDUCTOR PROCESS
    • 用于半导体工艺的干蚀气体
    • US20080203353A1
    • 2008-08-28
    • US12013975
    • 2008-01-14
    • Hae Seok JIOok Jae ChoJae Gug RyuJong Yeol YangYoung Hoon AhnBong Suk KimDong Hyun Kim
    • Hae Seok JIOok Jae ChoJae Gug RyuJong Yeol YangYoung Hoon AhnBong Suk KimDong Hyun Kim
    • C09K13/00
    • C07C17/208C07C17/38C07C17/383C07C23/08
    • The invention is a method for continuously preparing highly pure octafluorocyclopentene for use in dry-etching processes. The method includes reacting octachlorocyclopentene with KF in a continuous manner, and purifying crude octafluorocyclopentene. In the reacting step, two KF-charged filters are installed in parallel and allowed to communicate with a reactor containing octachlorocyclopentene in an alternating manner to produce crude octafluorocyclopentene. In the purifying step, organics having lower boiling points than octafluorocyclopentene are removed, and metal ingredients and organics having boiling points higher than octafluorocyclopentene are separated to recover octafluorocyclopentene as a gas. The gaseous octafluorocyclopentene composition contains C5F8 in an amount of 99.995 vol % or higher, nitrogen in an amount of 50 vol ppm or less, oxygen in an amount of 5 vol ppm or less, water in an amount of 5 vol ppm or less, and metal ingredients in an amount of 5 wt ppb or less.
    • 本发明是用于连续制备用于干蚀刻工艺的高纯度八氟环戊烯的方法。 该方法包括使八氯环戊烯与KF连续反应,并纯化粗八氟环戊烯。 在反应步骤中,平行安装两个带有KF的过滤器,并使其与含有八氯环戊烯的反应器以交替方式连通以产生粗制八氟环戊烯。 在纯化步骤中,除去沸点低于八氟环戊烯的有机物,分离沸点高于八氟环戊烯的金属成分和有机物,以回收作为气体的八氟环戊烯。 气态八氟环戊烯组合物含有99.995体积%以上的C 5 C 5 N 8 N 8,50体积ppm以下的氮,5重量%的氧 体积ppm以下的水,5体积ppm以下的水,5重量ppm以下的金属成分。
    • 7. 发明授权
    • Dry-etching gas for semiconductor process and preparation method thereof
    • 用于半导体工艺的干蚀刻气体及其制备方法
    • US07319174B2
    • 2008-01-15
    • US11535035
    • 2006-09-25
    • Hae Seok JiOok Jae ChoJae Gug RyuJong Yeol YangYoung Hoon AhnBong Suk KimDong Hyun Kim
    • Hae Seok JiOok Jae ChoJae Gug RyuJong Yeol YangYoung Hoon AhnBong Suk KimDong Hyun Kim
    • C07C17/20C09K13/00
    • C07C17/208C07C17/38C07C17/383C07C23/08
    • The invention is a method for continuously preparing highly pure octafluorocyclopentene for use in dry-etching processes. The method includes reacting octachlorocyclopentene with KF in a continuous manner, and purifying crude octafluorocyclopentene. In the reacting step, two KF-charged filters are installed in parallel and allowed to communicate with a reactor containing octachlorocyclopentene in an alternating manner to produce crude octafluorocyclopentene. In the purifying step, organics having lower boiling points than octafluorocyclopentene are removed, and metal ingredients and organics having boiling points higher than octafluorocyclopentene are separated to recover octafluorocyclopentene as a gas. The gaseous octafluorocyclopentene composition contains C5F8 in an amount of 99.995 vol % or higher, nitrogen in an amount of 50 vol ppm or less, oxygen in an amount of 5 vol ppm or less, water in an amount of 5 vol ppm or less, and metal ingredients in an amount of 5 wt ppb or less.
    • 本发明是用于连续制备用于干蚀刻工艺的高纯度八氟环戊烯的方法。 该方法包括使八氯环戊烯与KF连续反应,并纯化粗八氟环戊烯。 在反应步骤中,平行安装两个带有KF的过滤器,并使其与含有八氯环戊烯的反应器以交替方式连通以产生粗制八氟环戊烯。 在纯化步骤中,除去沸点低于八氟环戊烯的有机物,分离沸点高于八氟环戊烯的金属成分和有机物,以回收作为气体的八氟环戊烯。 气态八氟环戊烯组合物含有99.995体积%以上的C 5 C 5 N 8 N 8,50体积ppm以下的氮,5重量%的氧 体积ppm以下的水,5体积ppm以下的水,5重量ppm以下的金属成分。
    • 9. 发明申请
    • SELF-REFRESH TEST CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS
    • 半导体存储器件的自激测试电路
    • US20110103165A1
    • 2011-05-05
    • US12649033
    • 2009-12-29
    • Sun Mo AnJong Yeol Yang
    • Sun Mo AnJong Yeol Yang
    • G11C29/00G11C7/00G11C8/18
    • G11C29/02G11C11/401G11C11/406G11C11/40615G11C29/023G11C29/50016
    • A self-refresh test circuit includes a test clock generation unit, a pulse generation unit, a period signal selection unit, and a self-refresh pulse control unit. The test clock generation unit divides a clock signal to generate a plurality of divided clock signals having different periods when a test enable signal is enabled, and outputs one of the plurality of divided clock signals as a selected clock signal. The pulse generation unit generates a test period signal in response to the selected clock signal. The period signal selection unit outputs one of the test period signal and a self-refresh period signal as a selected period signal. The self-refresh pulse control unit generates a self-refresh pulse in response to a self-refresh exit signal and the selected period signal.
    • 自刷新测试电路包括测试时钟产生单元,脉冲发生单元,周期信号选择单元和自刷新脉冲控制单元。 当测试使能信号被使能时,测试时钟产生单元划分时钟信号以产生具有不同周期的多个分频时钟信号,并且输出多个划分的时钟信号中的一个作为选择的时钟信号。 脉冲生成单元响应于所选择的时钟信号产生测试周期信号。 周期信号选择单元输出测试周期信号和自刷新周期信号之一作为选择的周期信号。 自刷新脉冲控制单元响应于自刷新输出信号和选择的周期信号产生自刷新脉冲。
    • 10. 发明授权
    • Apparatus and method for controlling refresh operation of semiconductor integrated circuit
    • 用于控制半导体集成电路的刷新操作的装置和方法
    • US07474580B2
    • 2009-01-06
    • US11647468
    • 2006-12-29
    • Jong-Yeol YangTae-Woo Kwon
    • Jong-Yeol YangTae-Woo Kwon
    • G11C7/00
    • G11C11/406G11C7/04G11C11/40626G11C2211/4061
    • A semiconductor memory integrated circuit for controlling a refresh operation includes: a first period generating unit that generates a first periodic signal having an uniformed period; a second period generating unit that generates a second periodic signal according to a first control signal; a period generation control unit that generates a timing signal for every predetermined period; a frequency dividing unit that divides the frequency of the first periodic signal into at least one frequency-divided periodic signals; and a period selection control unit that controls the operation of the second period generating unit according to the at least one frequency-divided periodic signals and the second periodic signal, determines temperature, and outputs one of the frequency-divided periodic signals corresponding to the determined temperature as a refresh signal.
    • 一种用于控制刷新操作的半导体存储器集成电路,包括:产生具有均匀周期的第一周期信号的第一周期生成单元; 第二周期生成单元,其根据第一控制信号生成第二周期信号; 周期产生控制单元,用于每个预定周期产生定时信号; 分频单元,其将所述第一周期信号的频率划分为至少一个分频周期信号; 以及周期选择控制单元,其根据所述至少一个分频周期信号和所述第二周期信号来控制所述第二周期生成单元的操作,确定温度,并且输出与所确定的对应的所述分频周期信号中的一个 温度作为刷新信号。