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1. 发明申请

US20100121116A1 PROCESS FOR PREPARING OCTAFLUOROCYCLOHEXADIENE 审中-公开
标题翻译：制备OCTAFLUOROCYCLOHEXADIENE的方法
公开(公告)号：US20100121116A1
公开(公告)日：2010-05-13
申请号：US12388871
申请日：2009-02-19
申请人： Hyang Ja JANG , Jong Yeol Yang , Chul Ho Kim , Young Gu Cho , Jung Eun Lee
发明人： Hyang Ja JANG , Jong Yeol Yang , Chul Ho Kim , Young Gu Cho , Jung Eun Lee
IPC分类号： C07C21/19
CPC分类号： C07C17/04 , C07C23/10
摘要： Disclosed herein is a process of preparing octafluorocyclohexadiene using hexafluorobenzene as a raw material. The hexafluorobenzene reacts with an activated fluorinating agent at 60-200° C. in an inert gas atmosphere. The activated fluorinating agent is prepared by mixing 1-10 wt % of cobalt difluoride with 90-99 wt % of other metal fluoride selected from the group of calcium fluoride, magnesium fluoride, aluminum fluoride, sodium fluoride and potassium fluoride. The mixture reacts with fluorine gas at 200-400° C.
摘要翻译：本文公开了以六氟苯为原料制备八氟环己二烯的方法。在惰性气体气氛中，六氟苯与活化氟化剂在60-200℃反应。通过将1-10重量％的二氟化钴与选自氟化钙，氟化镁，氟化铝，氟化钠和氟化钾的其它金属氟化物的90-99重量％混合来制备活化的氟化剂。该混合物与200-400℃的氟气反应

2. 发明申请

US20110103165A1 SELF-REFRESH TEST CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS 有权
标题翻译：半导体存储器件的自激测试电路
公开(公告)号：US20110103165A1
公开(公告)日：2011-05-05
申请号：US12649033
申请日：2009-12-29
申请人： Sun Mo An , Jong Yeol Yang
发明人： Sun Mo An , Jong Yeol Yang
IPC分类号： G11C29/00 , G11C7/00 , G11C8/18
CPC分类号： G11C29/02 , G11C11/401 , G11C11/406 , G11C11/40615 , G11C29/023 , G11C29/50016
摘要： A self-refresh test circuit includes a test clock generation unit, a pulse generation unit, a period signal selection unit, and a self-refresh pulse control unit. The test clock generation unit divides a clock signal to generate a plurality of divided clock signals having different periods when a test enable signal is enabled, and outputs one of the plurality of divided clock signals as a selected clock signal. The pulse generation unit generates a test period signal in response to the selected clock signal. The period signal selection unit outputs one of the test period signal and a self-refresh period signal as a selected period signal. The self-refresh pulse control unit generates a self-refresh pulse in response to a self-refresh exit signal and the selected period signal.
摘要翻译：自刷新测试电路包括测试时钟产生单元，脉冲发生单元，周期信号选择单元和自刷新脉冲控制单元。当测试使能信号被使能时，测试时钟产生单元划分时钟信号以产生具有不同周期的多个分频时钟信号，并且输出多个划分的时钟信号中的一个作为选择的时钟信号。脉冲生成单元响应于所选择的时钟信号产生测试周期信号。周期信号选择单元输出测试周期信号和自刷新周期信号之一作为选择的周期信号。自刷新脉冲控制单元响应于自刷新输出信号和选择的周期信号产生自刷新脉冲。

3. 发明授权

US08780661B2 Self refresh pulse generation circuit 有权
标题翻译：自刷新脉冲发生电路
公开(公告)号：US08780661B2
公开(公告)日：2014-07-15
申请号：US13337471
申请日：2011-12-27
申请人： Jong Yeol Yang
发明人： Jong Yeol Yang
IPC分类号： G11C7/00 , G11C11/406
CPC分类号： G11C11/406 , G11C11/40615
摘要： A self refresh pulse generation circuit includes a control signal generator configured to generate a control signal asserted for an initial period of a self refresh mode, and a self refresh pulse generator configured to generate a self refresh pulse having a period controlled in response to the control signal, in the self refresh mode.
摘要翻译：自刷新脉冲发生电路包括：控制信号发生器，被配置为产生在自刷新模式的初始周期被断言的控制信号;以及自刷新脉冲发生器，被配置为产生具有响应于控制的控制周期的自刷新脉冲信号，在自刷新模式。

4. 发明授权

US08259527B2 Self-refresh test circuit of semiconductor memory apparatus 有权
标题翻译：半导体存储器的自刷新测试电路
公开(公告)号：US08259527B2
公开(公告)日：2012-09-04
申请号：US12649033
申请日：2009-12-29
申请人： Sun Mo An , Jong Yeol Yang
发明人： Sun Mo An , Jong Yeol Yang
IPC分类号： G11C7/00
CPC分类号： G11C29/02 , G11C11/401 , G11C11/406 , G11C11/40615 , G11C29/023 , G11C29/50016
摘要： A self-refresh test circuit includes a test clock generation unit, a pulse generation unit, a period signal selection unit, and a self-refresh pulse control unit. The test clock generation unit divides a clock signal to generate a plurality of divided clock signals having different periods when a test enable signal is enabled, and outputs one of the plurality of divided clock signals as a selected clock signal. The pulse generation unit generates a test period signal in response to the selected clock signal. The period signal selection unit outputs one of the test period signal and a self-refresh period signal as a selected period signal. The self-refresh pulse control unit generates a self-refresh pulse in response to a self-refresh exit signal and the selected period signal.
摘要翻译：自刷新测试电路包括测试时钟产生单元，脉冲发生单元，周期信号选择单元和自刷新脉冲控制单元。当测试使能信号被使能时，测试时钟产生单元划分时钟信号以产生具有不同周期的多个分频时钟信号，并且输出多个划分的时钟信号中的一个作为选择的时钟信号。脉冲生成单元响应于所选择的时钟信号产生测试周期信号。周期信号选择单元输出测试周期信号和自刷新周期信号之一作为选择的周期信号。自刷新脉冲控制单元响应于自刷新输出信号和选择的周期信号产生自刷新脉冲。

5. 发明授权

US07782699B2 Auto-refresh controlling apparatus 有权
标题翻译：自动刷新控制装置
公开(公告)号：US07782699B2
公开(公告)日：2010-08-24
申请号：US12150388
申请日：2008-04-28
申请人： Jong Yeol Yang
发明人： Jong Yeol Yang
IPC分类号： G11C7/22
CPC分类号： G11C11/406 , G11C11/40611
摘要： An auto-refresh control apparatus is provided which includes a counter unit for outputting counter signals in response to an external auto-refresh command signal, and a refresh command signal generating unit for generating internal auto-refresh command signals in response to the counter signals when a test mode signal is activated.
摘要翻译：提供一种自动刷新控制装置，其包括用于响应于外部自动刷新命令信号而输出计数器信号的计数器单元和用于响应于计数器信号而产生内部自动刷新命令信号的刷新命令信号产生单元，测试模式信号被激活。

6. 发明授权

US07336089B2 Power line control circuit of semiconductor device 失效
标题翻译：半导体器件电源线控制电路
公开(公告)号：US07336089B2
公开(公告)日：2008-02-26
申请号：US11490244
申请日：2006-07-21
申请人： Jong Yeol Yang
发明人： Jong Yeol Yang
IPC分类号： G01R31/02 , H03K17/00 , H01L29/00
CPC分类号： G01R31/31721 , G11C5/14 , G11C29/02 , G11C29/025
摘要： A power line control circuit of a semiconductor device in which a width of a power line can be selectively controlled. The power line control circuit of the semiconductor device according to the present invention can selectively control the width of the power line employing the dummy power line. It is therefore possible to easily change the width of the power lines and to reduce the manufacturing cost and the manufacturing time depending on the formation of the power lines. Furthermore, the power line control circuit of the semiconductor device according to the present invention can selectively control the width of the power lines, if appropriate. Accordingly, mesh of optimized power lines can be provided. Furthermore, more stabilized product characteristics can be secured and the yield of semiconductor memory devices can be enhanced. In addition, the power line control circuit of the semiconductor device according to the present invention can selectively change power mesh corresponding to a power line method or operation mode of a product.
摘要翻译：可以选择性地控制电力线宽度的半导体装置的电力线控制电路。根据本发明的半导体器件的电力线控制电路可以选择性地控制采用虚拟电力线的电力线的宽度。因此，可以容易地改变电力线的宽度，并且可以根据电力线的形成来降低制造成本和制造时间。此外，根据本发明的半导体器件的电力线控制电路，如果适当，可以选择性地控制电力线的宽度。因此，可以提供优化的电源线的网格。此外，可以确保更稳定的产品特性，并且可以提高半导体存储器件的产量。此外，根据本发明的半导体器件的电力线控制电路可以选择性地改变与电力线方法或产品的操作模式相对应的功率网。

7. 发明申请

US20070291568A1 Apparatus and method for controlling refresh operation of semiconductor integrated circuit 有权
标题翻译：用于控制半导体集成电路的刷新操作的装置和方法
公开(公告)号：US20070291568A1
公开(公告)日：2007-12-20
申请号：US11647468
申请日：2006-12-29
申请人： Jong Yeol Yang , Tae Woo Kwon
发明人： Jong Yeol Yang , Tae Woo Kwon
IPC分类号： G11C7/00 , G11C8/00
CPC分类号： G11C11/406 , G11C7/04 , G11C11/40626 , G11C2211/4061
摘要： A semiconductor memory integrated circuit for controlling a refresh operation includes: a first period generating unit that generates a first periodic signal having an uniformed period; a second period generating unit that generates a second periodic signal according to a first control signal; a period generation control unit that generates a timing signal for every predetermined period; a frequency dividing unit that divides the frequency of the first periodic signal into at least one frequency-divided periodic signals; and a period selection control unit that controls the operation of the second period generating unit according to the at least one frequency-divided periodic signals and the second periodic signal, determines temperature, and outputs one of the frequency-divided periodic signals corresponding to the determined temperature as a refresh signal.
摘要翻译：一种用于控制刷新操作的半导体存储器集成电路，包括：产生具有均匀周期的第一周期信号的第一周期生成单元; 第二周期生成单元，其根据第一控制信号生成第二周期信号; 周期产生控制单元，用于每个预定周期产生定时信号; 分频单元，其将所述第一周期信号的频率划分为至少一个分频周期信号; 以及周期选择控制单元，其根据所述至少一个分频周期信号和所述第二周期信号来控制所述第二周期生成单元的操作，确定温度，并且输出与所确定的对应的所述分频周期信号中的一个温度作为刷新信号。

8. 发明授权

US08045399B2 Data output circuit in a semiconductor memory apparatus 失效
标题翻译：半导体存储装置中的数据输出电路
公开(公告)号：US08045399B2
公开(公告)日：2011-10-25
申请号：US12410579
申请日：2009-03-25
申请人： Jong Yeol Yang
发明人： Jong Yeol Yang
IPC分类号： G11C7/10
CPC分类号： G11C7/1051 , G11C7/1057
摘要： A data output circuit in a semiconductor memory apparatus includes a pre-driver configured to receive input data and then produce a pull-up signal and a pull-down signal, a pull-up driver configured to pull-up drive a first node in response to the pull-up signal and provide an additional pull-up drive when a voltage level on the first node transitions, a pull-down driver configured to pull-down drive a second node in response to the pull-down signal and provide an additional pull-down drive when a voltage level on the second node transitions, and a pad coupled to the first and second nodes to generate output data.
摘要翻译：半导体存储装置中的数据输出电路包括：预驱动器，被配置为接收输入数据，然后产生上拉信号和下拉信号;上拉驱动器，被配置为上拉驱动第一节点作为响应到所述上拉信号并且当所述第一节点上的电压电平转换时提供额外的上拉驱动器，配置成下拉驱动器响应于所述下拉信号下拉驱动第二节点的下拉驱动器，并且提供额外的当第二节点上的电压电平转换时，下拉驱动器和耦合到第一和第二节点的焊盘产生输出数据。

9. 发明申请

US20090154276A1 Auto-refresh controlling apparatus 有权
标题翻译：自动刷新控制装置
公开(公告)号：US20090154276A1
公开(公告)日：2009-06-18
申请号：US12150388
申请日：2008-04-28
申请人： Jong Yeol Yang
发明人： Jong Yeol Yang
IPC分类号： G11C7/00
CPC分类号： G11C11/406 , G11C11/40611
摘要： An auto-refresh control apparatus is provided which includes a counter unit for outputting counter signals in response to an external auto-refresh command signal, and a refresh command signal generating unit for generating internal auto-refresh command signals in response to the counter signals when a test mode signal is activated.
摘要翻译：提供一种自动刷新控制装置，其包括用于响应于外部自动刷新命令信号而输出计数器信号的计数器单元和用于响应于计数器信号而产生内部自动刷新命令信号的刷新命令信号产生单元，测试模式信号被激活。

10. 发明授权

US07486574B2 Row active control circuit of pseudo static ranom access memory 失效
标题翻译：伪静态随机存取存储器的行主动控制电路
公开(公告)号：US07486574B2
公开(公告)日：2009-02-03
申请号：US11074894
申请日：2005-03-09
申请人： Jong Yeol Yang , Yin Jae Lee
发明人： Jong Yeol Yang , Yin Jae Lee
IPC分类号： G11C7/00
CPC分类号： G11C11/406 , G11C11/40615 , G11C2211/4065 , G11C2211/4067
摘要： A row active control circuit of a PSRAM controls a refresh timing when a refresh operation is performed before activation of a row path for embodiment of a page mode, thereby preventing mis-operations. The row active signal generating unit generates a row active signal when an active condition is set by the internal active signal. The internal active signal generating unit generates the internal active signal in response to a refresh start signal. The row active control unit generates a row active standby signal with the row active signal in response to the internal active signal. The external active signal generating unit for generating an external active control signal in response to the row active standby signal.
摘要翻译： PSRAM的行主动控制电路控制在页面模式的实施例的行路径激活之前执行刷新操作时的刷新定时，从而防止错误操作。当由内部有效信号设置有效状态时，行有源信号产生单元产生行有效信号。内部有源信号产生单元响应于刷新开始信号产生内部有效信号。行有源控制单元响应于内部有效信号产生具有行有源信号的行活动待机信号。外部有源信号产生单元，用于响应于行活动待机信号产生外部主动控制信号。

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