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1. 发明授权

US09406512B2 Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects 有权
公开(公告)号：US09406512B2
公开(公告)日：2016-08-02
申请号：US14720821
申请日：2015-05-24
申请人： Robert L. Bristol , James M. Blackwell , Alan M. Myers , Kanwal Jit Singh
发明人： Robert L. Bristol , James M. Blackwell , Alan M. Myers , Kanwal Jit Singh
IPC分类号： H01L21/033 , H01L21/768 , H01L23/522 , H01L23/528 , H01L23/532
CPC分类号： H01L21/0338 , H01L21/0332 , H01L21/0335 , H01L21/0337 , H01L21/31144 , H01L21/76801 , H01L21/76808 , H01L21/76811 , H01L21/76813 , H01L21/76816 , H01L21/76897 , H01L23/5226 , H01L23/528 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects is described. In an example, an interconnect structure for an integrated circuit includes a first layer of the interconnect structure disposed above a substrate, the first layer including a first grating of alternating metal lines and dielectric lines in a first direction. The dielectric lines have an uppermost surface higher than an uppermost surface of the metal lines. A second layer of the interconnect structure is disposed above the first layer of the interconnect structure, the second layer including a second grating of alternating metal lines and dielectric lines in a second direction, perpendicular to the first direction. The dielectric lines have a lowermost surface lower than a lowermost surface of the metal lines of the second grating. The dielectric lines of the second grating overlap and contact, but are distinct from, the dielectric lines of the first grating. First and second dielectric regions are disposed between the metal lines of the first grating and the metal lines of the second grating, and in a same plane as upper portions of the dielectric lines of the first grating and lower portions of the dielectric lines of the second grating. The first dielectric region is composed of a first cross-linked photolyzable material, and the second dielectric region is composed of a second, different, cross-linked photolyzable material.

2. 发明申请

US20150255284A1 SELF-ALIGNED VIA PATTERNING WITH MULTI-COLORED PHOTOBUCKETS FOR BACK END OF LINE (BEOL) INTERCONNECTS 审中-公开
标题翻译：自动对准通过多行彩色胶片的背面（BEOL）互连
公开(公告)号：US20150255284A1
公开(公告)日：2015-09-10
申请号：US14720821
申请日：2015-05-24
申请人： Robert L. Bristol , James M. Blackwell , Alan M. Myers , Kanwal Jit Singh
发明人： Robert L. Bristol , James M. Blackwell , Alan M. Myers , Kanwal Jit Singh
IPC分类号： H01L21/033 , H01L23/532 , H01L23/522 , H01L21/768 , H01L23/528
CPC分类号： H01L21/0338 , H01L21/0332 , H01L21/0335 , H01L21/0337 , H01L21/31144 , H01L21/76801 , H01L21/76808 , H01L21/76811 , H01L21/76813 , H01L21/76816 , H01L21/76897 , H01L23/5226 , H01L23/528 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects is described. In an example, an interconnect structure for an integrated circuit includes a first layer of the interconnect structure disposed above a substrate, the first layer including a first grating of alternating metal lines and dielectric lines in a first direction. The dielectric lines have an uppermost surface higher than an uppermost surface of the metal lines. A second layer of the interconnect structure is disposed above the first layer of the interconnect structure, the second layer including a second grating of alternating metal lines and dielectric lines in a second direction, perpendicular to the first direction. The dielectric lines have a lowermost surface lower than a lowermost surface of the metal lines of the second grating. The dielectric lines of the second grating overlap and contact, but are distinct from, the dielectric lines of the first grating. First and second dielectric regions are disposed between the metal lines of the first grating and the metal lines of the second grating, and in a same plane as upper portions of the dielectric lines of the first grating and lower portions of the dielectric lines of the second grating. The first dielectric region is composed of a first cross-linked photolyzable material, and the second dielectric region is composed of a second, different, cross-linked photolyzable material.
摘要翻译：描述了通过用于后端（BEOL）互连的多色photobuckets图案化的自对准。在一个示例中，用于集成电路的互连结构包括布置在衬底上方的互连结构的第一层，第一层包括在第一方向上交替的金属线和介质线的第一光栅。介质线具有高于金属线的最上表面的最上表面。所述互连结构的第二层设置在所述互连结构的所述第一层上方，所述第二层包括垂直于所述第一方向的第二方向的交替金属线和介质线的第二光栅。介质线具有比第二光栅的金属线的最下表面低的最低表面。第二光栅的介质线与第一光栅的介质线重叠并接触，但不同。第一和第二电介质区域设置在第一光栅的金属线和第二光栅的金属线之间，并且在与第一光栅的介电线的上部和第二栅的介电线的下部相同的平面中光栅。第一电介质区域由第一交联光可光化材料组成，第二电介质区域由第二不同的交联光可光化材料组成。

3. 发明申请

US20150176119A1 ADDITIVES TO IMPROVE THE PERFORMANCE OF A PRECURSOR SOURCE FOR COBALT DEPOSITION 有权
标题翻译：提高钴沉淀前驱源的性能的添加剂
公开(公告)号：US20150176119A1
公开(公告)日：2015-06-25
申请号：US14134087
申请日：2013-12-19
申请人： James M. Blackwell , Daniel B. Bergstrom , Scott B. Clendenning , Patricio E. Romero
发明人： James M. Blackwell , Daniel B. Bergstrom , Scott B. Clendenning , Patricio E. Romero
IPC分类号： C23C16/06
CPC分类号： C23C16/18
摘要： Methods of forming cobalt films utilizing a cobalt precursor comprising an additive are described. Those methods may include adding an additive to a cobalt precursor, wherein the cobalt precursor is located in an ampoule that is coupled with a deposition tool, and then forming a cobalt film using the cobalt precursor comprising the additive. Non-volatile decomposition products of the cobalt precursor are solubilized in the ampoule.
摘要翻译：描述了使用包含添加剂的钴前体形成钴膜的方法。这些方法可以包括将添加剂添加到钴前体中，其中钴前体位于与沉积工具耦合的安瓿中，然后使用包含添加剂的钴前体形成钴膜。钴前体的非挥发性分解产物溶解在安瓿中。

4. 发明申请

US20130249049A1 CYCLIC CARBOSILANE DIELECTRIC FILMS 审中-公开
标题翻译：循环碳化硅电介质膜
公开(公告)号：US20130249049A1
公开(公告)日：2013-09-26
申请号：US13894422
申请日：2013-05-14
申请人： DAVID J. MICHALAK , JAMES M. BLACKWELL , JAMES S. CLARKE
发明人： DAVID J. MICHALAK , JAMES M. BLACKWELL , JAMES S. CLARKE
IPC分类号： H01L21/02 , H01L29/06
CPC分类号： H01L21/02203 , C07F7/0816 , C07F7/1804 , C09D183/14 , H01L21/02126 , H01L21/02216 , H01L21/02282 , H01L29/0649 , H01L51/0035 , H01L51/0094
摘要： Embodiments of the invention provide dielectric films and low-k dielectric films and methods for making dielectric and low-k dielectric films. Dielectric films are made from carbosilane-containing precursors. In embodiments of the invention, dielectric film precursors comprise attached porogen molecules. In further embodiments, dielectric films have nanometer-dimensioned pores.
摘要翻译：本发明的实施例提供介电膜和低k电介质膜以及用于制造电介质和低k电介质膜的方法。电介质膜由含碳硅烷的前体制成。在本发明的实施方案中，电介质膜前体包含附着的致孔剂分子。在另外的实施例中，电介质膜具有纳米尺寸的孔。

5. 发明授权

US08441006B2 Cyclic carbosilane dielectric films 有权
公开(公告)号：US08441006B2
公开(公告)日：2013-05-14
申请号：US12978385
申请日：2010-12-23
申请人： David J. Michalak , James M. Blackwell , James S. Clarke
发明人： David J. Michalak , James M. Blackwell , James S. Clarke
IPC分类号： H01L51/00
CPC分类号： H01L21/02203 , C07F7/0816 , C07F7/1804 , C09D183/14 , H01L21/02126 , H01L21/02216 , H01L21/02282 , H01L29/0649 , H01L51/0035 , H01L51/0094
摘要： Embodiments of the invention provide dielectric films and low-k dielectric films and methods for making dielectric and low-k dielectric films. Dielectric films are made from carbosilane-containing precursors. In embodiments of the invention, dielectric film precursors comprise attached porogen molecules. In further embodiments, dielectric films have nanometer-dimensioned pores.

6. 发明申请

US20080160176A1 Method of fabricating iridium layer with volatile precursor 审中-公开
标题翻译：用挥发性前体制备铱层的方法
公开(公告)号：US20080160176A1
公开(公告)日：2008-07-03
申请号：US11647984
申请日：2006-12-28
申请人： James M. Blackwell , Adrien R. Lavoie , Darryl J. Morrison , Bill Barrow
发明人： James M. Blackwell , Adrien R. Lavoie , Darryl J. Morrison , Bill Barrow
IPC分类号： B05D5/12
CPC分类号： C23C16/18 , C23C16/45525 , C23C16/45553
摘要： An iridium precursor, and an iridium layer from the precursor is described. The Ir(I) in the precursor becomes Ir(III) in a reduction pathway before forming an Ir(0) layer.
摘要翻译：描述了铱前体和来自前体的铱层。在形成Ir（0）层之前，前体中的Ir（I）在还原途径中变为Ir（III）。

7. 发明申请

US20160172237A1 NON-LITHOGRAPHICALLY PATTERNED DIRECTED SELF ASSEMBLY ALIGNMENT PROMOTION LAYERS 有权
公开(公告)号：US20160172237A1
公开(公告)日：2016-06-16
申请号：US14778562
申请日：2013-06-27
申请人： Robert L. Bristol , Rami HOURANI , Eungnak HAN , James M. BLACKWELL
发明人： Robert L. Bristol , Rami HOURANI , Eungnak HAN , James M. BLACKWELL
IPC分类号： H01L21/768 , H01L23/532 , H01L23/528 , H01L21/02 , H01L21/311
CPC分类号： H01L21/76897 , B81C1/00031 , B81C2201/0149 , H01L21/02118 , H01L21/0271 , H01L21/31051 , H01L21/31127 , H01L21/76822 , H01L21/76834 , H01L23/528 , H01L23/5328 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： A method of an aspect includes forming a directed self assembly alignment promotion layer over a surface of a substrate having a first patterned region and a second patterned region. A first directed self assembly alignment promotion material is formed selectively over the first patterned region without using lithographic patterning. The method also includes forming an assembled layer over the directed self assembly alignment promotion layer by directed self assembly. A plurality of assembled structures are formed that each include predominantly a first type of polymer over the first directed self assembly alignment promotion material. The assembled structures are each adjacently surrounded by predominantly a second different type of polymer over the second patterned region. The first directed self assembly alignment promotion material has a greater chemical affinity for the first type of polymer than for the second different type of polymer.

8. 发明申请

US20150171029A1 INVERSE NANOSTRUCTURE DIELECTRIC LAYERS 审中-公开
标题翻译：反相纳米结构电介质层
公开(公告)号：US20150171029A1
公开(公告)日：2015-06-18
申请号：US14108239
申请日：2013-12-16
申请人： David J. Michalak , James M. Blackwell , Arkaprabha Sengupta
发明人： David J. Michalak , James M. Blackwell , Arkaprabha Sengupta
IPC分类号： H01L23/00 , H01L23/50 , H01L21/02
CPC分类号： H01L21/02282 , H01L21/02203 , H01L21/31144 , H01L21/32 , H01L21/7682 , H01L21/76826 , H01L23/5329 , H01L2221/1047 , H01L2924/0002 , Y10T428/249975 , H01L2924/00
摘要： Embodiments of the present disclosure describe dielectric layers and methods for their fabrication and use. In some embodiments, a dielectric layer may include a dielectric material and a plurality of pores, wherein the dielectric material is arranged in an inverse nanostructure arrangement around the plurality of pores. Other embodiments may be described and/or claimed.
摘要翻译：本公开的实施例描述了用于其制造和使用的电介质层及其方法。在一些实施例中，电介质层可以包括电介质材料和多个孔，其中电介质材料围绕多个孔布置成反向纳米结构布置。可以描述和/或要求保护其他实施例。

9. 发明申请

US20120161295A1 CYCLIC CARBOSILANE DIELECTRIC FILMS 有权
标题翻译：循环碳化硅电介质膜
公开(公告)号：US20120161295A1
公开(公告)日：2012-06-28
申请号：US12978385
申请日：2010-12-23
申请人： David J. Michalak , James M. Blackwell , James S. Clarke
发明人： David J. Michalak , James M. Blackwell , James S. Clarke
IPC分类号： H01L29/06 , H01L21/314
CPC分类号： H01L21/02203 , C07F7/0816 , C07F7/1804 , C09D183/14 , H01L21/02126 , H01L21/02216 , H01L21/02282 , H01L29/0649 , H01L51/0035 , H01L51/0094
摘要： Embodiments of the invention provide dielectric films and low-k dielectric films and methods for making dielectric and low-k dielectric films. Dielectric films are made from carbosilane-containing precursors. In embodiments of the invention, dielectric film precursors comprise attached porogen molecules. In further embodiments, dielectric films have nanometer-dimensioned pores.
摘要翻译：本发明的实施例提供介电膜和低k电介质膜以及用于制造电介质和低k电介质膜的方法。电介质膜由含碳硅烷的前体制成。在本发明的实施方案中，电介质膜前体包含附着的致孔剂分子。在另外的实施例中，电介质膜具有纳米尺寸的孔。

10. 发明授权

US07989280B2 Dielectric interface for group III-V semiconductor device 有权
标题翻译： III-V族半导体器件的介质界面
公开(公告)号：US07989280B2
公开(公告)日：2011-08-02
申请号：US12338839
申请日：2008-12-18
申请人： Justin K. Brask , Suman Datta , Mark L. Doczy , James M. Blackwell , Matthew V. Metz , Jack T. Kavalieros , Robert S. Chau
发明人： Justin K. Brask , Suman Datta , Mark L. Doczy , James M. Blackwell , Matthew V. Metz , Jack T. Kavalieros , Robert S. Chau
IPC分类号： H01L21/336
CPC分类号： H01L21/314 , H01L21/02178 , H01L21/02181 , H01L21/0228 , H01L21/28008 , H01L21/3141 , H01L21/31616 , H01L21/31645 , H01L29/2003 , H01L29/495 , H01L29/513 , H01L29/517 , H01L29/66462 , H01L29/7784
摘要： A Group III-V Semiconductor device and method of fabrication is described. A high-k dielectric is interfaced to a confinement region by a chalcogenide region.
摘要翻译：描述了III-V族半导体器件及其制造方法。高k电介质通过硫族化物区域连接到约束区域。

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