会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 6. 发明授权
    • Method for forming a poly load resistor
    • 多负载电阻的形成方法
    • US5705436A
    • 1998-01-06
    • US703085
    • 1996-08-26
    • Hsien Wei ChinJhon-Jhy Liaw
    • Hsien Wei ChinJhon-Jhy Liaw
    • H01L21/02H01L21/8244
    • H01L28/20H01L27/11
    • A physical implementation and method for achieving it are described for a load resistor and bus line subcircuit such as might be used in an SRAM cell. This was achieved by using two layers of polysilicon. The first polysilicon layer has low resistivity and serves to make effective contact to the drain regions of the FETs involved in the circuit. The second polysilicon layer has high resistivity and is used to form the load resistor as well as the collector bus line and resistor-drain connection. Formation of the latter two objects is achieved by providing a refractory metal underlay to the second polysilicon layer in the appropriate areas and then heating the structure so as to convert said refractory metal to its silicide. This process avoids the use of an ion implantation step during which some encroachment of the ions could occur, thereby retaining good control of the resistor dimensions.
    • 描述了用于实现其的物理实现和方法,用于负载电阻器和总线线路电路,例如可用于SRAM单元。 这是通过使用两层多晶硅来实现的。 第一多晶硅层具有低电阻率并且用于有效接触与电路相关的FET的漏极区域。 第二多晶硅层具有高电阻率,用于形成负载电阻以及集电极母线和电阻 - 漏极连接。 后两个物体的形成是通过在合适的区域中向第二多晶硅层提供难熔金属底层,然后加热该结构以将所述难熔金属转化为其硅化物来实现的。 该过程避免使用离子注入步骤,在该步骤期间可能会发生一些离子侵入,从而保持对电阻器尺寸的良好控制。