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1. 发明授权

US08060800B2 Evaluation circuit and method for detecting and/or locating faulty data words in a data stream Tn 有权
标题翻译：用于检测和/或定位数据流Tn中的故障数据字的评估电路和方法
公开(公告)号：US08060800B2
公开(公告)日：2011-11-15
申请号：US10577288
申请日：2004-10-22
申请人： Michael Goessel , Andreas Leininger , Heinz Mattes , Sebastian Sattler
发明人： Michael Goessel , Andreas Leininger , Heinz Mattes , Sebastian Sattler
IPC分类号： G01R31/28 , G06F11/00
CPC分类号： G01R31/31932 , G01R31/31703
摘要： An evaluation circuit and method for detecting faulty data words in a data stream is disclosed. In one embodiment the evaluation circuit according to the invention includes a first linear automaton circuit and also a second linear automaton circuit connected in parallel, each having a set of states z, which have a common input line for receiving a data stream Tn. The first linear automaton circuit and the second linear automaton circuit are designed such that a first signature and a second signature, respectively, can be calculated. Situated downstream of the two linear automaton circuits are respectively a first logic combination gate and a second logic combination gate, which compare the signature respectively calculated by the linear automaton circuit with a predeterminable good signature and output a comparison value.
摘要翻译：公开了一种用于检测数据流中的错误数据字的评估电路和方法。在一个实施例中，根据本发明的评估电路包括并联连接的第一线性自动机电路和第二线性自动机电路，每个具有一组状态z，其具有用于接收数据流Tn的公共输入线。第一线性自动机电路和第二线性自动机电路被设计成可以分别计算第一签名和第二签名。位于两个线性自动机电路的下游分别是第一逻辑组合门和第二逻辑组合门，其将由线性自动机电路分别计算的签名与可预定的良好签名进行比较并输出比较值。

2. 发明申请

US20070089010A1 Test apparatus for digitized test responses, method for testing semiconductor devices and diagnosis method for a semiconductor device 有权
标题翻译：用于数字化测试响应的测试装置，半导体器件测试方法和半导体器件的诊断方法
公开(公告)号：US20070089010A1
公开(公告)日：2007-04-19
申请号：US11534005
申请日：2006-09-21
申请人： Stephane Kirmser , Heinz Mattes , Sebastian Sattler
发明人： Stephane Kirmser , Heinz Mattes , Sebastian Sattler
IPC分类号： G01R31/28 , G06F11/00
CPC分类号： G01R31/318371 , H03M1/1085 , H03M1/12
摘要： A test apparatus for testing digitized test responses has a generator (2) and a signal extractor (3). The generator (2) uses direct digital synthesis to generate a set of n digital reference signals (xk, yk) which are orthogonal to one another. In this case, n is a natural number greater than 1. The signal extractor (3) contains a test input and a plurality of reference inputs. The test input receives a digitized test response (E) and the reference inputs are connected to the reference signals (xk, yk) which are generated by the generator (2). The signal extractor (3) generates scalar products from a respective reference signal (xk, yk) and the test response (E) and uses said products to calculate whether a combination of reference signals (xk, yk) is contained in the test response (E).
摘要翻译：用于测试数字化测试响应的测试装置具有发生器（2）和信号提取器（3）。发生器（2）使用直接数字合成来产生彼此正交的一组n个数字参考信号（x，k，y，k）。在这种情况下，n是大于1的自然数。信号提取器（3）包含测试输入和多个参考输入。测试输入接收数字化的测试响应（E），并且参考输入连接到由发生器（2）产生的参考信号（x，k，y，k））。信号提取器（3）从相应的参考信号（x k，y k k）和测试响应（E）产生标量积，并且使用所述乘积来计算是否在测试响应（E）中包含参考信号（x，k，y，k）的组合。

3. 发明申请

US20050108311A1 Method and filter arrangement for digital recursive filtering in the time domain 失效
标题翻译：时域中数字递归滤波的方法和滤波器布置
公开(公告)号：US20050108311A1
公开(公告)日：2005-05-19
申请号：US10714811
申请日：2003-11-17
申请人： Heinz Mattes , Peter Gregorius , Paul Lindt
发明人： Heinz Mattes , Peter Gregorius , Paul Lindt
IPC分类号： H03H17/04 , G06F17/10
CPC分类号： H03H17/0223 , H03H17/04
摘要： A method and apparatus for fast digital filtering that requires only filter stages of first and second order. A desired rational filter transfer function is represented as a sum of first and second order intermediate transfer functions. A time dependent input signal is first fed in parallel into a plurality of first and second order intermediate recursive filter stages. Then, the outputs of the intermediate filter stages are summed up to an output filter signal that corresponds to the desired rational filter transfer function. The method and apparatus reduces the amount of calculational effort to the order of O(N), where N denotes the number of sampling points in the time domain, because the digital filtering is based on a discrete recursive convolution in the time domain.
摘要翻译：用于快速数字滤波的方法和装置，其仅需要一阶和二阶滤波器阶段。期望的合理滤波传递函数被表示为第一和第二阶中间传递函数的和。首先将依赖于时间的输入信号并入多个第一和第二阶中间递归滤波器级。然后，将中间滤波器级的输出相加到对应于期望的有理滤波器传递函数的输出滤波器信号。该方法和装置将计算努力的量减少到O（N）的阶数，其中N表示时域中的采样点的数量，因为数字滤波是基于时域中的离散递归卷积。

4. 发明授权

US07720645B2 Test apparatus for digitized test responses, method for testing semiconductor devices and diagnosis method for a semiconductor device 有权
标题翻译：用于数字化测试响应的测试装置，半导体器件测试方法和半导体器件的诊断方法
公开(公告)号：US07720645B2
公开(公告)日：2010-05-18
申请号：US11534005
申请日：2006-09-21
申请人： Stephane Kirmser , Heinz Mattes , Sebastian Sattler
发明人： Stephane Kirmser , Heinz Mattes , Sebastian Sattler
IPC分类号： G01R31/28
CPC分类号： G01R31/318371 , H03M1/1085 , H03M1/12
摘要： A test apparatus for testing digitized test responses has a generator and a signal extractor. The generator uses direct digital synthesis to generate a set of n digital reference signals which are orthogonal to one another. In this case, n is a natural number greater than 1. The signal extractor contains a test input and reference inputs. The test input receives a digitized test response and the reference inputs are connected to the reference signals which are generated by the generator. The signal extractor generates scalar products from a respective reference signal and the test response and uses the products to calculate whether a combination of reference signals is contained in the test response.
摘要翻译：用于测试数字化测试响应的测试装置具有发生器和信号提取器。发生器使用直接数字合成来产生彼此正交的一组n个数字参考信号。在这种情况下，n是大于1的自然数。信号提取器包含测试输入和参考输入。测试输入接收数字化的测试响应，参考输入连接到由发生器产生的参考信号。信号提取器从相应的参考信号和测试响应产生标量产物，并使用产品来计算参考信号的组合是否包含在测试响应中。

5. 发明授权

US07561639B2 Method and device for estimating channel properties of a transmission channel 有权
标题翻译：用于估计传输信道的信道特性的方法和装置
公开(公告)号：US07561639B2
公开(公告)日：2009-07-14
申请号：US10970516
申请日：2004-10-21
申请人： Peter Gregorius , Paul Georg Lindt , Heinz Mattes
发明人： Peter Gregorius , Paul Georg Lindt , Heinz Mattes
IPC分类号： H04L27/06
CPC分类号： H04L47/10
摘要： To estimate physical properties of a wired or wireless transmission channel it is proposed to sample a signal, received via the transmission channel, for example a system response of the corresponding transmission system, in order, on the basis of the sampled values thus obtained, to ascertain the moments of the order 0 . . . n of the received signal. Using these moments of the order 0 . . . n, n parameters of a transmission function of the transmission channel can be determined, wherein the parameters can be polynomial coefficients, zero points or coefficients of a residual notation of the transmission function. Using this transmission function the physical properties of the transmission channel, such as the attenuation and dispersion properties, can be determined exactly or at least approximately assessed.
摘要翻译：为了估计有线或无线传输信道的物理特性，提出了通过传输信道接收的信号，例如相应传输系统的系统响应，以这样获得的采样值为基础确定订单的时刻0。。。 n的接收信号。使用订单0的这些时刻。。。可以确定传输信道的传输函数的n，n个参数，其中参数可以是传输函数的多项式系数，零点或残差符号的系数。使用这种传输功能，传输通道的物理特性，如衰减和色散特性，可以精确地或至少近似评估来确定。

6. 发明授权

US07558991B2 Device and method for measuring jitter 有权
标题翻译：用于测量抖动的装置和方法
公开(公告)号：US07558991B2
公开(公告)日：2009-07-07
申请号：US11440441
申请日：2006-05-25
申请人： Heinz Mattes , Sebastian Sattler
发明人： Heinz Mattes , Sebastian Sattler
IPC分类号： G11B20/20 , G01R31/28 , G01R29/26 , H04B3/26
CPC分类号： H04L1/205 , G01R31/31709 , H04B3/462 , H04B14/044 , H04B17/364 , H04J2203/0062
摘要： A test device contains a data pattern generator for providing a delta-sigma-modulated data stream sampled with a sampling frequency fs at its output. A phase modulator generates a test clock subjected to jitter and having the clock frequency ft at its output. The output of the data pattern generator is connected to a terminal for connection to a data input of a semiconductor component to be tested. The output of the phase modulator is connected to a terminal for connection to a clock input of a semiconductor component to be tested. An evaluation device determines the jitter parameters of the input signal at the input of the data device from the low-frequency component of the input signal. In this case, the low-frequency component contains only frequency components of frequencies which are less than half the sampling frequency fs/2.
摘要翻译：测试装置包含一个数据模式发生器，用于提供在其输出端以采样频率fs采样的Δ-Σ调制数据流。相位调制器产生经受抖动的测试时钟，并在其输出端具有时钟频率ft。数据模式发生器的输出端连接到用于连接到要测试的半导体元件的数据输入端的端子。相位调制器的输出连接到用于连接到要测试的半导体部件的时钟输入的端子。评估装置从输入信号的低频分量确定数据装置的输入处的输入信号的抖动参数。在这种情况下，低频分量仅包含小于采样频率fs / 2的一半的频率的频率分量。

7. 发明授权

US07391349B2 Test apparatus and method for testing analog/digital converters 有权
标题翻译：用于测试模拟/数字转换器的测试设备和方法
公开(公告)号：US07391349B2
公开(公告)日：2008-06-24
申请号：US11692554
申请日：2007-03-28
申请人： Claus Dworski , Heinz Mattes , Sebastian Sattler
发明人： Claus Dworski , Heinz Mattes , Sebastian Sattler
IPC分类号： H03M1/10
CPC分类号： H03M1/1095
摘要： A method for testing AD converters (10) may have the steps of a) producing a digital test signal, b) producing an analog test signal as input signal for the AD converter (10) from the digital test signal, c) producing a sinusoidal, digital reference signal whose frequency is equal to or an integer multiple of the frequency of the analog test signal, d) mixing the test response from the AD converter (10) with the sine and the cosine of the digital reference signal to form mixed signals, e) determining the DC components of the mixed signals, and f) determining at least one of the parameters including amplitude, power components and phase angle for a fundamental or harmonic of the test response from the DC components of the mixed signals.
摘要翻译：用于测试AD转换器（10）的方法可以具有以下步骤：a）产生数字测试信号，b）从数字测试信号产生作为AD转换器（10）的输入信号的模拟测试信号，c）产生正弦曲线数字参考信号，其频率等于或模拟测试信号频率的整数倍; d）将来自AD转换器（10）的测试响应与数字参考信号的正弦和余弦混合形成混合信号 e）确定所述混合信号的DC分量，以及f）确定所述参数中的至少一个，所述参数包括来自所述混合信号的DC分量的所述测试响应的基波或谐波的幅度，功率分量和相位角。

8. 发明授权

US07355414B2 Test apparatus with low-reflection signal distribution 有权
标题翻译：具有低反射信号分布的测试装置
公开(公告)号：US07355414B2
公开(公告)日：2008-04-08
申请号：US11348525
申请日：2006-02-07
申请人： Ralf Arnold , Heinz Mattes , Klaus Standner
发明人： Ralf Arnold , Heinz Mattes , Klaus Standner
IPC分类号： G01R27/04
CPC分类号： G01R31/2841
摘要： A test apparatus includes a signal source that generates a radio-frequency test signal and is connected to the input connection of an arrangement. The arrangement simultaneously supplies an electrical radio-frequency signal to a plurality of receivers and via a plurality of distribution lines. Each distribution line includes an end with an output connection that applies the power-matched test signal to a respective external component.
摘要翻译：测试装置包括产生射频测试信号并连接到装置的输入连接的信号源。该装置同时向多个接收器和多个分配线提供电射频信号。每个分配线包括具有将功率匹配测试信号施加到相应外部组件的输出连接的端点。

9. 发明申请

US20070216555A1 Test Apparatus And Method For Testing Analog/Digital Converters 有权
标题翻译：测试设备和测试模拟/数字转换器的方法
公开(公告)号：US20070216555A1
公开(公告)日：2007-09-20
申请号：US11692554
申请日：2007-03-28
申请人： Claus Dworski , Heinz Mattes , Sebastian Sattler
发明人： Claus Dworski , Heinz Mattes , Sebastian Sattler
IPC分类号： H03M1/10
CPC分类号： H03M1/1095
摘要： A method for testing AD converters (10) may have the steps of a) producing a digital test signal, b) producing an analog test signal as input signal for the AD converter (10) from the digital test signal, c) producing a sinusoidal, digital reference signal whose frequency is equal to or an integer multiple of the frequency of the analog test signal, d) mixing the test response from the AD converter (10) with the sine and the cosine of the digital reference signal to form mixed signals, e) determining the DC components of the mixed signals, and f) determining at least one of the parameters including amplitude, power components and phase angle for a fundamental or harmonic of the test response from the DC components of the mixed signals.
摘要翻译：用于测试AD转换器（10）的方法可以具有以下步骤：a）产生数字测试信号，b）从数字测试信号产生作为AD转换器（10）的输入信号的模拟测试信号，c）产生正弦曲线数字参考信号，其频率等于或模拟测试信号频率的整数倍; d）将来自AD转换器（10）的测试响应与数字参考信号的正弦和余弦混合形成混合信号 e）确定所述混合信号的DC分量，以及f）确定所述参数中的至少一个，所述参数包括来自所述混合信号的DC分量的所述测试响应的基波或谐波的幅度，功率分量和相位角。

10. 发明申请

US20070067129A1 Device and method for testing integrated circuits 有权
标题翻译：集成电路测试装置和方法
公开(公告)号：US20070067129A1
公开(公告)日：2007-03-22
申请号：US10566461
申请日：2004-07-08
申请人： Heinz Mattes , Sebastian Sattler
发明人： Heinz Mattes , Sebastian Sattler
IPC分类号： G01R35/00
CPC分类号： G01R31/2839 , G01R35/005
摘要： A test device and method is disclosed. In one embodiment the test device includes a precision signal generator for generating a test signal, which generator is connected via a respective connecting line to a respective input contact intended for connection to an input of an integrated circuit, and at least one reference signal generator for generating a reference signal. Furthermore, at least one comparator unit is provided for a respective input contact said comparator unit being able to be operated in a test mode. In the test mode, the test signal is compared with the reference signal. The precision signal generator is turned off by the comparator unit if the test signal exceeds or falls below the reference signal.
摘要翻译：公开了一种测试装置和方法。在一个实施例中，测试装置包括用于产生测试信号的精密信号发生器，该发生器经由相应的连接线连接到用于连接到集成电路的输入的相应输入触点，以及至少一个参考信号发生器，产生参考信号。此外，为相应的输入触点提供至少一个比较器单元，所述比较器单元能够在测试模式下操作。在测试模式下，将测试信号与参考信号进行比较。如果测试信号超过或低于参考信号，则比较器单元关闭精密信号发生器。

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