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1. 发明授权

US09698809B1 Systems and methods for analog to digital converter failure identification 有权
公开(公告)号：US09698809B1
公开(公告)日：2017-07-04
申请号：US15213993
申请日：2016-07-19
申请人： Schweitzer Engineering Laboratories, Inc.
发明人： Travis C Mallett
IPC分类号： H03M1/10 , H03M1/12 , H03M3/00
CPC分类号： H03M1/1071 , H03M1/1076 , H03M1/1085 , H03M1/12 , H03M1/1245 , H03M3/458
摘要： Disclosed are systems and methods for identifying and reporting failures of an analog to digital (A/D) conversion system. An A/D conversion system includes a test signal generator configured to generate a test signal including an identifiable characteristic, an A/D converter configured to convert an analog signal measured at an input of the A/D converter to a digital output, and signal injection circuitry configured to inject at least a portion of the test signal from the test signal generator as an injected signal into the analog signal using trace-to-trace crosstalk. A method includes determining whether the digital output generated by the A/D converter indicates the identifiable characteristic.

2. 发明授权

US09160358B2 Close-in tones 有权
标题翻译：接近的色调
公开(公告)号：US09160358B2
公开(公告)日：2015-10-13
申请号：US14656025
申请日：2015-03-12
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Sthanunathan Ramakrishnan , Jawaharlal Tangudu , Sashidharan Venkatraman , Karthik Khanna Subramani , Sreenath Narayanan Potty
IPC分类号： H03M1/06 , H03M1/10 , H03M1/12
CPC分类号： H03M1/1085 , H03M1/1038 , H03M1/1215
摘要： A system can include a close-in tone control configured to detect a set of close-in tones of an interleaved analog to digital converter (IADC) signal and output a trigger signal in response to the detection. The system can also include a close-in tone mismatch estimator configured to determine a correlation and a power estimate for the set of close-in tones in the IADC signal in response to the trigger signal.
摘要翻译：系统可以包括配置成检测交错模数转换器（IADC）信号的一组接近音调的接近音调控制，并且响应于该检测而输出触发信号。该系统还可以包括接近音调失配估计器，其被配置为响应于触发信号来确定IADC信号中的接近音调集合的相关性和功率估计。

3. 发明申请

US20120095713A1 Method of Calibrating Interleaved Digitizer Channels 有权
标题翻译：校准数字转换器通道的方法
公开(公告)号：US20120095713A1
公开(公告)日：2012-04-19
申请号：US12905611
申请日：2010-10-15
申请人： John J. PICKERD
发明人： John J. PICKERD
IPC分类号： G06F15/00
CPC分类号： G01R13/0272 , G01R31/3191 , G01R35/002 , H03M1/0626 , H03M1/1033 , H03M1/1085 , H03M1/1215
摘要： In a multi-channel oscilloscope a method of calibrating interleaved digitizer channels initially calibrates each digitizer channel to produce a bandwidth enhanced filter for each digitizer channel to match the respective channel frequency and phase characteristics. The oscilloscope is then configured for interleaved operation whereby an input signal is applied to at least two digitizers via a switch through a common preamplifier to produce a reference digitizer channel and an interleaved digitizer channel where the bandwidth enhanced filter for the interleaved digitizer channel is now not correct. Fast Fourier transforms are performed on the data from the reference digitizer channel and the interleaved digitizer channel, from which are derived a match filter for the interleaved digitizer channel so the interleaved digitizer channel and reference digitizer channel are matched in phase and magnitude at all frequencies.
摘要翻译：在多通道示波器中，校准交错数字转换器通道的方法最初校准每个数字转换器通道以产生用于每个数字转换器通道的带宽增强滤波器，以匹配相应的通道频率和相位特性。然后将示波器配置成用于交错操作，由此通过公共前置放大器经由开关将输入信号施加到至少两个数字转换器，以产生参考数字转换器通道和交错数字转换器通道，其中用于交错数字转换器通道的带宽增强滤波器现在不是正确。对来自参考数字转换器通道和交错数字转换器通道的数据执行快速傅立叶变换，从而从交错数字转换器通道导出匹配滤波器，使得交织的数字转换器通道和参考数字转换器通道在所有频率的相位和幅度上匹配。

4. 发明授权

US07864089B2 Fast fourier transformation-based analog-to-digital converter calibration system 有权
标题翻译：基于快速傅立叶变换的模数转换器校准系统
公开(公告)号：US07864089B2
公开(公告)日：2011-01-04
申请号：US12574772
申请日：2009-10-07
申请人： Shuenn-Yuh Lee , Ming-Chun Liang
发明人： Shuenn-Yuh Lee , Ming-Chun Liang
IPC分类号： H03M1/06
CPC分类号： H03M1/1033 , H03M1/0695 , H03M1/1085 , H03M1/44
摘要： The present invention discloses an FFT-based ADC calibration system able to solve the problems of capacitor mismatch and finite Op-Amp open loop gain, which result in that the radix of the gain of each stage is not exactly equal to 2. The present invention uses an FFT processor to calculate the real radix of each stage and uses a digital method to generate new digital outputs. As the present invention can compensate the finite gain of Op-Amp, the specification of Op-Amp is not so critical in designing ADC. Therefore, the low-gain Op-Amp can be used to reduce the power consumption of ADC. Further, the FFT-based calibration technology can considerably promote the performance of ADC.
摘要翻译：本发明公开了一种能够解决电容器失配和有限运算放大器开环增益问题的基于FFT的ADC校准系统，这导致每级增益的基数不完全等于2.本发明使用FFT处理器来计算每个阶段的实数，并使用数字方法生成新的数字输出。由于本发明可以补偿Op-Amp的有限增益，Op-Amp的规范在设计ADC时并不重要。因此，低增益运算放大器可用于降低ADC的功耗。此外，基于FFT的校准技术可以显着提高ADC的性能。

5. 发明授权

US07425908B2 Method of generating a digital signal that is representative of match errors in an analog digital conversion system with the time interleaving, and an analog digital converter with time interleaving using same 失效
标题翻译：在具有时间交织的模拟数字转换系统中生成代表匹配误差的数字信号的方法，以及具有使用其的时间交织的模拟数字转换器
公开(公告)号：US07425908B2
公开(公告)日：2008-09-16
申请号：US10581549
申请日：2004-11-30
申请人： Patrick Gremillet
发明人： Patrick Gremillet
IPC分类号： H03M1/10
CPC分类号： H03M1/1052 , H03M1/1085 , H03M1/1215
摘要： A method for generating a digital signal representative of the pairing error between the channels of an analog digital conversion system with time interleaving, and a method for suppressing the errors thus calculated and an analog digital conversion system with time interleaving using same. The method comprises determining a spectrum (11-12) of the digital signal as a function of a frequency response of the analog digital conversion system with time interleaving (CAN 10) to at least one analog calibration signal (IC), and generating a “comb” signal whose spectrum is composed of frequency lines kFs/N, where Fs is a sampling frequency and N a number of channels of the analog digital conversion system with time interleaving, and whose amplitude is dependent on the frequency response of the analog digital converter.
摘要翻译：一种用于产生代表模拟数字转换系统的信道与时间交织之间的配对误差的数字信号的方法以及用于抑制如此计算的误差的方法和使用其的时间交织的模拟数字转换系统。该方法包括根据随时间交织（CAN 10）至少一个模拟校准信号（IC）的模拟数字转换系统的频率响应来确定数字信号的频谱（11-12），并产生“ 梳状“信号，其频谱由频率线kFs / N组成，其中Fs是采样频率，N是具有时间交织的模拟数字转换系统的通道数，并且其幅度取决于模拟数字转换器的频率响应。

6. 发明申请

US20050219091A1 Time-interleaved samplers 有权
标题翻译：时间交错采样器
公开(公告)号：US20050219091A1
公开(公告)日：2005-10-06
申请号：US10518896
申请日：2003-06-24
申请人： John Wood , Nigel Coote
发明人： John Wood , Nigel Coote
IPC分类号： H03M1/12 , H03M1/10
CPC分类号： H03M1/1085 , H03M1/1038 , H03M1/1215
摘要： This invention relates to a method of calibrating a time-interleaved analogue-to-digital sampler (10) and to a method of performing analogue-to-digital conversion with a sampler (10) so calibrated. The invention provides a method of calibrating a sampler (10) comprising N time-interleaved ADCs (12a-d), the method comprising the steps of: (a) injecting in turn N calibration signals (13) into the sampler such that each calibration signal (13) occupies one of N related frequencies; (b) determining the input signal for each one of the N calibration frequencies (13); (c) measuring in the frequency domain the output at each of the N related frequencies for each one of the N calibration frequencies; and (d) determining the relationship that relates the input signal to the output at each of the N related frequencies for each one of the N calibration frequencies.
摘要翻译：本发明涉及一种校准时间交织的模拟数字采样器（10）的方法，以及一种如此校准的采样器（10）执行模数转换的方法。本发明提供了一种校准包括N个时间交错ADC（12 ad）的采样器（10）的方法，所述方法包括以下步骤：（a）将N个校准信号（13）再次注入到采样器中，使得每个校准信号（13）占N个相关频率之一; （b）确定N个校准频率（13）中的每一个的输入信号; （c）在频域中测量N个校准频率中的每一个的N个相关频率中的每一个处的输出; 以及（d）确定在N个校准频率中的每个N个相关频率中的每一个处确定将输入信号与输出相关联的关系。

7. 发明授权

US06476742B2 Evaluation system for analog-digital or digital-analog converter 失效
标题翻译：模拟数字或数模转换器的评估系统
公开(公告)号：US06476742B2
公开(公告)日：2002-11-05
申请号：US09925230
申请日：2001-08-08
申请人： Takahiro Yamaguchi
发明人： Takahiro Yamaguchi
IPC分类号： H03M110
CPC分类号： H03M1/1085 , H03M1/1095 , H03M1/12 , H03M1/66
摘要： There is provided an evaluation system for an A-D converter or a D-A converter capable of evaluating factors of a compounded fault and measuring an effective number of bits with a high accuracy and with a reduced volume of computation, independently of a testing frequency. A sine wave signal is applied to an A-D converter under test. Maximal or minimal values of a cosine wave component and a sine wave component in the converted output are aligned. A square root of a sum of squares of samples is formed to determine an instantaneous amplitude. The amplitude of the sine wave signal is interleaved into the series of instantaneous amplitudes. A difference series for the interleaved instantaneous amplitude series is formed by digital moving differentiator means. Alternatively, a Wavelet transform is applied to the interleaved instantaneous amplitude series, and a maximum amplitude therein is detected by a peak finder, and the detected value is delivered as representing an estimated effective number of bits.
摘要翻译：提供了一种用于A-D转换器或D-A转换器的评估系统，其能够独立于测试频率，以高精度和低体积的计算来评估复合故障的因素并测量有效位数。正弦波信号被施加到被测试的A-D转换器。转换输出中余弦波分量和正弦波分量的最大或最小值对齐。形成样本平方和的平方根以确定瞬时振幅。正弦波信号的振幅被交织成一系列瞬时振幅。通过数字移动微分器装置形成交错瞬时幅度系列的差分序列。或者，将小波变换应用于交错的瞬时幅度序列，并且其中的最大幅度由峰值寻找器检测，并且将检测到的值作为表示估计的有效位数来传送。

8. 发明授权

US06326909B1 Evaluation system for analog-digital or digital-analog converter 有权
标题翻译：模拟数字或数模转换器的评估系统
公开(公告)号：US06326909B1
公开(公告)日：2001-12-04
申请号：US09157272
申请日：1998-09-18
申请人： Takahiro Yamaguchi
发明人： Takahiro Yamaguchi
IPC分类号： H03M110
CPC分类号： H03M1/1085 , H03M1/1095 , H03M1/12 , H03M1/66
摘要： There is provided an evaluation system for an A-D converter or a D-A converter capable of evaluating factors of a compounded fault and measuring an effective number of bits with a high accuracy and with a reduced volume of computation, independently of a testing frequency. A sine wave signal is applied to an A-D converter under test. Maximal or minimal values of a cosine wave component and a sine wave component in the converted output are aligned. A square root of a sum of squares of samples is formed to determine an instantaneous amplitude. The amplitude of the sine wave signal is interleaved into the series of instantaneous amplitudes. A difference series for the interleaved instantaneous amplitude series is formed by digital moving differentiator means. Alternatively, a Wavelet transform is applied to the interleaved instantaneous amplitude series, and a maximum amplitude therein is detected by a peak finder, and the detected value is delivered as representing an estimated effective number of bits.
摘要翻译：提供了一种用于A-D转换器或D-A转换器的评估系统，其能够独立于测试频率，以高精度和低体积的计算来评估复合故障的因素并测量有效位数。正弦波信号被施加到被测试的A-D转换器。转换输出中余弦波分量和正弦波分量的最大或最小值对齐。形成样本平方和的平方根以确定瞬时振幅。正弦波信号的振幅被交织成一系列瞬时振幅。通过数字移动微分器装置形成交错瞬时幅度系列的差分序列。或者，将小波变换应用于交错的瞬时幅度序列，并且其中的最大幅度由峰值寻找器检测，并且将检测到的值作为表示估计的有效位数来传送。

9. 发明公开

US20240313795A1 REAL-EQUIVALENT-TIME OSCILLOSCOPE AND WIDEBAND REAL-TIME SPECTRUM ANALYZER 审中-公开
公开(公告)号：US20240313795A1
公开(公告)日：2024-09-19
申请号：US18591468
申请日：2024-02-29
申请人： Tektronix, Inc.
发明人： Kan Tan
IPC分类号： H03M1/10
CPC分类号： H03M1/108 , H03M1/1014 , H03M1/1085
摘要： A test and measurement instrument includes one or more channels to receive a signal under test, each channel comprising an input port, a filter, and a sampler, at least one analog-to-digital converter (ADC), the at least one ADC having two pipes connected to the sampler of one of the one or more channels, the at least one ADC to produce digital samples of the signal at a sample rate, and one or more processors configured to execute code that causes the one more processors to acquire a spectrum of the digital samples for each pipe in the at least one ADC, and use the spectrums of the digital samples for each pipe in the at least one ADC to reconstruct the spectrum of the signal under test. A method of operating a test and measurement instrument, and a method a method of calibrating a test and measurement instrument is included.

10. 发明授权

US10630306B2 Method and system for spectral leakage removal in DAC testing 有权
公开(公告)号：US10630306B2
公开(公告)日：2020-04-21
申请号：US14482861
申请日：2014-09-10
申请人： Advantest (Singapore) Pte. Ltd.
发明人： Ming Lu
IPC分类号： H03M1/10 , G01R35/00 , H03M1/66
CPC分类号： H03M1/1085 , G01R35/005 , H03M1/66
摘要： System and method for processing a signal sampled from an output of a digital-analog converter. The method comprises: (a) transforming the input signal from time domain to frequency domain to obtain a signal having a plurality of bins; (b) estimating properties of a largest amplitude bin, except for direct current (DC) bin, in the input signal; (c) performing signal reconstruction in time domain based on the estimated properties to generate a reconstructed signal; (d) subtracting the estimated signal from the input signal to get a residual signal; (e) repeating steps (a)-(d) till a predetermined number of bins have been processed; (f) adding all the reconstructed signals and the last residual signal together to generate a sum signal; and (g) transforming the sum signal from the time domain to the frequency domain.

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