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1. 发明公开

US20230415959A1 Scent Indicators on Containers 审中-公开
公开(公告)号：US20230415959A1
公开(公告)日：2023-12-28
申请号：US17809349
申请日：2022-06-28
申请人： Barry Davis , Ansley Dunning
发明人： Barry Davis , Ansley Dunning
IPC分类号： B65D23/14 , B65D25/20 , B65D75/58 , A45D34/00 , B65D75/54
CPC分类号： B65D23/14 , B65D25/205 , B65D75/5805 , A45D34/00 , B65D75/54 , A45D2034/002
摘要： A device has a container containing scented substance. The container has a shroud coupled to an outside surface of the container. Further, the device has a scented piece that is covered by the shroud such that a customer grasps the shroud and pulls the shroud from the scented piece so that the customer can smell a scent emanating from the scented piece.

2. 发明申请

US20070065788A1 Method for developing a curriculum 审中-公开
标题翻译：制定课程的方法
公开(公告)号：US20070065788A1
公开(公告)日：2007-03-22
申请号：US11231163
申请日：2005-09-20
申请人： Barry Davis , Mark Scullard , Susanne Kukkonen , Jeffrey Sugerman
发明人： Barry Davis , Mark Scullard , Susanne Kukkonen , Jeffrey Sugerman
IPC分类号： G09B19/00
CPC分类号： G09B5/00
摘要： A method for developing a training curriculum from a pre-existing library of materials is provided. The method comprises: controlling selection of at least one set-up module from the pre-existing library; controlling selection of at least one closing module from the pre-existing library; and controlling selection of at least one insight module from the pre-existing library, wherein each insight module is sequence independent of the others. The method further comprises combining the set-up, closing and insight modules into a predefined set of learning materials.
摘要翻译：提供了一种从先前存在的材料库开发培训课程的方法。该方法包括：控制从先前存在的库中选择至少一个建立模块; 控制从先前存在的库中选择至少一个关闭模块; 以及控制从先前存在的库中选择至少一个洞察模块，其中每个洞察模块是与其他库独立的序列。该方法还包括将设置，关闭和洞察模块组合成预定义的一组学习材料。

3. 发明授权

US5925099A Method and apparatus for transporting messages between processors in a multiple processor system 失效
公开(公告)号：US5925099A
公开(公告)日：1999-07-20
申请号：US490651
申请日：1995-06-15
申请人： William T. Futral , Elliot Garbus , Barry Davis
发明人： William T. Futral , Elliot Garbus , Barry Davis
IPC分类号： G06F13/10 , G06F13/12 , G06F13/40 , G06F13/00
CPC分类号： G06F13/126 , G06F13/4059
摘要： A message unit that provides a hardware queue interface between a host processor and a local processor handling I/O operations in an I/O platform. Circuitry manages the head and tail pointers of an inbound free queue, an inbound post queue, an outbound free queue and an outbound post queue. Circuitry is also provided for enabling a host processor or bus agent to access these queues in a single bus transaction by reading or writing inbound port registers or outbound port registers. The queue elements contain handles of message buffers. The invention automatically performs the specific task of locating the next element in a queue, altering that element, and modifying a queue descriptor (i.e., a head or a tail pointer) to indicate the next element for a next queue access. A plurality of registers are used for selectively interrupting either the host processor or the local processor when the queues are written to by either the host processor, a bus agent, or the local processor.

4. 发明授权

US06173344B2 SCSI bus transceiver and method for making the same 失效
标题翻译： SCSI总线收发器及其制作方法
公开(公告)号：US06173344B2
公开(公告)日：2001-01-09
申请号：US09085671
申请日：1998-05-27
申请人： Abdul Waheed Mohammed , Peter K. Cheung , Barry Davis , Christopher Burns
发明人： Abdul Waheed Mohammed , Peter K. Cheung , Barry Davis , Christopher Burns
IPC分类号： G06F1300
CPC分类号： G06F13/4072
摘要： Disclosed is a SCSI host adapter for use in a computer system. The SCSI host adapter is configured to provide the computer system with interconnection with internal and/or external target devices. The SCSI host adapter includes a low voltage differential connector for interconnecting to a low voltage differential bus, and the low voltage differential bus is configured to communicate a first transaction. The SCSI host adapter also includes a single ended connector for interconnecting to a single ended bus, and the single ended bus is configured to communicate a second transaction. Furthermore, the SCSI host adapter includes a transceiver unit that is configured to interface between the low voltage differential bus and the single ended bus and produce a target information signal. The target information signal is configured to indicate whether the first transaction or the second transaction is occurring between the SCSI host adapter and the low voltage differential bus or the single ended bus.
摘要翻译：公开了一种用于计算机系统的SCSI主机适配器。 SCSI主机适配器被配置为向计算机系统提供与内部和/或外部目标设备的互连。 SCSI主机适配器包括用于互连到低电压差分总线的低压差分连接器，并且低电压差分总线被配置为传送第一事务。 SCSI主机适配器还包括用于互连到单端总线的单端连接器，并且单端总线被配置为传送第二事务。此外，SCSI主机适配器包括收发器单元，其被配置为在低电压差分总线和单端总线之间进行接口并产生目标信息信号。目标信息信号被配置为指示在SCSI主机适配器和低电压差分总线或单端总线之间是否发生第一事务或第二事务。

5. 发明授权

US5793992A Method and apparatus for arbitrating access to main memory of a computer system 失效
标题翻译：用于仲裁访问计算机系统的主存储器的方法和装置
公开(公告)号：US5793992A
公开(公告)日：1998-08-11
申请号：US664107
申请日：1996-06-13
申请人： James C. Steele , Barry Davis , Philip Wszolek , Brian Fall , Swaroop Adusumilli , David Cassetti , Rodney Pesavento , Nick Richardson
发明人： James C. Steele , Barry Davis , Philip Wszolek , Brian Fall , Swaroop Adusumilli , David Cassetti , Rodney Pesavento , Nick Richardson
IPC分类号： G06F13/16 , G06F13/40 , G06F13/00 , G06F13/362
CPC分类号： G06F13/1605 , G06F13/4027 , G06F13/4031
摘要： A computer system in which a host bus is relieved from the burdens of data transfers between main memory and devices connected to an input/output (I/O) bus (e.g., peripheral devices). Instead, the invention operates to place most of the burden of the data transfer on an internal bus within a bus arbitration unit so that the host bus is freed up much sooner than conventionally achieved. Further, to reduce stalling of a processor seeking access to the main memory via the host bus and the internal bus, the host bus is able to gain access to the main memory using the internal bus during times in which the internal bus is temporarily not needed by the data transfer between the main memory and the peripheral devices. As a result, the computer system has substantially better performance because the host bus is available for other processing operations instead of being tied up with data transfers with peripheral devices, and because the internal bus is occasionally freed up during the data transfer between the main memory and the peripheral devices.
摘要翻译：一种计算机系统，其中主机总线从连接到输入/输出（I / O）总线（例如，外围设备）的主存储器和设备之间的数据传输负担中减轻。相反，本发明操作来将数据传输的大部分负担置于总线仲裁单元内的内部总线上，使得主机总线比传统实现更早地释放。此外，为了减少寻求通过主机总线和内部总线访问主存储器的处理器的停止，主总线能够在暂时不需要内部总线的时间期间使用内部总线来访问主存储器通过主存储器和外围设备之间的数据传输。因此，由于主机总线可用于其他处理操作，而不是与外围设备的数据传输相关联，因此内部总线在主存储器之间的数据传输期间偶尔被释放，因此计算机系统具有显着更好的性能和外围设备。

6. 发明申请

US20050285407A1 Hydro turbine generator 失效
标题翻译：水轮发电机
公开(公告)号：US20050285407A1
公开(公告)日：2005-12-29
申请号：US10489642
申请日：2002-09-16
申请人： Barry Davis , Emmanuel Grillos , Stephen Allison
发明人： Barry Davis , Emmanuel Grillos , Stephen Allison
IPC分类号： F03B3/04 , F03B3/12 , F03B3/18 , F03B11/08 , F03B13/00 , F03B13/08 , F03B13/10 , F03B13/26 , F03B17/06 , F03D1/00 , H02K7/18 , H02K16/00 , H02P9/04
CPC分类号： F03B3/128 , F03B13/083 , F03B13/10 , F03B13/264 , F03B17/061 , F05B2210/16 , F05B2210/404 , F05B2220/7066 , F05B2220/7068 , F05B2240/133 , F05B2240/93 , F05B2240/97 , F05B2260/63 , Y02E10/223 , Y02E10/28
摘要： An apparatus is disclosed for a turbine for generating electrical power from water or air flow comprising at least one rotor disk having a plurality of hydrofoil blades, a guide vanes, a cylindrical housing, and a generator means. A rim generator comprising a magnet race rotor rim and fixed stator coils in the housing is used. The apparatus is fitted with a screen to stop the ingress of debris and marine life, and a skirt augmenter device to reduce the Betz effect. The apparatus is preferably for sub-sea deployment and driven by tidal currents, but may be powered by river current or wave driven air or by wind. The apparatus may be deployed on at least one telescoping pole, tethered to the sea-bed and kept buoyant by buoyant concrete in the housing, inserted in a dam, under a barge or in a tidal power array.
摘要翻译：公开了一种用于从水或空气流产生电力的涡轮的装置，包括具有多个水翼叶片，导向叶片，圆柱形壳体和发电机装置的至少一个转子盘。使用包括磁体座圈转子轮辋和壳体中的固定定子线圈的轮辋发生器。该装置配有屏幕以阻止碎片和海洋生物的进入，以及一个裙子增强装置，以减少Betz效应。该装置优选用于海底部署并由潮汐流驱动，但可由河流或波浪驱动的空气或风力驱动。该装置可以部署在至少一个伸缩杆上，拴在海床上，并通过在壳体内的浮力混凝土保持浮力，插入坝中，在驳船下或潮汐力阵列中。

7. 发明授权

US06754581B1 Air travel information and computer data compilation, retrieval and display method and system 失效
标题翻译：航空旅行信息和计算机数据汇编，检索和显示方法及系统
公开(公告)号：US06754581B1
公开(公告)日：2004-06-22
申请号：US10004671
申请日：2001-12-04
申请人： Scott Blachowicz , Larry Brasfield , Feng Chen , Roberto Cormack , Barry Davis , Rose Dossett , David Helms , Dennis Howard , John Legh-Page , Craig Paynter , Randy Robertson , Jim Rouse
发明人： Scott Blachowicz , Larry Brasfield , Feng Chen , Roberto Cormack , Barry Davis , Rose Dossett , David Helms , Dennis Howard , John Legh-Page , Craig Paynter , Randy Robertson , Jim Rouse
IPC分类号： G01C2100
CPC分类号： G08G5/0043 , G01C21/00 , G01C23/00 , G08G5/0095
摘要： A system, method, and computer program is disclosed for managing integrated real-time information about air flight trips, providing that information to multiple users, and receiving feedback from multiple users. A plurality of user interfaces are provided for displaying a plurality of types of information about a real time progress air trips as planned by an operational center. A communication channel is provided for receiving feedback information from the users and associating that feedback with a particular aspect of the trip.
摘要翻译：公开了一种系统，方法和计算机程序，用于管理关于空中飞行旅行的集成实时信息，向多个用户提供信息，并且从多个用户接收反馈。提供多个用户界面，用于显示关于由操作中心计划的实时进度空中旅行的多种类型的信息。提供通信信道用于从用户接收反馈信息并将该反馈与行程的特定方面相关联。

8. 发明授权

US06473915B1 Hydrotherapy pool 失效
标题翻译：水疗池
公开(公告)号：US06473915B1
公开(公告)日：2002-11-05
申请号：US09878678
申请日：2001-06-11
申请人： Barry Davis , William A. Stern
发明人： Barry Davis , William A. Stern
IPC分类号： A47K302
CPC分类号： A47K3/006 , A61H33/0087 , A61H33/601 , A61H33/6068 , A61H2201/0157
摘要： A hydrotherapy pool comprising an enclosure for receiving a patient and for holding a quantity of liquid sufficient for immersing the patient so that the patient receives hydrotherapy, the enclosure having a plurality of openings for facilitating entry and exit from the enclosure; a removable door for each opening; a water tight seal for each door for sealing the door to the enclosure so that water does not leak from the enclosure; and a filling and draining system for filling and draining the enclosure of water. A seating area at a first end of the pool. The pool may have three doors, the doors being disposed with respect to the patient when seated in the seating area facing the patient, to the right of the patient, and to the left of the patient. Each door may comprise a panel having a shape corresponding to the openings; a seal disposed about the periphery of the panel; at least one locking mechanism for urging the seal into contact with a portion of the enclosure associated with the opening so that the seal is trapped between the door and that portion.
摘要翻译：一种水疗池，其包括用于接收患者的外壳并且用于保持足以浸入患者的量的液体，使得患者接受水疗，所述外壳具有多个开口以便于从外壳进入和离开; 每个开口的可拆卸门; 每个门的密封密封，用于将门密封到外壳，使得水不会从外壳泄漏; 以及用于填充和排放水的外壳的填充和排水系统。泳池第一端的休息区。游泳池可以具有三个门，当坐在面向患者的座位区域中时，门被安置在患者身体的右侧，并且位于患者的左侧。每个门可以包括具有对应于开口的形状的面板; 围绕所述面板的周边布置的密封件; 至少一个锁定机构，用于推动密封件与与开口相关联的外壳的一部分接触，使得密封件被捕获在门和该部分之间。

9. 发明授权

US6134619A Method and apparatus for transporting messages between processors in a multiple processor system 失效
标题翻译：用于在多处理器系统中的处理器之间传送消息的方法和装置
公开(公告)号：US6134619A
公开(公告)日：2000-10-17
申请号：US324744
申请日：1999-06-03
申请人： William T. Futral , Elliot Garbus , Barry Davis
发明人： William T. Futral , Elliot Garbus , Barry Davis
IPC分类号： G06F13/10 , G06F13/12 , G06F13/40 , G06F13/00
CPC分类号： G06F13/126 , G06F13/4059
摘要： A message unit that provides a hardware queue interface between a host processor and a local processor handling I/O operations in an I/O platform. Circuitry manages the head and tail pointers of an inbound free queue, an inbound post queue, an outbound free queue and an outbound post queue. Circuitry is also provided for enabling a host processor or bus agent to access these queues in a single bus transaction by reading or writing inbound port registers or outbound port registers. The queue elements contain handles of message buffers. The invention automatically performs the specific task of locating the next element in a queue, altering that element, and modifying a queue descriptor (i.e., a head or a tail pointer) to indicate the next element for a next queue access. A plurality of registers are used for selectively interrupting either the host processor or the local processor when the queues are written to by either the host processor, a bus agent, or the local processor.
摘要翻译：在主机处理器和处理I / O平台I / O操作的本地处理器之间提供硬件队列接口的消息单元。电路管理入站空闲队列，入站发布队列，出站空闲队列和出站发布队列的头尾指针。还提供电路，用于使主处理器或总线代理能够通过读或写入端口寄存器或出站端口寄存器来访问单总线事务中的这些队列。队列元素包含消息缓冲区的句柄。本发明自动执行将下一个元素定位在队列，改变该元素以及修改队列描述符（即，头部或尾部指针）以指示下一个队列访问的下一个元素的特定任务。当队列由主处理器，总线代理或本地处理器写入时，多个寄存器用于选择性地中断主机处理器或本地处理器。

10. 发明授权

US5815675A Method and apparatus for direct access to main memory by an I/O bus 失效
标题翻译：通过I / O总线直接访问主存储器的方法和装置
公开(公告)号：US5815675A
公开(公告)日：1998-09-29
申请号：US670273
申请日：1996-06-13
申请人： James C. Steele , Barry Davis , Philip Wszolek , Brian Fall , Swaroop Adusumilli , David Cassetti , Rodney Pesavento , Nick Richardson
发明人： James C. Steele , Barry Davis , Philip Wszolek , Brian Fall , Swaroop Adusumilli , David Cassetti , Rodney Pesavento , Nick Richardson
IPC分类号： G06F12/08 , G06F13/16
CPC分类号： G06F13/161 , G06F12/0835
摘要： A computer system in which a host bus is relieved from the burdens of data transfers between main memory and devices connected to an input/output (I/O) bus. Instead, the invention operates to place most of the burden of the data transfer on an internal bus within a bus arbitration unit so that the host bus is freed up much sooner than conventionally achieved. As a result, the computer system has substantially better performance because the host bus is available for other processing operations instead of being tied up with data transfers with devices (e.g., peripheral devices) connected to the I/O bus.
摘要翻译：一种计算机系统，其中主机总线从主存储器和连接到输入/输出（I / O）总线的设备之间的数据传输负担中减轻。相反，本发明操作来将数据传输的大部分负担置于总线仲裁单元内的内部总线上，使得主机总线比传统实现更早地释放。因此，由于主机总线可用于其他处理操作，而不是与连接到I / O总线的设备（例如，外围设备）进行数据传输相结合，因此计算机系统具有显着更好的性能。

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