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    • 3. 发明申请
    • RESISTOR ARRANGEMENT AND METHOD OF USE
    • 电阻器布置和使用方法
    • US20130307663A1
    • 2013-11-21
    • US13619225
    • 2012-09-14
    • Alan ROTHAlexander KALNITSKYChien-Chung TSENG
    • Alan ROTHAlexander KALNITSKYChien-Chung TSENG
    • H01C7/10
    • H01C13/02H01C1/16
    • This disclosure relates to a semiconductor device including resistor arrangement including a first resistor electrically connected to a ground voltage and a second resistor in direct physical contact with the first resistor. The second resistor is configured to receive a temperature independent current and the second resistor has thermal properties similar to those of the first resistor. This disclosure also relates to a semiconductor device including a load configured to receive an operating voltage and a voltage source configured to supply the operating voltage. The semiconductor device further includes a resistor arrangement between the load and the voltage source. This disclosure also relates to a method of using a resistor arrangement to calculate an operating current.
    • 本公开涉及包括电阻器装置的半导体器件,该电阻器装置包括电连接到接地电压的第一电阻器和与第一电阻器直接物理接触的第二电阻器。 第二电阻器被配置为接收与温度无关的电流,并且第二电阻器具有与第一电阻器类似的热特性。 本公开还涉及包括被配置为接收工作电压的负载和被配置为提供工作电压的电压源的半导体器件。 半导体器件还包括负载和电压源之间的电阻器配置。 本公开还涉及使用电阻器装置来计算工作电流的方法。
    • 8. 发明申请
    • Level Shifter Design
    • 水平移位器设计
    • US20120235728A1
    • 2012-09-20
    • US13051343
    • 2011-03-18
    • Alan RothYing-Chih HsuJustin ShiEric Soenen
    • Alan RothYing-Chih HsuJustin ShiEric Soenen
    • H03L5/00
    • H03K19/018507H03K3/037
    • A level shifter receives an input voltage signal and produces an output voltage signal. The level shifter includes a first inverter, configured to operate at a potential difference between a first voltage V1 and a second voltage V2. The output from the invert is capacitively coupled to an input of a latch circuit via a capacitor. The capacitor has a first terminal connected to the output terminal of the first inverter, and further has a second terminal. The level shifter has a resistor connected to a third voltage V3 and to the capacitor for tying the input to the latch circuit to a desired voltage. The latch circuit is configured to operate at a potential difference between a fourth voltage V4 and a fifth voltage V5. The latch has an input node connected to the resistor and the capacitor, and further has an output node connected to an output node of the level shifter.
    • 电平移位器接收输入电压信号并产生输出电压信号。 电平移位器包括第一反相器,其被配置为在第一电压V1和第二电压V2之间的电位差下工作。 反相器的输出通过电容电容耦合到锁存电路的输入端。 电容器具有连接到第一反相器的输出端子的第一端子,并且还具有第二端子。 电平移位器具有连接到第三电压V3的电阻器和用于将输入端连接到锁存电路的电容器以达到期望的电压。 闩锁电路被配置为在第四电压V4和第五电压V5之间的电位差下工作。 锁存器具有连接到电阻器和电容器的输入节点,并且还具有连接到电平移位器的输出节点的输出节点。
    • 9. 发明申请
    • Battery Charger Digital Control Circuit and Method
    • 电池充电器数字控制电路及方法
    • US20120194141A1
    • 2012-08-02
    • US13032956
    • 2011-02-23
    • Justin ShiEric SoenenAlan Roth
    • Justin ShiEric SoenenAlan Roth
    • H02J7/00H03M3/00
    • H02J7/0073H02M3/157
    • A digital controlled battery charger comprises a power converter, a voltage sensor, a current senor, a mode selector and a digital controller. The voltage sensor and current sensor detect the voltage of a rechargeable battery and the current flowing through the rechargeable battery respectively. The mode selector selects a feedback signal from either the output of the voltage sensor or the output of the current sensor. The digital controller receives the selected feedback signal and generates a pulse width modulated signal for the power converter. Additionally, the digital controller is capable of dynamically adjusting its coefficients so that the control loop can maintain a stable system when the battery charger operates in different battery charging phases.
    • 数字控制电池充电器包括功率转换器,电压传感器,电流传感器,模式选择器和数字控制器。 电压传感器和电流传感器分别检测可充电电池的电压和流过可充电电池的电流。 模式选择器从电压传感器的输出或电流传感器的输出中选择反馈信号。 数字控制器接收所选择的反馈信号并产生用于功率转换器的脉宽调制信号。 此外,数字控制器能够动态地调整其系数,使得当电池充电器在不同的电池充电阶段中操作时,控制回路可以维持稳定的系统。