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1. 发明授权

US09013341B2 Noise shaping for digital pulse-width modulators 有权
标题翻译：数字脉宽调制器的噪声整形
公开(公告)号：US09013341B2
公开(公告)日：2015-04-21
申请号：US13619034
申请日：2012-09-14
申请人： Eric Soenen , Alan Roth , Martin Kinyua , Justin Shi , Justin Gaither
发明人： Eric Soenen , Alan Roth , Martin Kinyua , Justin Shi , Justin Gaither
IPC分类号： H03M3/00 , H03H17/00
CPC分类号： H03M3/344 , H03H17/00 , H03M3/00 , H03M3/464
摘要： A circuit including an analog-to-digital converter (ADC). The ADC is configured to receive an analog feedback signal and an analog input signal and generate a digital output. The circuit further includes a noise shaper. The noise shaper is configured to truncate the digital output and generate a noise shaper output having a lower number of bits than the digital output, and to shape quantization noise generated during truncation. The circuit further includes a pulse width modulation digital-to-analog converter (PWM DAC). The PWM DAC configured to process the truncated digital output of the noise shaper output and generate a PWM DAC output.
摘要翻译：包括模数转换器（ADC）的电路。 ADC配置为接收模拟反馈信号和模拟输入信号并产生数字输出。电路还包括噪声整形器。噪声整形器被配置为截断数字输出并产生具有比数字输出低的位数的噪声整形器输出，并且形成在截断期间产生的量化噪声。电路还包括脉宽调制数模转换器（PWM DAC）。 PWM DAC被配置为处理噪声整形器输出的截断数字输出并产生PWM DAC输出。

2. 发明申请

US20120146716A1 Apparatus for Controlling Slew Rate 有权
标题翻译：用于控制压摆率的装置
公开(公告)号：US20120146716A1
公开(公告)日：2012-06-14
申请号：US12964412
申请日：2010-12-09
申请人： Justin Shi , Alan Roth , Ying-Chih Hsu , Justin Gaither , Eric Soenen
发明人： Justin Shi , Alan Roth , Ying-Chih Hsu , Justin Gaither , Eric Soenen
IPC分类号： G05F1/10
CPC分类号： H03K17/163 , H02M2001/0029 , H03K2217/0081
摘要： An apparatus for controlling slew rate is coupled to two adjustable voltage rails. The output of the apparatus is coupled to the gate of a switching element. By employing two adjustable voltage rails, the slew rate of the switching element is proportional to the voltage difference between the first adjustable rail and the second adjustable rail. The slew rate control apparatus can be applied to a variety of switching elements including N channel Field Effect Transistors (NFETs), P channel Field Effect Transistors (PFETs), current mode logic circuits and level shifter circuits.
摘要翻译：用于控制转换速率的装置耦合到两个可调电压轨。该装置的输出耦合到开关元件的栅极。通过采用两个可调电压轨道，开关元件的转换速率与第一可调节轨道和第二可调节轨道之间的电压差成比例。压摆率控制装置可以应用于包括N沟道场效应晶体管（NFET），P沟道场效应晶体管（PFET），电流模式逻辑电路和电平移位器电路的各种开关元件。

3. 发明授权

US09236856B2 Apparatus for controlling slew rate 有权
标题翻译：用于控制转换速率的设备
公开(公告)号：US09236856B2
公开(公告)日：2016-01-12
申请号：US12964412
申请日：2010-12-09
申请人： Justin Shi , Alan Roth , Ying-Chih Hsu , Justin Gaither , Eric Soenen
发明人： Justin Shi , Alan Roth , Ying-Chih Hsu , Justin Gaither , Eric Soenen
IPC分类号： H03K5/12 , H03K5/01 , H03K17/16 , H02M1/00
CPC分类号： H03K17/163 , H02M2001/0029 , H03K2217/0081
摘要： An apparatus for controlling slew rate is coupled to two adjustable voltage rails. The output of the apparatus is coupled to the gate of a switching element. By employing two adjustable voltage rails, the slew rate of the switching element is proportional to the voltage difference between the first adjustable rail and the second adjustable rail. The slew rate control apparatus can be applied to a variety of switching elements including N channel Field Effect Transistors (NFETs), P channel Field Effect Transistors (PFETs), current mode logic circuits and level shifter circuits.
摘要翻译：用于控制转换速率的装置耦合到两个可调电压轨。该装置的输出耦合到开关元件的栅极。通过采用两个可调电压轨道，开关元件的转换速率与第一可调节轨道和第二可调节轨道之间的电压差成比例。压摆率控制装置可以应用于包括N沟道场效应晶体管（NFET），P沟道场效应晶体管（PFET），电流模式逻辑电路和电平移位器电路的各种开关元件。

4. 发明授权

US08450990B2 Dynamic control loop for switching regulators 有权
标题翻译：用于开关稳压器的动态控制回路
公开(公告)号：US08450990B2
公开(公告)日：2013-05-28
申请号：US12856918
申请日：2010-08-16
申请人： Justin Shi , Alan Roth , Justin Gaither , Eric Soenen
发明人： Justin Shi , Alan Roth , Justin Gaither , Eric Soenen
IPC分类号： G05F1/575 , G05F1/618
CPC分类号： H02M3/04 , H02M3/156 , H02M2001/0032 , Y02B70/16
摘要： A method of controlling a regulator includes turning on a first driver during a first cycle for a first time period. A second driver is turned on during the first cycle for a second time period. The first and second drivers are off during the first cycle for a third time period. The first time period is adjusted to become an adjusted first time period for a second cycle based on a ratio and a voltage difference between a peak value of the output voltage and a first voltage during the first cycle. The ratio refers to the first time period over the first time period and the second time period.
摘要翻译：一种控制调节器的方法包括在第一周期内第一时间段内打开第一驱动器。第二个驱动程序在第一个周期内打开第二个时间段。第一个和第二个驱动程序在第一个周期内关闭了第三个时间段。基于第一周期期间输出电压的峰值和第一电压之间的比率和电压差，调整第一时间段以变为第二周期的调整后的第一时间段。该比率是指在第一时间段和第二时间段的第一时间段。

5. 发明授权

US08299946B2 Noise shaping for digital pulse-width modulators 有权
标题翻译：数字脉宽调制器的噪声整形
公开(公告)号：US08299946B2
公开(公告)日：2012-10-30
申请号：US12959869
申请日：2010-12-03
申请人： Eric Soenen , Alan Roth , Martin Kinyua , Justin Shi , Justin Gaither
发明人： Eric Soenen , Alan Roth , Martin Kinyua , Justin Shi , Justin Gaither
IPC分类号： H03M3/00
CPC分类号： H03M3/344 , H03H17/00 , H03M3/00 , H03M3/464
摘要： A noise shaper that compares an input signal to a feedback output signal, which is a truncated version of the input signal, and generates the difference between the two signals (i.e., the error). The noise shaper then integrates the errors by adding to the error multiple of its delayed versions, and quantizes the integrated errors in such a way that the spectrum of the quantization noise is shaped toward high frequencies to be removed by a LC low-pass filter used in conjunction with the noise shaper. The low frequency content of the desired signal is mostly unaffected.
摘要翻译：一种噪声整形器，其将输入信号与输入信号的截断形式的反馈输出信号进行比较，并产生两个信号之间的差异（即误差）。然后，噪声整形器通过加上其延迟版本的误差倍数来积分误差，并且量化积分误差，使得量化噪声的频谱朝向高频成形，以通过LC低通滤波器去除结合噪音整形器。所需信号的低频内容大部分不受影响。

6. 发明申请

US20090237966A1 DIGITAL CONTROL OF POWER CONVERTERS 有权
标题翻译：电力转换器的数字控制
公开(公告)号：US20090237966A1
公开(公告)日：2009-09-24
申请号：US12197790
申请日：2008-08-25
申请人： Eric Soenen , Alan Roth , Martin Kinyua , Justin Shi
发明人： Eric Soenen , Alan Roth , Martin Kinyua , Justin Shi
IPC分类号： H02M3/00
CPC分类号： H02M3/1588 , H02M2001/0012 , Y02B70/1466
摘要： A system and method for controlling a power converter is presented. An embodiment comprises an analog differential circuit connected to an analog-to-digital converter, and comparing the digital error signal to at least a first threshold value. If the digital error signal is less than the first threshold value, a pulse is generated to control the power converter. Another embodiment includes multiple thresholds that may be compared against the digital error signal.
摘要翻译：提出了一种用于控制功率转换器的系统和方法。实施例包括连接到模拟 - 数字转换器的模拟差分电路，并将数字误差信号与至少第一阈值进行比较。如果数字误差信号小于第一阈值，则产生脉冲以控制功率转换器。另一实施例包括可与数字误差信号进行比较的多个阈值。

7. 发明申请

US20090237959A1 Digital Control of Power Converters 审中-公开
标题翻译：电力转换器数字控制
公开(公告)号：US20090237959A1
公开(公告)日：2009-09-24
申请号：US12134930
申请日：2008-06-06
申请人： Eric Soenen , Alan Roth , Justin Shi , Martin Kinyua
发明人： Eric Soenen , Alan Roth , Justin Shi , Martin Kinyua
IPC分类号： H02M7/00
CPC分类号： H02M3/1588 , H02M2001/0012 , Y02B70/1466
摘要： A system and method for controlling a power converter is presented. An embodiment comprises an analog differential circuit connected to an analog-to-digital converter, a digital pulse generator, and a pre-driver to control the power converter. Another embodiment also includes a digital filter as part of the control loop that may be used to control the loop characteristics of the control circuit. Yet another embodiment replaces the differential circuit with a sigma-delta analog-to-digital modulator and a decimator.
摘要翻译：提出了一种用于控制功率转换器的系统和方法。实施例包括连接到模拟 - 数字转换器的模拟差分电路，数字脉冲发生器和用于控制功率转换器的预驱动器。另一实施例还包括作为可用于控制控制电路的环路特性的控制环路的一部分的数字滤波器。另一个实施例用Σ-Δ模数转换器和抽取器代替了差分电路。

8. 发明授权

US09479051B2 Single-inductor multiple-output DC to DC converter 有权
标题翻译：单电感多输出DC-DC转换器
公开(公告)号：US09479051B2
公开(公告)日：2016-10-25
申请号：US13340746
申请日：2011-12-30
申请人： Chien-Chung Tseng , Eric Soenen , Alan Roth , Justin Shi
发明人： Chien-Chung Tseng , Eric Soenen , Alan Roth , Justin Shi
IPC分类号： G05F1/577 , H02M3/158 , H02M1/00
CPC分类号： H02M3/158 , H02M2001/009
摘要： A DC to DC converter includes a switching circuit and a controller. The switching circuit includes an inductor coupled to first and second voltage supply nodes and to a plurality of output loads. The controller is configured to monitor a current through the inductor and to selectively couple the inductor to each of the plurality of output loads such that at least one of the following criteria is met: 1) an average current through the inductor is minimized for the particular output loads coupled to the switching circuit, or 2) minimize a number of times the switching circuit is switched during a charging period for the particular output loads coupled to the switching circuit.
摘要翻译： DC-DC转换器包括开关电路和控制器。开关电路包括耦合到第一和第二电压供应节点和耦合到多个输出负载的电感器。控制器被配置为监测通过电感器的电流并且选择性地将电感器耦合到多个输出负载中的每一个，使得满足以下标准中的至少一个：1）通过电感器的平均电流对于特定的耦合到开关电路的输出负载，或2）在耦合到开关电路的特定输出负载的充电周期期间最小化开关电路切换的次数。

9. 发明授权

US08324955B2 Level shifter design 有权
标题翻译：电平移位器设计
公开(公告)号：US08324955B2
公开(公告)日：2012-12-04
申请号：US13051343
申请日：2011-03-18
申请人： Alan Roth , Ying-Chih Hsu , Justin Shi , Eric Soenen
发明人： Alan Roth , Ying-Chih Hsu , Justin Shi , Eric Soenen
IPC分类号： H03L5/00
CPC分类号： H03K19/018507 , H03K3/037
摘要： A level shifter receives an input voltage signal and produces an output voltage signal. The level shifter includes a first inverter, configured to operate at a potential difference between a first voltage V1 and a second voltage V2. The output from the invert is capacitively coupled to an input of a latch circuit via a capacitor. The capacitor has a first terminal connected to the output terminal of the first inverter, and further has a second terminal. The level shifter has a resistor connected to a third voltage V3 and to the capacitor for tying the input to the latch circuit to a desired voltage. The latch circuit is configured to operate at a potential difference between a fourth voltage V4 and a fifth voltage V5. The latch has an input node connected to the resistor and the capacitor, and further has an output node connected to an output node of the level shifter.
摘要翻译：电平移位器接收输入电压信号并产生输出电压信号。电平移位器包括第一反相器，其被配置为在第一电压V1和第二电压V2之间的电位差下工作。反相器的输出通过电容电容耦合到锁存电路的输入端。电容器具有连接到第一反相器的输出端子的第一端子，并且还具有第二端子。电平移位器具有连接到第三电压V3的电阻器和用于将输入端连接到锁存电路的电容器以达到期望的电压。闩锁电路被配置为在第四电压V4和第五电压V5之间的电位差下工作。锁存器具有连接到电阻器和电容器的输入节点，并且还具有连接到电平移位器的输出节点的输出节点。

10. 发明申请

US20130082668A1 SINGLE-INDUCTOR MULTIPLE-OUTPUT DC TO DC CONVERTER 有权
标题翻译：单电感器多路输出直流到直流转换器
公开(公告)号：US20130082668A1
公开(公告)日：2013-04-04
申请号：US13340746
申请日：2011-12-30
申请人： Chien-Chung Tseng , Eric Soenen , Alan Roth , Justin Shi
发明人： Chien-Chung Tseng , Eric Soenen , Alan Roth , Justin Shi
IPC分类号： G05F1/577
CPC分类号： H02M3/158 , H02M2001/009
摘要： A DC to DC converter includes a switching circuit and a controller. The switching circuit includes an inductor coupled to first and second voltage supply nodes and to a plurality of output loads. The controller is configured to monitor a current through the inductor and to selectively couple the inductor to each of the plurality of output loads such that at least one of the following criteria is met: 1) an average current through the inductor is minimized for the particular output loads coupled to the switching circuit, or 2) minimize a number of times the switching circuit is switched during a charging period for the particular output loads coupled to the switching circuit.
摘要翻译： DC-DC转换器包括开关电路和控制器。开关电路包括耦合到第一和第二电压供应节点和耦合到多个输出负载的电感器。控制器被配置为监测通过电感器的电流并且选择性地将电感器耦合到多个输出负载中的每一个，使得满足以下标准中的至少一个：1）通过电感器的平均电流对于特定的耦合到开关电路的输出负载，或2）在耦合到开关电路的特定输出负载的充电周期期间最小化开关电路切换的次数。

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