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1. 发明申请

US20030096499A1 Method for integrated nucleation and bulk film deposition 有权
标题翻译：整体成核和体积薄膜沉积的方法
公开(公告)号：US20030096499A1
公开(公告)日：2003-05-22
申请号：US10012299
申请日：2001-11-13
申请人： CHARTERED SEMICONDUCTORS MANUFACTURED LIMITED
发明人： Guy Eristoff , Sarion C.S. Lee , Liew San Leong , Goh Khoon Meng
IPC分类号： H01L021/44
CPC分类号： H01L21/28556
摘要： An integrated nucleation and bulk deposition process is disclosed for forming a CVD metal film over a semiconductor substrate that has structures formed thereon. In the integrated deposition process of the present invention, nucleation seed deposition and bulk deposition are performed in an integrated and contemporaneous manner. In one embodiment, a reactant gas and a reducing agent gas flow into a pressurized reaction chamber. As the integrated deposition process progresses, pressure and flow of reactant gas are increased while flow of reducing agent gas is decreased. The integrated deposition process of the present invention gives a significant decrease in process time as compared to prior art processes. Moreover, the integrated deposition process of the present invention gives good fill characteristics while providing sufficient protection to underlying structures.
摘要翻译：公开了一种用于在其上形成有结构的半导体衬底上形成CVD金属膜的整体成核和体积沉积工艺。在本发明的集成沉积方法中，成核种子沉积和本体沉积以一体并且同时进行的方式进行。在一个实施方案中，反应气体和还原剂气体流入加压反应室。随着集成沉积过程的进行，反应气体的压力和流量增加，而还原剂气体的流量减少。与现有技术方法相比，本发明的集成沉积方法显着减少了处理时间。此外，本发明的集成沉积方法提供良好的填充特性，同时为下面的结构提供足够的保护。

2. 发明申请

US20030092259A1 Method to fabricate NIM capacitor using damascene process 失效
标题翻译：使用镶嵌工艺制造NIM电容器的方法
公开(公告)号：US20030092259A1
公开(公告)日：2003-05-15
申请号：US10012292
申请日：2001-11-13
申请人： CHARTERED SEMICONDUCTORS MANUFACTURED LIMITED
发明人： Chit Hwei Ng , Chaw Sing Ho
IPC分类号： H01L021/20 , H01L021/4763
CPC分类号： H01L23/5223 , H01L21/768 , H01L27/0805 , H01L28/55 , H01L28/60 , H01L2924/0002 , H01L2924/00
摘要： In one embodiment, the present invention recites forming a number of first openings in a first substrate. The present embodiment then recites forming a copper region within each first openings during a damascene process, wherein each copper region has a top surface. The present embodiment then disposes a dielectric layer proximate to the top surface of each of the first copper regions during the damascene process. After depositing a second substrate over the dielectric, a number of second openings in a second substrate are made. Next, a number of second copper regions are formed in the second openings, during the damascene process. The dielectric region is thus disposed between the first copper regions and the second copper regions. In so doing, the dielectric region forms a dielectric barrier between the first copper regions and the second copper regions such that a metal-insulator-metal (MIM) capacitor is formed during a damascene process.
摘要翻译：在一个实施例中，本发明叙述在第一衬底中形成多个第一开口。然后，本实施例在镶嵌工艺期间在每个第一开口内形成铜区，其中每个铜区具有顶表面。然后，本实施例在镶嵌过程期间将电介质层布置成靠近每个第一铜区域的顶表面。在电介质上沉积第二衬底之后，制成第二衬底中的多个第二开口。接下来，在镶嵌工艺期间，在第二开口中形成多个第二铜区。因此，电介质区域设置在第一铜区域和第二铜区域之间。在这样做时，电介质区域在第一铜区域和第二铜区域之间形成电介质阻挡层，使得在镶嵌工艺期间形成金属 - 绝缘体 - 金属（MIM）电容器。

3. 发明申请

US20030092258A1 Novel light shield cum gap fill scheme for microdisplay backplane fabrication 失效
标题翻译：用于微显示器底板制造的新型遮光罩和间隙填充方案
公开(公告)号：US20030092258A1
公开(公告)日：2003-05-15
申请号：US10012295
申请日：2001-11-13
申请人： CHARTERED SEMICONDUCTORS MANUFACTURED LIMITED
发明人： Xavier Seah Teo Leng
IPC分类号： G02F001/1333 , H01L021/31
CPC分类号： G02F1/136 , G02F1/133553 , G02F1/136209 , G02F1/136277
摘要： A light shield apparatus and formation method for preventing the transmission of incident light towards active devices of the display. In one embodiment, the present invention recites forming a plurality of metal pixels wherein adjacent ones of the plurality of metal pixels have a gap region disposed therebetween. The present embodiment then recites depositing a light absorbing antireflective coating material within the gap region to form a light shield such that transmission of incident light through the gap region towards underlying active devices is reduced. Hence, the present embodiments also reduce problems associated with Liquid Crystal alignment difficulty and passivation integrity (cracking of thin passivation). Next, the present embodiment deposits a thin composite passivation layer above the plurality of metal pixels and the antireflective coating material. As a result, the antireflective coating material disposed in the gap region reduces the transmission of incident light between the metal pixels and towards the active devices of the display and alleviates problems associated with excessive step height between metal pixels.
摘要翻译：一种遮光装置和形成方法，用于防止入射光向显示器的有源装置传播。在一个实施例中，本发明背景形成多个金属像素，其中多个金属像素中相邻的金属像素之间具有间隙区域。然后，本实施例叙述在间隙区域内沉积光吸收抗反射涂层材料以形成光屏蔽，使得通过间隙区域的入射光朝向下面的有源器件的透射减少。因此，本实施例还减少了与液晶取向困难和钝化完整性（薄钝化的破裂）有关的问题。接下来，本实施例在多个金属像素和抗反射涂层材料上沉积薄复合钝化层。结果，设置在间隙区域中的抗反射涂层材料减少了金属像素之间的入射光的透射并朝向显示器的有源器件，并且减轻了与金属像素之间的过度的步长相关的问题。

4. 发明申请

US20030090600A1 Embedded light shield scheme for micro display backplane fabrication 审中-公开
标题翻译：用于微型显示器背板制造的嵌入式光屏蔽方案
公开(公告)号：US20030090600A1
公开(公告)日：2003-05-15
申请号：US10012289
申请日：2001-11-13
申请人： CHARTERED SEMICONDUCTORS MANUFACTURED LIMITED
发明人： Xavier Seah Teo Leng , Chivukula Subrahmanyam
IPC分类号： G02F001/136
CPC分类号： G02F1/136277 , G02F1/136209
摘要： A light shield apparatus and formation method for preventing the transmission of incident light towards active devices of the display. In one embodiment, the present invention recites patterning a second metal layer to form a plurality of second metal structures. The present embodiment also recites depositing an intermetal dielectric layer above the plurality of second metal structures. Subsequently, the present embodiment deposits a light absorbing antireflective coating material above the intermetal dielectric layer to form a light shield followed by another planarized IMD layer such that transmission of incident light towards underlying active devices is reduced. The present embodiment also performs the step of forming a plurality of metal pixels above the antireflective coating material wherein adjacent ones of the plurality of metal pixels have a gap region disposed therebetween. As a result, the antireflective coating material of the present embodiment reduces the transmission of incident light through the gap region between the plurality of metal pixels and towards the active devices of the display.
摘要翻译：一种遮光装置和形成方法，用于防止入射光向显示器的有源装置传播。在一个实施例中，本发明背诵图案化第二金属层以形成多个第二金属结构。本实施例还介绍在多个第二金属结构上方沉积金属间电介质层。随后，本实施例在金属间电介质层之上沉积光吸收抗反射涂层材料，以形成光屏蔽，然后是另一个平坦化的IMD层，使得入射到底层有源器件的入射光的传输减少。本实施例还执行在抗反射涂层材料上方形成多个金属像素的步骤，其中多个金属像素中相邻的金属像素之间具有间隙区域。结果，本实施方式的抗反射涂层材料减少了入射光通过多个金属像素之间的间隙区域并朝向显示器的有源器件的透射。

5. 发明授权

US06899857B2 Method for forming a region of low dielectric constant nanoporous material using a microemulsion technique 有权
标题翻译：使用微乳液技术形成低介电常数纳米多孔材料区域的方法
公开(公告)号：US06899857B2
公开(公告)日：2005-05-31
申请号：US10012298
申请日：2001-11-13
申请人： Soo Choi Pheng , Lap Chan , Wang Cui Yang , Siew Yong Kong , Alex See
发明人： Soo Choi Pheng , Lap Chan , Wang Cui Yang , Siew Yong Kong , Alex See
IPC分类号： C08J9/28 , H01L21/316 , H01L21/768 , C01B33/12 , C03C3/00 , C04B35/14 , C04B38/00
CPC分类号： C08J9/28 , C08J2201/0504 , C08J2383/00 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02282 , H01L21/31695 , H01L21/7682
摘要： A method for forming a region of low dielectric constant nanoporous material is disclosed. In one embodiment, the present method includes the step of preparing a microemulsion. The method of the present embodiment then recites applying the microemulsion to a surface above which it is desired to form a region of low dielectric constant nanoporous material. Next, the present method recites subjecting the microemulsion, which has been applied to the surface, to a thermal process such that the region of low dielectric constant nanoporous material is formed above the surface.
摘要翻译：公开了一种形成低介电常数纳米多孔材料区域的方法。在一个实施方案中，本发明的方法包括制备微乳液的步骤。本实施例的方法然后将微乳液应用于其上希望形成低介电常数纳米多孔材料区域的表面。接下来，本方法叙述了将施加到表面的微乳液进行热处理，使得低介电常数纳米多孔材料的区域形成在表面上方。

6. 发明申请

US20030092281A1 Method for organic barc and photoresist trimming process 审中-公开
标题翻译：有机玻璃和光刻胶修整方法
公开(公告)号：US20030092281A1
公开(公告)日：2003-05-15
申请号：US10012291
申请日：2001-11-13
申请人： CHARTERED SEMICONDUCTORS MANUFACTURED LIMITED
发明人： Pradeep Yelehanka Ramachandramurthy , Jie Yu , Loh Wei Loong , Chen Tong Qing
IPC分类号： H01L021/461 , C23F003/00 , B44C001/22
CPC分类号： H01L21/0276 , G03F7/40 , H01L21/31138
摘要： A method for etching an organic bottom antireflective coating (OBARC) and a photoresist material in a single etching process. The method comprises the steps of etching the OBARC and trimming the photoresist material at the same time in an etching environment using a substantially isotropic etching operation. The etching environment including an etching chamber with a top electrode and a bottom electrode wherein a mixture of abrasive gases can flow therethrough. Using an endpoint detection test to determine when an exposed portion of OBARC has been removed, the exposed portion of OBARC being an area of OBARC without photoresist protection and exposed to the etching environment. Applying an over-etch step to trim the photoresist to a desired dimension where the time of the over-etch step being based on the percentage of an endpoint time and the process condition of the over-etch step being same as that of the endpoint step.
摘要翻译：一种在单次蚀刻工艺中蚀刻有机底部抗反射涂层（OBARC）和光刻胶材料的方法。该方法包括以下步骤：使用基本上各向同性的蚀刻操作在蚀刻环境中同时蚀刻OBARC并修整光致抗蚀剂材料。蚀刻环境包括具有顶部电极和底部电极的蚀刻室，其中磨料气体的混合物可以流过其中。使用端点检测测试来确定OBARC的暴露部分何时被去除，OBARC的暴露部分是无光刻胶保护并暴露于蚀刻环境的OBARC区域。施加过蚀刻步骤以将光致抗蚀剂修剪到期望的尺寸，其中过蚀刻步骤的时间基于终点时间的百分比和过蚀刻步骤的工艺条件与端点步骤的相同。

7. 发明申请

US20030092251A1 Method for forming a region of low dielectric constant nanoporous material using a microemulsion technique 有权
标题翻译：使用微乳液技术形成低介电常数纳米多孔材料区域的方法
公开(公告)号：US20030092251A1
公开(公告)日：2003-05-15
申请号：US10012298
申请日：2001-11-13
申请人： CHARTERED SEMICONDUCTORS MANUFACTURED LIMITED
发明人： Soo Choi Pheng , Lap Chan , Wang Cui Yang , Siew Yong Kong , Alex See
IPC分类号： H01L021/44
CPC分类号： C08J9/28 , C08J2201/0504 , C08J2383/00 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02282 , H01L21/31695 , H01L21/7682
摘要： A method for forming a region of low dielectric constant nanoporous material is disclosed. In one embodiment, the present method includes the step of preparing a microemulsion. The method of the present embodiment then recites applying the microemulsion to a surface above which it is desired to form a region of low dielectric constant nanoporous material. Next, the present method recites subjecting the microemulsion, which has been applied to the surface, to a thermal process such that the region of low dielectric constant nanoporous material is formed above the surface.
摘要翻译：公开了一种形成低介电常数纳米多孔材料区域的方法。在一个实施方案中，本发明的方法包括制备微乳液的步骤。本实施例的方法然后将微乳液应用于其上希望形成低介电常数纳米多孔材料区域的表面。接下来，本方法叙述了将施加到表面的微乳液进行热处理，使得低介电常数纳米多孔材料的区域形成在表面上方。

8. 发明申请

US20030092240A1 METHOD FOR FORMING A REGION OF LOW DIELECTRIC CONSTANT NANOPOROUS MATERIAL 有权
标题翻译：形成低介电常数纳米材料区域的方法
公开(公告)号：US20030092240A1
公开(公告)日：2003-05-15
申请号：US10012294
申请日：2001-11-13
申请人： CHARTERED SEMICONDUCTORS MANUFACTURED LIMITED
发明人： Siew Yong Kong , Alex See , Simon Chooi , Gautam Sarkar
IPC分类号： H01L021/336 , H01L021/76
CPC分类号： H01L21/02126 , H01L21/02118 , H01L21/02203 , H01L21/02282 , H01L21/31695 , H01L21/7682 , H01L23/5329 , H01L2924/0002 , Y10S977/827 , H01L2924/00
摘要： A method for forming a region of low dielectric constant nanoporous material is disclosed. In one embodiment, the present method includes the step of combining a plurality of materials to form a solution. In the present embodiment, the plurality of materials comprising a low dielectric constant material, a pore generator material, and a solvent. In this embodiment, the present method then applies the solution to a surface above which it is desired to form the region of low dielectric constant nanoporous material. Next, the present embodiment subjects the solution, which has been applied to the surface, to a thermal process such that a region of low dielectric constant nanoporous material is formed above the surface.
摘要翻译：公开了一种形成低介电常数纳米多孔材料区域的方法。在一个实施例中，本方法包括组合多种材料以形成溶液的步骤。在本实施例中，包括低介电常数材料，孔发生器材料和溶剂的多种材料。在本实施例中，本方法然后将溶液施加到希望形成低介电常数纳米多孔材料区域的表面上。接下来，本实施例将已经施加到表面的溶液作为热处理，使得在表面上方形成低介电常数纳米多孔材料的区域。

9. 发明申请

US20030092276A1 Method for etching a silicided poly using fluorine-based reactive ion etching and sodium hydroxide based solution immersion 失效
标题翻译：使用氟基反应离子蚀刻和氢氧化钠基溶液浸渍蚀刻硅化物的方法
公开(公告)号：US20030092276A1
公开(公告)日：2003-05-15
申请号：US10012297
申请日：2001-11-13
申请人： CHARTERED SEMICONDUCTORS MANUFACTURED LIMITED
发明人： Song Zhigang , Guo Zhi Rong , Shailesh Redkar , Hua Younan
IPC分类号： H01L021/302 , H01L021/461
CPC分类号： H01L21/32137 , H01L21/32134
摘要： A method for removing a silicide poly on an integrated circuit (IC) chip. Specifically, one embodiment of the present invention discloses a method for exposing a gate oxide layer with a fluorine based reactive ion etching (F-based RIE) process and immersion in a sodium hydroxide based solution. The F-based RIE damages a silicide layer that covers a polysilicon gate layer. Damage to the silicide layer allows for penetration of chemicals to a polysilicon gate layer. Immersion of the IC chip in the sodium hydroxide based solution etches away the polysilicon gate layer and lifts off the silicide layer without altering an underlying gate oxide layer. Also, another embodiment uses a solution including sodium hydroxide and sodium chloride. As such, failure analysis of the gate oxide layer can proceed without concern for damage due to the removal process.
摘要翻译：一种用于去除集成电路（IC）芯片上的硅化物多晶硅的方法。具体地，本发明的一个实施方案公开了一种用氟基反应离子蚀刻（F系RIE）工艺曝光栅极氧化层并浸渍在基于氢氧化钠的溶液中的方法。基于F的RIE损坏覆盖多晶硅栅极层的硅化物层。对硅化物层的损害允许化学品渗透到多晶硅栅极层。将IC芯片浸入基于氢氧化钠的溶液中蚀刻掉多晶硅栅极层并提升硅化物层而不改变下面的栅极氧化物层。此外，另一个实施方案使用包括氢氧化钠和氯化钠的溶液。因此，栅极氧化物层的故障分析可以进行而不用担心由于去除过程造成的损坏。

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