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1. 发明申请

US20040266216A1 Method for improving uniformity in deposited low k dielectric material 审中-公开
标题翻译：提高沉积低k电介质材料均匀性的方法
公开(公告)号：US20040266216A1
公开(公告)日：2004-12-30
申请号：US10828030
申请日：2004-04-20
申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
发明人： Lih-Ping Li , Yung-Chen Lu , Syun-Ming Jang
IPC分类号： H01L021/4763 , H01L021/31 , H01L021/469
CPC分类号： H01L21/76835 , H01L21/3105 , H01L21/76801 , H01L21/76807 , H01L21/76826 , H01L21/76831
摘要： A method for forming a low k dielectric material block is provided. In one example, the method includes depositing a low k dielectric layer over a semiconductor substrate and curing the deposited low k dielectric layer. The curing may be performed using a remote plasma process in which an excitation gas is excited in a selected region remote from the deposited low k dieletric layer to carry radiation energy and transfer to the low k dielectric layer when the excitation gas contacts the low k dielectric layer.
摘要翻译：提供了一种形成低k电介质材料块的方法。在一个示例中，该方法包括在半导体衬底上沉积低k电介质层并固化沉积的低k电介质层。可以使用远程等离子体处理来执行固化，其中在远离沉积的低k薄层的选定区域中激发气体被激发以携带辐射能量并且当激发气体接触低k电介质时传递到低k电介质层层。

2. 发明申请

US20040259385A1 Method of forming insulating film improved in electric insulating property 审中-公开
标题翻译：形成绝缘膜的方法提高了电绝缘性能
公开(公告)号：US20040259385A1
公开(公告)日：2004-12-23
申请号：US10847331
申请日：2004-05-18
申请人： ELPIDA MEMORY, INC. , NEC ELECTRONICS CORPORATION , NEC HIROSHIMA, Ltd.
发明人： Toshihide Takimoto , Shuji Fujiwara , Tsuyoshi Setokubo , Toshiyuki Hirota , Fumiki Aiso
IPC分类号： H01L021/31
CPC分类号： H01L21/0217 , C23C16/345 , H01L21/02211 , H01L21/02271 , H01L21/3185
摘要： A method of forming an insulating film according to the present invention reacts a nitrogen containing gas with a compound composed of silicon and chlorine under the condition that the gas flow ratio of the compound to the nitrogen containing gas is lower than {fraction (1/30)} to form a silicon nitride film. In the present invention, by forming the silicon nitride film at the gas flow ratio lower than {fraction (1/30)}, an insulating film having this silicon nitride film is improved in electric insulating property, so that a smaller leak current flows therethrough.
摘要翻译：根据本发明的形成绝缘膜的方法是使含氮气体与由硅和氯构成的化合物在化合物与含氮气体的气体流量比低于{馏分（1/30 在本发明中，通过以低于{分数（1/30）的气体流量比形成氮化硅膜，使具有该氮化硅膜的绝缘膜的电绝缘性提高，较小的漏电流流过其中。

3. 发明申请

US20040259384A1 Integrated circuit insulator and method 失效
标题翻译：集成电路绝缘子及方法
公开(公告)号：US20040259384A1
公开(公告)日：2004-12-23
申请号：US10634413
申请日：2003-08-05
发明人： Somnath S. Nag , Girish A. Dixit , Srikanth Krishnan
IPC分类号： H01L021/31 , H01L021/469
CPC分类号： H01L21/02164 , H01L21/02131 , H01L21/022 , H01L21/02274 , H01L21/31612 , H01L21/31629 , H01L21/76801
摘要： A two-stage plasma enhance dielectric deposition with a first stage of low capacitively-coupled RF bias with conformal deposition (202) followed by high capacitively-coupled RF bias for planarizing deposition (204) limits the charge build up on the underlying structure (104, 106, 108).
摘要翻译：两阶段等离子体增强具有第一级低电容耦合RF偏压的电介质沉积，其具有适形沉积（202），随后是用于平坦化沉积的高电容耦合RF偏压（204），限制了在下面的结构上的电荷（104），106,108）。

4. 发明申请

US20040259379A1 Low temperature nitridation of silicon 审中-公开
标题翻译：硅的低温氮化
公开(公告)号：US20040259379A1
公开(公告)日：2004-12-23
申请号：US10602194
申请日：2003-06-23
发明人： Yoshi Ono
IPC分类号： H01L021/31 , H01L021/8238 , H01L021/469
CPC分类号： H01L21/02247 , H01L21/0217 , H01L21/3185
摘要： A method of low-temperature nitridation of a silicon substrate includes placing a silicon wafer in a vacuum chamber on a heated chuck; maintaining the silicon wafer at a temperature of between about room temperature and 400null C.; introducing a nitrogen-containing gas into the vacuum chamber; dissociating the nitrogen-containing gas into nitrogen with a excimer lamp and flowing the nitrogen over the silicon wafer; and forming an silicon nitride layer on at least a portion of the silicon wafer.
摘要翻译：硅基板的低温氮化的方法包括将硅晶片放置在加热的卡盘上的真空室中; 将硅晶片保持在约室温至400℃的温度之间; 将真空室中的含氮气体引入; 用准分子灯将含氮气体分解成氮气并使氮气流过硅晶片; 以及在所述硅晶片的至少一部分上形成氮化硅层。

5. 发明申请

US20040253837A1 Method for forming a dielectric layer of a semiconductor 审中-公开
标题翻译：形成半导体电介质层的方法
公开(公告)号：US20040253837A1
公开(公告)日：2004-12-16
申请号：US10457520
申请日：2003-06-10
发明人： Yu-Hao Yang
IPC分类号： H01L021/44 , H01L021/31 , H01L021/469
CPC分类号： H01L21/76819 , H01L21/02282 , H01L21/31695 , H01L21/76837
摘要： A method for forming a dielectric layer of a semiconductor is described. At first, providing a substrate with a metal-conductive layer having been formed thereon. Next covering the substrate with a membrane having a plurality of micro-holes. Afterward spraying a fluid dielectric on the membrane having a plurality of micro-holes. After waiting a period of time for the gaps among the metal conductors being filled with the fluid dielectric, removing the membrane having a plurality of micro-holes from the substrate. Further baking the substrate to cure the fluid dielectric inside metal-conductive layer. The thickness of the dielectric after curing is approximately equal to the thickness of the metal-conductive layer. At last forming a cap dielectric layer on the substrate.
摘要翻译：描述了形成半导体的电介质层的方法。首先，在其上形成有金属导电层的基板。接下来用具有多个微孔的膜覆盖基板。然后在具有多个微孔的膜上喷射流体电介质。在等待一段时间之后，填充有流体电介质的金属导体之间的间隙，从衬底上去除具有多个微孔的膜。进一步烘烤基板以固化金属导电层内的流体电介质。固化后的电介质的厚度大致等于金属导电层的厚度。最后在衬底上形成帽电介质层。

6. 发明申请

US20040253836A1 Low melting point alignment 审中-公开
标题翻译：低熔点对准
公开(公告)号：US20040253836A1
公开(公告)日：2004-12-16
申请号：US10483230
申请日：2004-08-03
发明人： Henning Sirringhaus , Ana Claudia Arias , John Devin Mackenzie
IPC分类号： H01L021/31 , H01L021/469
CPC分类号： H01L51/5012 , B82Y10/00 , H01L51/0003 , H01L51/0004 , H01L51/0012 , H01L51/0026 , H01L51/0036 , H01L51/0037 , H01L51/0039 , H01L51/0043 , H01L51/0044 , H01L51/0516 , H01L51/0541 , H01L51/0545 , H01L51/0595
摘要： A method for forming an aligned layer of a polymer, the method comprising: depositing a film of the polymer from solution in a solvent onto a substrate; and bringing the polymer into alignment by annealing the film at a temperature below the melting temperature of the polymer in isotropic bulk, and cooling the film.
摘要翻译：一种用于形成聚合物的取向层的方法，所述方法包括：将聚合物膜从溶液中沉积到基底上; 并且通过在低于聚合物的各向同性体积的熔融温度的温度下退火该膜使聚合物成对准，并冷却该膜。

7. 发明申请

US20040253835A1 Methods of fabricating patterned layers on a substrate 有权
标题翻译：在衬底上制造图案化层的方法
公开(公告)号：US20040253835A1
公开(公告)日：2004-12-16
申请号：US10482297
申请日：2004-04-27
发明人： Takeo Kawase
IPC分类号： H01L021/31 , H01L021/469 , H01L021/44 , H01L021/00
CPC分类号： G02B6/13 , H01L51/0005 , H01L51/0021 , H01L51/0037 , H05K3/1241
摘要： A method of fabricating a pattern on a substrate, comprises the steps of: depositing; such as by ink-jet printing, multiple drops of a first liquid material as a first deposit (15) on the substrate: depositing, such as by ink-jet printing, multiple drops of a second liquid material (17) as a second deposit on the substrate, and in contact with the first material (15) while the first material is liquid, the first and second liquid materials being mutually immiscible; and producing on the substrate a solid deposit from at least one of said liquid materials. In a preferred embodiment, the method comprises ink-jet printing multiple drops of liquid material immiscible with said second liquid material as a third deposit (16) on the substrate, the third deposit (16) being spaced from the first (15) by a predetermined gap and the second deposit (17) applied in said gap overlapping the first and third deposits (15, 16). At least one of the deposits may contain a suspension or solute, and said solid deposit may be formed by solidification of at least one of said liquids. Applicable to the production of thin-film transistor arrays or other integrated
摘要翻译：一种在衬底上制造图案的方法，包括以下步骤：例如通过喷墨打印，作为第一沉积物（15）的第一液体材料的多个液滴在基底上：例如通过喷墨打印沉积多滴第二液体材料（17）作为第二沉积物在第一材料为液体的同时与第一材料（15）接触，第一和第二液体材料是互不混溶的; 以及在所述基材上产生来自所述液体材料中的至少一种的固体沉积物。在一个优选实施例中，该方法包括将与所述第二液体材料不混溶的多滴液体材料作为第三沉积物（16）喷墨印刷在基底上，第三沉积物（16）与第一沉积物（16）间隔开第一沉积物预定间隙和施加在所述间隙中的第二沉积物（17）与第一和第三沉积物（15,16）重叠。至少一个沉积物可以含有悬浮液或溶质，并且所述固体沉积物可以通过至少一种所述液体的固化而形成。适用于生产薄膜晶体管阵列或其他集成电路

8. 发明申请

US20040248426A1 Edge peeling improvement of low-k dielectric materials stack by adjusting EBR resistance 有权
标题翻译：通过调整EBR电阻来降低低k电介质材料的边缘剥离
公开(公告)号：US20040248426A1
公开(公告)日：2004-12-09
申请号：US10455037
申请日：2003-06-05
申请人： Taiwan Semicondutor Manufacturing Co.
发明人： Tzu-Jen Chou , Syun-Ming Jang , Ying-Ho Chen , Shen-Nan Lee
IPC分类号： H01L021/31 , H01L021/469
CPC分类号： H01L21/31053 , H01L21/31056 , H01L21/31116 , H01L21/76835 , H01L21/7684
摘要： A new method and structure is provided for the polishing of the surface of a layer of low-k dielectric material. Low-k dielectric material of low density and relatively high porosity is combined with low-k dielectric material of high density and low porosity whereby the latter high density layer is, prior to polishing of the combined layers, deposited over the former low density layer. Polishing of the combined layers removes flaking of the polished low-k layers of dielectric. This method can further be extended by forming conductive interconnects through the layers of dielectric, prior to the layer of dielectric.
摘要翻译：提供了一种用于抛光低k电介质材料层的表面的新方法和结构。低密度和相对高孔隙率的低k电介质材料与高密度和低孔隙率的低k电介质材料组合，由此后者的高密度层在组合层的抛光之前沉积在前者的低密度层上。组合层的抛光消除抛光的低k层电介质的剥落。在电介质层之前，可以通过在电介质层之间形成导电互连来进一步延长该方法。

9. 发明申请

US20040248395A1 Method for manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20040248395A1
公开(公告)日：2004-12-09
申请号：US10855466
申请日：2004-05-28
申请人： Semiconductor Leading Edge Technologies, Inc.
发明人： Katsumi Yoneda , Toru Yoshie
IPC分类号： H01L021/4763 , H01L021/31 , H01L021/469
CPC分类号： H01L21/32056 , H01L21/31058 , H01L21/76826 , H01L21/76829 , H01L21/76832 , H01L21/76835
摘要： In a method for manufacturing a semiconductor device having a multi-layer insulating film, a first insulating film is formed as one layer of the multi-layer insulating film, and a plasma treatment is performed on the surface of the first insulating film in an ambient of helium and argon, containing 5 to 31% Ar. After the plasma treatment, a second insulating film, different from the first insulating film, is formed on the first insulating film as another layer of the multi-layer insulating film.
摘要翻译：在制造具有多层绝缘膜的半导体器件的方法中，第一绝缘膜形成为多层绝缘膜的一层，并且在环境中对第一绝缘膜的表面进行等离子体处理的氦和氩，含有5〜31％的Ar。在等离子体处理之后，在第一绝缘膜上形成与第一绝缘膜不同的第二绝缘膜作为多层绝缘膜的另一层。

10. 发明申请

US20040242020A1 Semiconductor device and production method therefor 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20040242020A1
公开(公告)日：2004-12-02
申请号：US10482628
申请日：2004-07-06
发明人： Yoshiaki Oku
IPC分类号： H01L021/31
CPC分类号： H01L27/11502 , H01L21/02126 , H01L21/02197 , H01L21/02203 , H01L21/02216 , H01L21/02282 , H01L21/02337 , H01L21/31695 , H01L21/7682 , H01L23/5329 , H01L23/53295 , H01L27/11507 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要： It is an object to provide an insulating film having a very low dielectric constant and a great mechanical strength. Moreover, it is another object to provide a semiconductor device capable of reducing both a capacity between wiring layers and a capacity between wirings also in microfabrication and an increase in integration in the semiconductor device. In order to attain the objects, there is provided an inorganic insulating film comprising a porous structure having a skeletal structure in which a vacancy is arranged periodically and a large number of small holes are included.
摘要翻译：本发明的目的是提供具有非常低的介电常数和很大机械强度的绝缘膜。此外，本发明的另一个目的是提供一种半导体器件，其能够减小布线层之间的容量和微细加工中的布线之间的容量以及半导体器件中的集成度的增加。为了达到上述目的，提供了一种无机绝缘膜，其包括具有骨架结构的多孔结构，其中空位周期性地布置并且包括大量的小孔。

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