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    • 81. 发明申请
    • DUAL-TRIGGER LOW-ENERGY FLIP-FLOP CIRCUIT
    • 双触发低能量FLIP-FLOP电路
    • US20130278315A1
    • 2013-10-24
    • US13921138
    • 2013-06-18
    • NVIDIA Corporation
    • William J. DallyJonah M. AlbenJohn W. PoultonGe Yang
    • H03K3/36
    • H03K3/36H03K3/012H03K3/356121
    • One embodiment of the present invention sets forth a technique for technique for capturing and storing a level of an input signal using a dual-trigger low-energy flip-flop circuit that is fully-static and insensitive to fabrication process variations. The dual-trigger low-energy flip-flop circuit presents only three transistor gate loads to the clock signal and none of the internal nodes toggle when the input signal remains constant. One of the clock signals may be a low-frequency “keeper clock” that toggles less frequently than the other two clock signal that is input to two transistor gates. The output signal Q is set or reset at the rising clock edge using separate trigger sub-circuits. Either the set or reset may be armed while the clock signal is low, and the set or reset is triggered at the rising edge of the dock.
    • 本发明的一个实施例提出了一种技术,用于使用完全静态且对制造工艺变化不敏感的双触发低能量触发器电路来捕获和存储输入信号电平的技术。 双触发低能触发器电路仅向时钟信号提供三个晶体管栅极负载,并且当输入信号保持恒定时,内部节点都不会切换。 时钟信号之一可以是低频“保持时钟”,其比输入到两个晶体管栅极的另外两个时钟信号频率更低。 输出信号Q在上升时钟沿使用分离的触发子电路设置或复位。 当时钟信号为低电平时,设置或复位可能被布防,并且在基座的上升沿触发置位或复位。
    • 83. 发明申请
    • RELAXATION OSCILLATOR
    • 放松振荡器
    • US20130200956A1
    • 2013-08-08
    • US13612795
    • 2012-09-12
    • Keng-Jan HSIAO
    • Keng-Jan HSIAO
    • H03K3/36
    • H03K5/153G01R19/10H03K3/0231H03K3/36H03K4/502H03K5/2472
    • A relaxation oscillator is provided. A first current source provides a first current. A second current source provides a second current. A resistive element is coupled between the first current source and a ground. A capacitive element is coupled between the second current source and the ground. A comparator has a non-inverting input terminal, an inverting input terminal and an output terminal for outputting a compare result. A clock generator provides a clock signal according to the compare result. A switching unit alternately couples the non-inverting input terminal and the inverting input terminal of the comparator to the resistive element and the capacitive element according to the clock signal.
    • 提供张弛振荡器。 第一电流源提供第一电流。 第二电流源提供第二电流。 电阻元件耦合在第一电流源和地之间。 电容元件耦合在第二电流源和地之间。 比较器具有非反相输入端子,反相输入端子和用于输出比较结果的输出端子。 时钟发生器根据比较结果提供时钟信号。 开关单元根据时钟信号将比较器的非反相输入端子和反相输入端子交替耦合到电阻元件和电容元件。
    • 87. 发明授权
    • Logic circuit using resonant-tunneling transistor
    • 使用谐振隧道晶体管的逻辑电路
    • US4849934A
    • 1989-07-18
    • US918300
    • 1986-10-10
    • Naoki YokoyamaToshihiko Mori
    • Naoki YokoyamaToshihiko Mori
    • G11C11/36G11C11/39H03K3/36H03K23/00
    • B82Y10/00G11C11/36G11C11/39H03K23/00H03K3/36G11C2211/5614
    • A logic circuit including a resonant-tunneling transistor having a superlattice containing at least one quantum well layer, and a constant current source operatively connected between a base and an emitter of the transistor and supplying a constant current to said base. The transistor has a differential negative-resistance characteristic with at least one resonant point in a relationship between a current flowing in the base and a voltage between the base and emitter, and having at least two stable base current values at both sides of the resonant point on the characteristic, defined by the changeable base.multidot.emitter voltage. By supplying the base.multidot.emitter voltage having an amplitude of at least two amplitudes corresponding to the stable base current values, the transistor holds data corresponding to the base.multidot.emitter voltage.
    • 一种包括具有包含至少一个量子阱层的超晶格的谐振隧道晶体管的逻辑电路,以及可操作地连接在所述晶体管的基极和发射极之间的恒流源,并向所述基极提供恒定电流。 晶体管具有差分负电阻特性,其具有在基极中流动的电流与基极和发射极之间的电压之间的关系中的至少一个谐振点,并且在谐振点的两侧具有至少两个稳定的基极电流值 基于特征,由可变的基极电压定义。 通过提供具有对应于稳定的基极电流值的至少两个幅度的幅度的基极发射器电压,晶体管保持对应于基极发射极电压的数据。
    • 88. 发明授权
    • Voltage to current converter
    • 电压到电流转换器
    • US4354122A
    • 1982-10-12
    • US176346
    • 1980-08-08
    • Milton L. EmbreeWilliam G. Garrett
    • Milton L. EmbreeWilliam G. Garrett
    • G05F1/56H03F3/343H03K3/36
    • G05F1/561H03F3/343
    • In situations where it is desired to provide an extremely accurate output current generated from an input voltage, errors occur in the conversion. Conventional solutions depend upon operational amplifiers and rely upon the availability of both positive and negative reference voltages. When attempting to design an integrated circuit having accurate output currents using only integrated circuit technology the circuit components introduce undesirable errors. These problems have been overcome by an arrangement which includes a current mirror (104, 105) for providing the output current and also for providing a feedback current (101, 102) for use in modifying the current flowing in an input emitter follower (103). Using this approach, the base emitter voltages of the emitter follower transistor and the input transistor of the current mirror are forced to cancel each other. By adjusting the current densities of the two transistors, substantially perfect error compensation is achieved.
    • 在希望提供从输入电压产生的非常精确的输出电流的情况下,在转换中出现错误。 常规解决方案取决于运算放大器,并依赖于正和负参考电压的可用性。 当仅使用集成电路技术设计具有精确输出电流的集成电路时,电路组件引入不期望的错误。 这些问题已经被包括用于提供输出电流的电流镜(104,105)并且还用于提供用于修改在输入射极跟随器(103)中流动的电流的反馈电流(101,102) 。 使用这种方法,射极跟随器晶体管和电流镜的输入晶体管的基极发射极电压被迫彼此抵消。 通过调整两个晶体管的电流密度,实现了基本上完美的误差补偿。
    • 90. 发明授权
    • Monostable multivibrator
    • 单稳态多谐振荡器
    • US4042944A
    • 1977-08-16
    • US571792
    • 1975-04-25
    • Tadao Yoshida
    • Tadao Yoshida
    • H03K3/284H01L21/331H01L21/822H01L21/8247H01L27/04H01L29/00H01L29/73H01L29/788H01L29/792H03K3/35H03K3/36H01L29/78
    • H03K3/35H01L29/00
    • A monostable multivibrator having a novel four terminal semiconductor device with a generally V-shaped emitter grounded current amplification characteristic. Means are provided to bias the operation of the device to a low point on the characteristic, to provide a trigger signal to the base of the semiconductor device for placing the device in a conducting state and, through the operation of a capacitor coupled between the gate and collector terminals, to shift the operation of the device to a high level on the emitter-grounded current amplification characteristic thereby sharply decreasing the output voltage obtained at the collector. Discharge circuit means are provided for the capacitor to gradually reduce the gate voltage and to shift the operation of the device back to the low circuit point thereby reducing the collector current and suddenly increasing the collector voltage.
    • 具有新型四端子半导体器件的单稳态多谐振荡器,具有大致V形发射极接地电流放大特性。 提供了用于将器件的操作偏置到特性的低点的装置,以向半导体器件的基极提供触发信号以将器件置于导通状态,并且通过耦合在栅极之间的电容器的操作 和集电极端子,将发射极接地电流放大特性的器件工作转移到高电平,从而大大降低集电极处的输出电压。 为电容器提供放电电路,以逐渐降低栅极电压并将器件的工作转移回低电位点,从而降低集电极电流并突然增加集电极电压。