专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

81. 发明申请

US20050048741A1 Pattern recognition and metrology structure for an x-initiative layout design 失效
标题翻译：模式识别和计量结构，用于x-initiative布局设计
公开(公告)号：US20050048741A1
公开(公告)日：2005-03-03
申请号：US10653309
申请日：2003-09-02
申请人： Khoi Phan , Bharath Rangarajan , Bhanwar Singh
发明人： Khoi Phan , Bharath Rangarajan , Bhanwar Singh
IPC分类号： G03F7/20 , G03F9/00 , H01L21/301
CPC分类号： G03F7/70625 , G03F7/70633 , G03F9/7076 , Y10S438/975
摘要： The present invention relates to inspection methods and systems utilized to provide a best means for inspection of a wafer. The methods and systems include wafer-to-reticle alignment, layer-to-layer alignment and wafer surface feature inspection. The wafer-to-reticle alignment is improved by the addition of diagonal lines to existing alignment marks to decrease the intersection size and corresponding area that a desired point can reside. Layer-to-layer alignment is improved in a similar manner by the addition of oblique and/or non-linear line segments to existing overlay targets. Also, providing for wafer surface inspection in a multitude of desired diagonal axes allows for more accurate feature measurement.
摘要翻译：本发明涉及用于提供用于检查晶片的最佳方法的检查方法和系统。该方法和系统包括晶片到标线片对准，层间对准和晶片表面特征检查。通过将对角线添加到现有的对准标记来减小交叉点大小和期望点可以驻留的对应区域来改善晶片到标线阵列对准。通过向现有覆盖目标添加倾斜和/或非线性线段，以类似的方式改善了层间对齐。此外，在多个所需的对角轴中提供晶片表面检查允许更精确的特征测量。

82. 发明授权

US06746822B1 Use of surface coupling agent to improve adhesion 有权
标题翻译：使用表面偶联剂改善附着力
公开(公告)号：US06746822B1
公开(公告)日：2004-06-08
申请号：US10050484
申请日：2002-01-16
申请人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh
发明人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh
IPC分类号： G03F720
CPC分类号： G03F7/265 , H01L21/0273 , H01L21/31144 , H01L21/32139
摘要： Disclosed are methods of processing a semiconductor structure, involving the steps of depositing a light-degradable surface coupling agent on a semiconductor substrate; depositing a resist over the light-degradable surface coupling agent; irradiating portions of the resist, wherein the light-degradable surface coupling agent under the irradiated portions of the resist at least partially decomposes; and developing the resist.
摘要翻译：公开了处理半导体结构的方法，包括在半导体衬底上沉积可光降解的表面偶联剂的步骤; 在光可降解表面偶联剂上沉积抗蚀剂; 照射抗蚀剂的部分，其中抗蚀剂照射部分下的可光降解表面偶联剂至少部分分解; 并开发抗蚀剂。

83. 发明授权

US06724476B1 Low defect metrology approach on clean track using integrated metrology 失效
标题翻译：使用综合计量的清洁轨道的低缺陷计量方法
公开(公告)号：US06724476B1
公开(公告)日：2004-04-20
申请号：US10261756
申请日：2002-10-01
申请人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
发明人： Khoi A. Phan , Bhanwar Singh , Bharath Rangarajan
IPC分类号： G01N2100
CPC分类号： G01N21/9501
摘要： One aspect of the present invention relates to a system and method of monitoring for defects on a wafer before and after forming a photoresist layer on the wafer. The system includes a device fabrication system comprising one or more wafer processing system components for producing a device; a defect metrology system integrated within and on track with the fabrication system operative to inspect the wafer for defects before it proceeds to photoresist processing; and a wafer cleaning system for reducing an amount of defects detected on the front and/or back side of the wafer. If the amount of defects have been sufficiently reduced, the front side of the wafer may be coated with a photoresist. Subsequently, the back side of the wafer may be inspected and cleaned while protecting the front side from damage. Cleaning of the wafer may be performed with a thermal shock treatment, for example.
摘要翻译：本发明的一个方面涉及在晶片上形成光致抗蚀剂层之前和之后对晶片上的缺陷进行监测的系统和方法。该系统包括装置制造系统，其包括用于产生装置的一个或多个晶片处理系统部件; 在制造系统内部和轨道上集成的缺陷计量系统，其操作用于在进行光致抗蚀剂处理之前检查晶片的缺陷; 以及用于减少在晶片的前侧和/或后侧检测到的缺陷量的晶片清洁系统。如果缺陷的量已经被充分降低，则晶片的前侧可以涂覆有光致抗蚀剂。随后，可以在保护前侧免受损伤的同时检查和清洁晶片的背面。例如，可以进行热冲击处理来进行晶片的清洁。

84. 发明授权

US06556303B1 Scattered signal collection using strobed technique 有权
标题翻译：使用频闪技术分散信号采集
公开(公告)号：US06556303B1
公开(公告)日：2003-04-29
申请号：US09902366
申请日：2001-07-10
申请人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh , Khoi A. Phan
发明人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh , Khoi A. Phan
IPC分类号： G01B1114
CPC分类号： G01B11/0683 , G01B11/0625 , H01L22/12
摘要： The present invention is directed to a system and a method for controlling a thin film formation on a moving substrate as part of a process for manufacturing an integrated circuit. The invention involves the use of scatterometry to control the thin film formation process by analyzing the thin film on the moving substrate in a periodic manner. A registration feature associated with the moving substrate can be utilized in conjunction with a signaling system to determine a position of the moving substrate, whereby a repeatable analysis of a corresponding location on the moving substrate can be performed. Scatterometry permits in-situ measurements of thin film formation progress, whereby thin film formation process conditions can be controlled in a feedback loop to obtain a targeted result. Scatterometry can also be facilitated by providing a grating pattern on a non-production portion of the substrate.
摘要翻译：本发明涉及一种用于控制移动衬底上的薄膜形成的系统和方法，作为用于制造集成电路的工艺的一部分。本发明涉及使用散射法来以周期性方式分析移动基片上的薄膜来控制薄膜形成过程。与移动基板相关联的配准特征可以与信号系统结合使用，以确定移动基板的位置，由此可以执行移动基板上对应位置的可重复分析。散射测量允许原位测量薄膜形成进程，由此可以在反馈回路中控制薄膜形成工艺条件以获得目标结果。也可以通过在基板的非生产部分上提供光栅图案来促进散射测量。

85. 发明授权

US06441349B1 System for facilitating uniform heating temperature of photoresist 失效
标题翻译：用于促进光刻胶均匀加热温度的系统
公开(公告)号：US06441349B1
公开(公告)日：2002-08-27
申请号：US09558643
申请日：2000-04-26
申请人： Bharath Rangarajan , Bhanwar Singh , Sanjay K. Yedur
发明人： Bharath Rangarajan , Bhanwar Singh , Sanjay K. Yedur
IPC分类号： H05B368
CPC分类号： H01L21/67103
摘要： A system and method for facilitating uniform heating temperature of a material is provided. The material may be a photoresist, a top or bottom anti-reflective coating, a low K dielectric material, SOG or other spin-on material. The system can include at least one heating element and a heat transfer fluid, the heating element heating the heat transfer fluid, which in turn heats the material. The transfer fluid more evenly distributes the heat from the heating element, which can have hot and cold spots at the material.
摘要翻译：提供了一种用于促进材料的均匀加热温度的系统和方法。该材料可以是光致抗蚀剂，顶部或底部抗反射涂层，低K电介质材料，SOG或其它旋涂材料。该系统可以包括至少一个加热元件和传热流体，该加热元件加热该传热流体，该热传导流体依次加热该材料。传输流体更均匀地分配来自加热元件的热量，其可以在材料上具有热点和冷点。

86. 发明授权

US06245493B1 Method for reducing surface reflectivity by increasing surface roughness 有权
标题翻译：通过增加表面粗糙度来降低表面反射率的方法
公开(公告)号：US06245493B1
公开(公告)日：2001-06-12
申请号：US09205738
申请日：1998-12-04
申请人： Bhanwar Singh , Bharath Rangarajan , Sanjay K. Yedur , Michael K. Templeton , Christopher F. Lyons
发明人： Bhanwar Singh , Bharath Rangarajan , Sanjay K. Yedur , Michael K. Templeton , Christopher F. Lyons
IPC分类号： G03F700
CPC分类号： H01L21/0276 , G03F7/091 , G03F7/16 , H01L21/3105
摘要： A method for creating a roughened surface on a material exposed to light during a photolithographic process is provided. The roughened surface is created on a surface of the material via a plasma etch process. The roughened surface diffuses light incident to the material such that the diffused light causes insubstantial damage to a photoresist subsequently formed on the material.
摘要翻译：提供了一种在光刻过程中在暴露于光的材料上产生粗糙表面的方法。通过等离子体蚀刻工艺在材料的表面上形成粗糙表面。粗糙表面扩散入射到材料的光，使得漫射的光对随后在材料上形成的光致抗蚀剂造成非实质的损坏。

87. 发明授权

US06238830B1 Active control of temperature in scanning probe lithography and maskless lithograpy 有权
标题翻译：扫描探针光刻和无掩模光刻中主动控制温度
公开(公告)号：US06238830B1
公开(公告)日：2001-05-29
申请号：US09429994
申请日：1999-10-29
申请人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh
发明人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh
IPC分类号： G03F900
CPC分类号： G03F7/70875 , G01Q30/10 , G01Q80/00 , H01J2237/31759 , Y10S977/855
摘要： A system for monitoring and regulating a photoresist temperature in a maskless lithography pattern transfer process is disclosed. The system includes a photoresist layer overlying a substrate and a material associated with the photoresist layer, wherein the material exhibits a transformation over variations in temperature. The system also includes a detection system for detecting the transformation in the material and a processor operatively coupled to the detection system. The processor receives information associated with the detected transformation and uses the information to control a tool being used for the pattern transfer, thereby reducing variations in temperature in the resist during pattern transfer. In addition, a method of monitoring and regulating a photoresist temperature in a maskless lithography pattern transfer process is disclosed. The method includes associating a material having a characteristic which varies over variations in temperature with a photoresist layer which overlies a substrate and detecting the characteristic during the pattern transfer process. Once detected a temperature of a portion of the photoresist layer is determined using the detected characteristic and an operation of a writing tool which performs the pattern transfer process in response to the photoresist layer temperature is controlled in response thereto.
摘要翻译：公开了一种用于在无掩模光刻图案转印工艺中监测和调节光刻胶温度的系统。该系统包括覆盖衬底的光致抗蚀剂层和与光致抗蚀剂层相关联的材料，其中材料表现出与温度变化的转变。该系统还包括用于检测材料中的变换的检测系统和可操作地耦合到检测系统的处理器。处理器接收与检测到的变换相关联的信息，并使用该信息来控制用于图案转印的工具，由此减少图案转印期间抗蚀剂的温度变化。此外，公开了一种在无掩模光刻图案转印工艺中监测和调节光刻胶温度的方法。该方法包括将具有随温度变化变化的特性的材料与覆盖在衬底上的光致抗蚀剂层相关联，并且在图案转移过程期间检测特性。一旦检测到，使用检测到的特性确定光刻胶层的一部分的温度，并响应于光致抗蚀剂层温度来控制执行图案转印处理的写入工具的操作。

88. 发明授权

US06221777B1 Reverse lithographic process for semiconductor vias 有权
标题翻译：半导体通孔反向光刻工艺
公开(公告)号：US06221777B1
公开(公告)日：2001-04-24
申请号：US09329154
申请日：1999-06-09
申请人： Bhanwar Singh , Bharath Rangarajan , Ursula Q. Quinto
发明人： Bhanwar Singh , Bharath Rangarajan , Ursula Q. Quinto
IPC分类号： H01L2100
CPC分类号： H01L27/11521 , H01L21/76802 , H01L21/76816
摘要： A reverse lithographic process is provided for more densely packing semiconductors onto a semiconductor wafer. A semiconductor wafer having a dielectric covered semiconductor device has a photoresist deposited which is patterned with vias in closely packed rows and columns. The resist is developed and trimmed to form via photoresist structures. A non-photosensitive polymer is deposited over the via photoresist structures and, when hardened, is subject to planarizing to expose the via photoresist structures. The via photoresist structures are removed and leave a reverse image patterned polymer. The photoresist is removed leaving the reverse image patterned polymer, which is then used to etch the dielectric to form vias to the semiconductor device.
摘要翻译：提供反向光刻工艺用于在半导体晶片上更密集地堆叠半导体。具有电介质覆盖的半导体器件的半导体晶片具有沉积的光致抗蚀剂，其以紧密堆积的行和列形成通孔。抗蚀剂被显影和修整以通过光致抗蚀剂结构形成。非光敏聚合物沉积在通孔光致抗蚀剂结构上，并且当硬化时，进行平面化以暴露通孔光致抗蚀剂结构。去除通孔光致抗蚀剂结构并留下反向图案图案化的聚合物。除去光致抗蚀剂留下反向图案图案化的聚合物，然后将其用于蚀刻电介质以形成到半导体器件的通孔。

89. 发明授权

US6063531A Focus monitor structure and method for lithography process 失效
标题翻译：光刻工艺的聚焦监视器结构和方法
公开(公告)号：US6063531A
公开(公告)日：2000-05-16
申请号：US167417
申请日：1998-10-06
申请人： Bhanwar Singh , Bharath Rangarajan , Khoi Anh Phan , Carmen L. Morales
发明人： Bhanwar Singh , Bharath Rangarajan , Khoi Anh Phan , Carmen L. Morales
IPC分类号： G03F7/20 , G03F9/02 , G03F9/00
CPC分类号： G03F7/70625 , G03F7/70641
摘要： A focus monitor structure is placed on a reticle or mask near the production device structures, such as integrated circuits, to monitor the focal conditions of the lithography process as well as other parameters, such as the critical dimension, and proximity effects. The focus monitor structure includes a series of densely packed parallel lines and an isolated line along with a line that is positioned orthogonally to the densely packed lines forming an "L" shaped structure. The focus monitor structure also includes a plurality of rectangular islands that create post structures when patterned in the resist layer. The lines of the focus monitor structure are approximately the critical dimension and the rectangular islands vary in width between .+-.10% of the critical dimension. By manually or automatically inspecting the focus monitor structure after it is patterned into a layer of resist, including measuring the width of the resist lines and the resist profile angle of the orthogonal line, information relating to the critical dimension as well as the focal conditions of the lithography process can be determined.
摘要翻译：将聚焦监视器结构放置在生产设备结构（例如集成电路）附近的掩模版或掩模上，以监视光刻工艺的焦点状况以及其他参数，例如临界尺寸和邻近效应。聚焦监视器结构包括一系列密集的平行线和一条隔离的线以及一条线，该线与形成“L”形结构的密集线相正交。聚焦监视器结构还包括当在抗蚀剂层中图案化时产生柱结构的多个矩形岛。聚焦监视器结构的线条大致是临界尺寸，矩形岛的宽度在临界尺寸的+/- 10％之间变化。在聚焦监视器结构被图案化成抗蚀剂层之后，通过手动或自动地检查聚焦监视器结构，包括测量抗蚀剂线的宽度和正交线的抗蚀剂轮廓角，与关键尺寸以及焦点监视结构的焦点条件可以确定光刻工艺。

90. 发明授权

US07173648B1 System and method for visually monitoring a semiconductor processing system 失效
标题翻译：用于视觉监测半导体处理系统的系统和方法
公开(公告)号：US07173648B1
公开(公告)日：2007-02-06
申请号：US09553841
申请日：2000-04-21
申请人： Khoi Phan , Bharath Rangarajan , Bhanwar Singh , Bryan Choo
发明人： Khoi Phan , Bharath Rangarajan , Bhanwar Singh , Bryan Choo
IPC分类号： H04N7/18 , G01N21/00
CPC分类号： G01N21/9501 , G01N21/8803 , G01N2021/889
摘要： The present invention relates to visually monitoring an interior portion of a processing chamber in a semiconductor processing system. An image collector collects images of the interior of the chamber and provides an image signal indicative of a visual representation of the interior of the chamber. A viewing station receives the image signal and displays a visual representation of the interior of the chamber.
摘要翻译：本发明涉及在半导体处理系统中视觉监测处理室的内部部分。图像收集器收集室内部的图像，并提供指示室内部的视觉表示的图像信号。观察台接收图像信号并显示室内部的视觉表示。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式