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71. 发明授权

US06310301B1 Inter-substrate conductive mount for a circuit board, circuit board and power magnetic device employing the same 有权
标题翻译：用于电路板的基板间导电安装座，电路板和采用该电路板的电力磁性装置
公开(公告)号：US06310301B1
公开(公告)日：2001-10-30
申请号：US09288749
申请日：1999-04-08
申请人： Randy T. Heinrich , Robert J. Roessler , Thang D. Truong , Matthew A. Wilkowski , William L. Woods, Jr.
发明人： Randy T. Heinrich , Robert J. Roessler , Thang D. Truong , Matthew A. Wilkowski , William L. Woods, Jr.
IPC分类号： H05K116
CPC分类号： H05K3/368 , H05K1/141 , H05K1/165 , H05K3/3436 , H05K2201/10234 , H05K2201/10257 , H05K2201/10666 , H05K2201/10992 , H05K2203/041 , H05K2203/0455 , Y02P70/613
摘要： An inter-substrate conductive mount for a surface mountable circuit board, a method of manufacturing the circuit board and a surface mountable power magnetic device. In one embodiment, the circuit board includes: (1) a substrate, (2) an inter-substrate conductive mount composed of a material having a melting point above a solder reflow temperature and including a compliant solder joint at an interface of the substrate and (3) a solder located proximate the conductive mount, the conductive mount of a sufficiently low weight such that a surface tension of a liquid state of the solder is sufficient to maintain the conductive mount in contact with the substrate as the solder is brought to the reflow temperature, the conductive mount being capable of mounting the substrate to an adjacent substrate and providing a conductive path therebetween.
摘要翻译：一种用于表面安装电路板的基板间导电座，一种制造电路板的方法和一种可表面安装的电力磁性装置。在一个实施例中，电路板包括：（1）基板，（2）由具有高于焊料回流温度的熔点的材料构成的基板间导电安装件，并且在基板的界面处包括柔性焊接点（3）位于导电安装座附近的焊料，该导电安装件具有足够低的重量，使得焊料的液体状态的表面张力足以使导电安装座与衬底接触，因为焊料被带到回流温度，导电安装件能够将衬底安装到相邻的衬底上并且在它们之间提供导电路径。

72. 发明授权

US06300578B1 Pad-on-via assembly technique 有权
标题翻译： Pad-on-via装配技术
公开(公告)号：US06300578B1
公开(公告)日：2001-10-09
申请号：US09512131
申请日：2000-02-24
申请人： Mark Kenneth Hoffmeyer , Phillip Duane Isaacs
发明人： Mark Kenneth Hoffmeyer , Phillip Duane Isaacs
IPC分类号： H01R1204
CPC分类号： H05K3/3436 , B23K1/0016 , B23K2101/42 , H05K3/3452 , H05K3/3463 , H05K3/3484 , H05K2201/09481 , H05K2201/09572 , H05K2201/10992 , H05K2201/2081 , H05K2203/043 , H05K2203/0455 , Y02P70/613
摘要： Fine pitch area array packaging is achieved using a via-in-pad design within the area array attach portion of a printed circuit board (PCB). The limitation of the design is the wicking action, whereby solder applied to the capture pad contact surface is depleted by capillary action into the via hole when reflowed, causing insufficient solder to be present at the contact surface to effect reliable and repeatable electrical connections. In one implementation, an initial application of solder is applied to plug the via hole with a material having a higher final melting temperature than eutectic solder, thereby providing a stable plug. This plug is formed by the initial solder application that may be either a eutectic solder containing a third metal that forms intermetallic compounds, when reflowed, that elevate the liquidus temperature or a solder having a different formulation with an inherent higher melting temperature. An alternative implementation is to plate the via hole with a material, such as nickel, which prevents eutectic solder, applied to the via capture pad contact surface, from wetting the hole surface and being drawn away from the contact surface by capillary action. Thus, the solder, applied to the via capture pad and used to establish an electrical connection is not depleted.
摘要翻译：使用在印刷电路板（PCB）的区域阵列附着部分内的通孔焊盘设计实现细间距区域阵列封装。设计的限制是芯吸作用，由此当回流时，施加到捕获垫接触表面的焊料被毛细管作用通入通孔中，导致在接触表面处存在不足的焊料以实现可靠和可重复的电连接。在一个实施方案中，施加焊料的初始应用以用比共晶焊料更高的最终熔融温度的材料堵塞通孔，从而提供稳定的插塞。该插头由初始焊料应用形成，其可以是包含形成金属间化合物的第三金属的共晶焊料，当回流时，提高液相线温度的焊料或具有固有的较高熔融温度的不同配方的焊料。另一种实施方案是用诸如镍的材料对通孔进行平板化，其防止施加到通孔捕获垫接触表面的共晶焊料润湿孔表面并通过毛细管作用从接触表面拉出。因此，施加到通孔捕获垫并用于建立电连接的焊料不会耗尽。

73. 发明授权

US06288906B1 Multiple layer printed circuit board having power planes on outer layers 有权
标题翻译：多层印刷电路板，其外层具有电源层
公开(公告)号：US06288906B1
公开(公告)日：2001-09-11
申请号：US09216780
申请日：1998-12-18
申请人： John T. Sprietsma , Steve Joy , Julie Scheyer-Furnanz
发明人： John T. Sprietsma , Steve Joy , Julie Scheyer-Furnanz
IPC分类号： H01R900
CPC分类号： H05K1/0207 , H05K1/0203 , H05K1/0209 , H05K1/0218 , H05K1/112 , H05K3/3452 , H05K3/429 , H05K2201/0715 , H05K2201/0989 , H05K2203/0455
摘要： A multi-layer printed circuit board includes power planes located on outer conductive layers. The outer conductive layers are patterned to accept circuitry, such as integrated circuits and surface mount devices. Mounting pads are provided on the outer conductive layers which include plated through vias for electrical interconnection with other conductive layers of the printed circuit board. To increase solderability, the plated through vias are located on the mounting pads such that they are covered by the circuit component mounted thereto. By locating the vias under the electrical components, such as surface mount capacitors, the quality of solder fillets is increased. To enhance heat dissipation, openings are provided in solder masks located on exterior surfaces of the outer conductive planes. These openings are located in the solder mask to expose the conductive plane. As such, the openings are located in areas where circuitry is not mounted to the printed circuit board.
摘要翻译：多层印刷电路板包括位于外导电层上的电源层。外部导电层被图案化以接受诸如集成电路和表面安装器件的电路。安装焊盘设置在外导电层上，其包括电镀通孔，用于与印刷电路板的其它导电层电互连。为了增加可焊性，电镀通孔位于安装焊盘上，使得它们被安装在其上的电路部件覆盖。通过将通孔定位在诸如表面贴装电容器之类的电气部件下方，焊盘的质量得到提高。为了增强散热，在位于外部导电平面的外表面上的焊接掩模中提供开口。这些开口位于焊接掩模中以暴露导电平面。因此，开口位于电路未安装到印刷电路板的区域中。

74. 发明申请

US20010014015A1 Electronic package with stacked connections and method for making same 失效
公开(公告)号：US20010014015A1
公开(公告)日：2001-08-16
申请号：US09764465
申请日：2001-01-17
发明人： Gregg J. Armezzani , Matthew A. Heller
IPC分类号： H05K001/14
CPC分类号： H01L23/4985 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L2924/0002 , H05K3/363 , H05K2201/096 , H05K2201/10666 , H05K2203/0338 , H05K2203/041 , H05K2203/0455 , H01L2924/00
摘要： An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.

75. 发明授权

US06168854A Method of making a printed circuit board having a tin/lead coating 失效
标题翻译：制造具有锡/铅涂层的印刷电路板的方法
公开(公告)号：US06168854A
公开(公告)日：2001-01-02
申请号：US09331621
申请日：1999-06-23
申请人： Frank Robert Gibbs
发明人： Frank Robert Gibbs
IPC分类号： B32B700
CPC分类号： H05K3/062 , H05K1/0271 , H05K1/112 , H05K3/3473 , H05K2201/0305 , H05K2201/09781 , H05K2201/10636 , H05K2203/043 , H05K2203/0455 , Y02P70/611 , Y10S428/901 , Y10T428/24917
摘要： A method of manufacturing a printed circuit board comprising a high density conductive pattern comprising at least one pad suitable for forming a solder connection with at least one surface mounted component. The method comprises the steps of forming the pattern; and forming a protective coating on the pattern suitable for soldering without solder resist adjacent the pad. The pad can adjoin land surrounding via hole, thereby increasing density of the circuit board layout. A further process for manufacturing printed circuits applies an etch resist to a conductive pattern, etches the pattern and uses the etch resist to form a protective coating on the pattern. The etch resist may be heated to cause the etch resist to form an alloy.
摘要翻译：一种制造印刷电路板的方法，包括高密度导电图案，其包括至少一个适于与至少一个表面安装部件形成焊料连接的焊盘。该方法包括形成图案的步骤; 以及在适合焊接的图案上形成保护涂层，而不需要邻近焊盘的阻焊剂。垫可以邻接通孔周围的陆地，从而增加电路板布局的密度。用于制造印刷电路的另一种方法是对导电图案施加蚀刻抗蚀剂，蚀刻图案并使用蚀刻抗蚀剂在图案上形成保护涂层。可以加热蚀刻抗蚀剂以使蚀刻抗蚀剂形成合金。

76. 发明授权

US6054761A Multi-layer circuit substrates and electrical assemblies having conductive composition connectors 有权
标题翻译：具有导电组合物连接器的多层电路基板和电气组件
公开(公告)号：US6054761A
公开(公告)日：2000-04-25
申请号：US203126
申请日：1998-12-01
申请人： Mark Thomas McCormack , Hunt Hang Jiang , Solomon I. Beilin , Albert Wong Chan , Yasuhito Takahashi
发明人： Mark Thomas McCormack , Hunt Hang Jiang , Solomon I. Beilin , Albert Wong Chan , Yasuhito Takahashi
IPC分类号： C08K3/00 , C08L63/00 , H01L23/498 , H05K3/40 , H05K3/46 , H01L23/04
CPC分类号： H05K3/363 , H01L23/49883 , H05K3/4069 , H05K3/4614 , H05K3/4617 , H05K3/462 , H01L2224/16503 , H05K2201/09536 , H05K2201/096 , H05K2201/09827 , H05K2201/10666 , H05K2203/0425 , H05K2203/0455 , H05K3/321 , H05K3/4623
摘要： Printed circuit substrates and electrical assemblies including a conductive composition are disclosed. The printed circuit substrate and the electrical assembly embodiments comprise a first conducting region and a second conducting region. A dielectric layer is disposed between the first and second conducting regions. An aperture is disposed in the dielectric layer and a via structure including the conductive composition is disposed in the aperture. The conductive composition is preferably in a cured state and electrically communicates with the first and second conducting regions. In preferred embodiments, the conductive composition comprises conductive particles in an amount of at least about 75 wt. % based on the weight of the composition. At least 50% by weight of the conductive particles have melting points of less than about 400.degree. C. The composition further includes a carrier including an epoxy-functional resin in an amount of at least about 50 wt. % based on the weight of the carrier, and a fluxing agent in an amount of at least about 0.1 wt % based on the weight of the carrier. The epoxy functional resin can have a viscosity of less than about 1000 centipoise at 25.degree. C.
摘要翻译：公开了印刷电路基板和包括导电组合物的电气组件。印刷电路基板和电组件实施例包括第一导电区域和第二导电区域。电介质层设置在第一和第二导电区域之间。在电介质层中设置孔，并且包括导电组合物的通孔结构设置在孔中。导电组合物优选处于固化状态并与第一和第二导电区域电连通。在优选的实施方案中，导电组合物包含至少约75wt。基于组合物的重量％。至少50重量％的导电颗粒具有小于约400℃的熔点。该组合物还包括载体，其包含至少约50重量％的量的环氧官能树脂。基于载体的重量，以及基于载体重量的至少约0.1重量％的助熔剂。环氧官能树脂在25℃下的粘度可以小于约1000厘泊

77. 发明授权

US5783865A Wiring substrate and semiconductor device 失效
标题翻译：接线基板和半导体器件
公开(公告)号：US5783865A
公开(公告)日：1998-07-21
申请号：US602423
申请日：1996-02-16
申请人： Yutaka Higashiguchi , Mitsuo Inagaki , Makoto Totani , Yasuhiro Teshima , Hiroshi Iimura
发明人： Yutaka Higashiguchi , Mitsuo Inagaki , Makoto Totani , Yasuhiro Teshima , Hiroshi Iimura
IPC分类号： H01L23/12 , H01L21/60 , H01L23/13 , H01L23/498 , H05K1/11 , H05K3/34 , H05K3/42 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/81 , H01L23/13 , H01L23/49827 , H01L24/97 , H05K1/112 , H01L2224/13111 , H01L2224/13147 , H01L2224/16235 , H01L2224/16237 , H01L2224/48091 , H01L2224/48227 , H01L2224/49109 , H01L2224/75251 , H01L2224/81136 , H01L2224/8114 , H01L2224/81801 , H01L2224/97 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/1532 , H01L2924/16195 , H01L2924/181 , H05K2201/09827 , H05K2201/09845 , H05K2201/10234 , H05K2201/10734 , H05K2203/0455 , H05K3/3431 , H05K3/42
摘要： A wiring substrate has a semiconductor device mounted thereonto, the semiconductor device having ball-shaped externally connecting parts. The wiring substrate includes through holes at positions corresponding to the ball-shaped externally connecting parts and electric conductors provided inside and around the through holes. Land portions of the electric conductors, at which the electric conductors are engaged with the externally connecting parts, includes sectional tapering portions, respectively. Further, the through holes have sectional tapering portions at edge portions in proximity to the land portions, respectively. The ball-shaped externally connecting parts of the semiconductor device are engaged with the land portions provided around the through holes of the wiring substrate and having the sectional tapering portions, respectively.
摘要翻译：布线基板具有安装在其上的半导体器件，该半导体器件具有球形的外部连接部分。布线基板在对应于球形外部连接部分的位置和设置在通孔内部和周围的电导体之间包括通孔。电导体与外部连接部分接合的电导体的陆部分别包括截面渐缩部分。此外，通孔分别在接合部分的边缘部分具有截面渐缩部分。半导体器件的球形外部连接部分分别与设置在布线基板的通孔周围的接合部分接合并具有截面锥形部分。

78. 发明授权

US5722160A Packaging method of BGA type electronic component 失效
标题翻译： BGA型电子元器件的封装方法
公开(公告)号：US5722160A
公开(公告)日：1998-03-03
申请号：US547811
申请日：1995-10-25
申请人： Yasuhiro Uemura , Masakazu Sakaue
发明人： Yasuhiro Uemura , Masakazu Sakaue
IPC分类号： H05K1/11 , H05K3/34 , H05K3/42
CPC分类号： H01L24/73 , H05K3/3436 , H01L2224/16237 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/351 , H05K1/11 , H05K2201/094 , H05K2201/10666 , H05K2203/0455 , H05K3/3431 , H05K3/3484 , H05K3/42 , Y02P70/613 , Y10T29/49144
摘要： A packaging method of an electronic component for packaging the electronic component to a packaging substrate comprises the steps of: forming a predetermined quantity of solder bumps at connection portions of the electronic component; forming through-holes and pads on the packaging substrate in such a manner as to correspond to the solder bumps; applying a solder paste to pad portions of the through-holes and the pads formed on the surface of the packaging substrate in such a manner as to attain a specific quantity of solder components with the predetermined quantity of the solder bump; and heating the electronic component and the packaging substrate to a predetermined temperature such that button-shaped connection bumps having a predetermined height are formed between the pads and the packaging substrate so as to connect the electronic component and the packaging substrate and to keep a predetermined gap between the electronic component and the packaging substrate, and cylindrical-post connection bumps are formed between the through-holes and the packaging substrate in accordance with this predetermined gap so as to connect the electronic component and the packaging substrate. In this way, the cylindrical-post connection bumps are formed in association with the button-shaped connection bumps.
摘要翻译：用于将电子部件封装到封装基板的电子部件的封装方法包括以下步骤：在电子部件的连接部形成规定量的焊料凸块; 以与所述焊料凸块相对应的方式在所述封装基板上形成通孔和焊盘; 以形成在所述封装基板的表面上的所述通孔和所述焊盘的焊盘部分的方式施加焊膏，以达到预定量的所述焊料凸块的特定量的焊料成分; 并且将电子部件和包装基板加热到预定温度，使得在焊盘和封装基板之间形成具有预定高度的按钮形连接凸块，以便连接电子部件和封装基板并保持预定的间隙在电子部件和包装基板之间，并且根据该预定间隙在通孔和封装基板之间形成圆柱形连接凸起，以连接电子部件和封装基板。以这种方式，圆柱形连接凸块与按钮形连接凸块相关联地形成。

79. 发明授权

US5644103A Packaging electrical components having a scallop formed in an edge of a circuit board 失效
标题翻译：包括形成在电路板的边缘中的扇贝的电子部件
公开(公告)号：US5644103A
公开(公告)日：1997-07-01
申请号：US337245
申请日：1994-11-10
申请人： Stephen R. Pullen , Walter R. Hedlund, III
发明人： Stephen R. Pullen , Walter R. Hedlund, III
IPC分类号： H05K1/02 , H05K1/14 , H05K1/18 , H05K3/00 , H05K3/34 , H05K3/36 , H05K3/40 , H05K3/42 , H05K5/00 , H05K7/20
CPC分类号： H05K7/20463 , H05K1/141 , H05K3/3442 , H05K3/403 , H05K5/0095 , H05K7/209 , H01L2224/05553 , H01L2924/09701 , H05K1/0203 , H05K1/021 , H05K1/182 , H05K2201/09072 , H05K2201/09181 , H05K2201/09645 , H05K2201/10666 , H05K2203/0455 , H05K3/0052 , H05K3/0061 , H05K3/368 , H05K3/42 , Y02P70/613 , Y10T29/49179 , Y10T29/49211
摘要： A structure includes a baseplate, a circuit board parallel and adjacent to the baseplate, and an electronic component. The circuit board has an edge with a scallop formed in the edge, and the scallop is plated with a conductive material. The electronic component includes a power-dissipating surface and a pad for making electrical connection. The electronic component is mounted with the power-dissipating surface in contact with the baseplate and the pad electrically connected to the conductive material.
摘要翻译：一种结构包括基板，平行并邻近基板的电路板和电子部件。电路板具有边缘形成的扇形边缘，扇形电镀有导电材料。电子部件包括功率消散表面和用于进行电连接的焊盘。电子部件安装有功率消散表面与基板接触，并且焊盘电连接到导电材料。

80. 发明授权

US5605477A Flexible etched circuit assembly 失效
标题翻译：柔性蚀刻电路组件
公开(公告)号：US5605477A
公开(公告)日：1997-02-25
申请号：US372269
申请日：1995-01-13
申请人： Jeff C. Wu , Bobby G. Ward
发明人： Jeff C. Wu , Bobby G. Ward
IPC分类号： H01R12/50 , H01R12/71 , H01R12/79 , H01R13/719 , H05K1/02 , H05K1/14 , H05K1/18 , H05K3/00 , H05K3/30 , H05K3/34 , H05K3/36 , H01R9/09 , H01R13/66
CPC分类号： H05K1/147 , H01R12/79 , H01R23/6873 , H05K1/0233 , H01R12/714 , H01R13/719 , H05K1/0216 , H05K1/141 , H05K1/189 , H05K2201/056 , H05K2201/086 , H05K2201/10015 , H05K2201/10189 , H05K2201/1059 , H05K2201/10636 , H05K2201/10734 , H05K2203/0455 , H05K2203/101 , H05K3/308 , H05K3/3494 , H05K3/363 , H05K3/4691 , Y02P70/611
摘要： An electrical connector assembly (10) is mounted on a printed circuit board (18) and includes a flexible etched circuit (FEC) (15) with electrical traces thereon. The FEC (15) is part of an electrical circuit which includes electrical components (22,24), electrical contacts (23), a ground path (12, 12a), and an electrical connection (90). The FEC can include various electrical components (22,24), for example, in order to filter the electrical circuit.
摘要翻译：电连接器组件（10）安装在印刷电路板（18）上并且包括其上具有电痕迹的柔性蚀刻电路（FEC）（15）。 FEC（15）是包括电气部件（22,24），电触点（23），接地路径（12,12a）和电连接（90）的电路的一部分。 FEC可以包括例如各种电气部件（22,24），以便过滤电路。

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