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71. 发明申请

US20070284746A1 NANO-ELECTRODE-ARRAY FOR INTEGRATED CIRCUIT INTERCONNECTS 审中-公开
标题翻译：用于集成电路互连的纳米电极阵列
公开(公告)号：US20070284746A1
公开(公告)日：2007-12-13
申请号：US11742328
申请日：2007-04-30
申请人： Sergey Lopatin , Robert Fiordalice , Faivel Pintchovski , Igor Ivanov , Wen Kong , Artur Kolics
发明人： Sergey Lopatin , Robert Fiordalice , Faivel Pintchovski , Igor Ivanov , Wen Kong , Artur Kolics
IPC分类号： H01L21/82
CPC分类号： H01L21/76843 , H01L21/76844 , H01L21/76846 , H01L21/76868 , H01L21/76874 , Y10S977/723
摘要： An integrated circuit is provided including an integrated circuit having a trench and via provided in a dielectric layer. A nano-electrode-array is over the dielectric layer in the trench and via, and a conductor is over the nano-electrode-array. The conductor and the nano-electrode-array are coplanar with a surface of the dielectric layer.
摘要翻译：提供一种集成电路，其包括具有在电介质层中设置的沟槽和通孔的集成电路。纳米电极阵列位于沟槽和通孔中的电介质层的上方，导体在纳米电极阵列的上方。导体和纳米电极阵列与电介质层的表面共面。

72. 发明申请

US20060174912A1 Wafer cleaning solution for cobalt electroless application 有权
标题翻译：用于钴无电镀的晶圆清洗液
公开(公告)号：US20060174912A1
公开(公告)日：2006-08-10
申请号：US11053501
申请日：2005-02-08
申请人： Ramin Emami , Timothy Weidman , Sergey Lopatin , Hongbin Fang , Arulkumar Shanmugasundram
发明人： Ramin Emami , Timothy Weidman , Sergey Lopatin , Hongbin Fang , Arulkumar Shanmugasundram
IPC分类号： B08B6/00 , H01L21/4763 , C25F1/00
CPC分类号： C23C18/1844 , C11D7/06 , C11D7/08 , C11D7/265 , C11D11/0047 , C23F1/18 , C23G1/103 , H01L21/02074 , H01L21/76826 , H01L21/76849 , H01L21/76877 , H01L21/76883
摘要： A method and cleaning solution that removes contaminants from a dielectric material and polished surfaces of copper interconnect structures prior to an electroless deposition of a capping layer without substantially adversely affecting the interconnect formed therefrom are disclosed. The cleaning solution includes combinations of a core mixture and sulfuric acid or sulfonic compounds such as sulfonic acids that include methanesulfonic acid. In one embodiment, the core mixture includes a citric acid solution and a pH adjuster such as tetra-methyl ammonium hydroxide or ammonia. One embodiment of the method includes providing a planarized substrate, applying the cleaning solution to the substrate to simultaneously clean at least one metal feature and a dielectric material of the substrate, and depositing the metal capping layer selectively on the at least one metal feature using electroless deposition.
摘要翻译：公开了一种方法和清洁溶液，其在电绝缘沉积覆盖层之前从电介质材料和铜互连结构的抛光表面去除污染物，而基本上不利地影响由其形成的互连。清洁溶液包括核混合物和硫酸或磺酸化合物如包括甲磺酸的磺酸的组合。在一个实施方案中，核心混合物包括柠檬酸溶液和pH调节剂如四甲基氢氧化铵或氨。该方法的一个实施例包括提供平坦化的基板，将清洁溶液施加到基板上以同时清洁基板的至少一个金属特征和介电材料，并且使用无电镀将金属覆盖层选择性地沉积在至少一个金属特征上沉积

73. 发明授权

US06974767B1 Chemical solution for electroplating a copper-zinc alloy thin film 有权
标题翻译：用于电镀铜锌合金薄膜的化学溶液
公开(公告)号：US06974767B1
公开(公告)日：2005-12-13
申请号：US10081074
申请日：2002-02-21
申请人： Sergey Lopatin
发明人： Sergey Lopatin
IPC分类号： C25D3/58 , C25D7/12 , H01L21/288 , H01L21/768
CPC分类号： H01L21/7685 , C25D3/58 , C25D7/12 , H01L21/2885 , H01L21/76838
摘要： A method of fabricating a semiconductor device, having a Cu—Zn alloy thin film (30) formed on a Cu surface (20) by electroplating the Cu surface (20) in a unique chemical solution containing salts of zinc (Zn) and copper (Cu), their complexing agents, a pH adjuster, and surfactants; and a semiconductor device thereby formed. The method controls the parameters of pH, temperature, and time in order to form a uniform Cu—Zn alloy thin film (30) for reducing electromigration in Cu interconnect lines by decreasing the drift velocity therein which decreases the Cu migration rate in addition to decreasing the void formation rate, for improving Cu interconnect reliability, and for increasing corrosion resistance.
摘要翻译：一种制造半导体器件的方法，其具有通过以含有锌（Zn）和铜（Zn）的盐的独特化学溶液电镀Cu表面（20）而形成在Cu表面（20）上的Cu-Zn合金薄膜（30） Cu），它们的络合剂，pH调节剂和表面活性剂; 并由此形成半导体器件。该方法控制pH，温度和时间的参数，以形成均匀的Cu-Zn合金薄膜（30），用于通过降低Cu互连线中的漂移速度来减少Cu迁移速率，同时减少Cu迁移速率空隙形成速率，提高Cu互连可靠性和提高耐腐蚀性。

74. 发明申请

US20050164497A1 Pretreatment for electroless deposition 有权
标题翻译：化学沉积预处理
公开(公告)号：US20050164497A1
公开(公告)日：2005-07-28
申请号：US10934850
申请日：2004-09-03
申请人： Sergey Lopatin , Arulkumar Shanmugasundram , Ramin Emami , Hongbin Fang
发明人： Sergey Lopatin , Arulkumar Shanmugasundram , Ramin Emami , Hongbin Fang
IPC分类号： H01L21/00 , H01L21/02 , H01L21/288 , H01L21/44 , H01L21/768
CPC分类号： H01L21/02074 , H01L21/288 , H01L21/67161 , H01L21/6723 , H01L21/76849 , H01L21/76862 , H01L21/76864
摘要： Embodiments of the present invention relate to an apparatus and method of annealing substrates in a thermal anneal chamber and/or a plasma anneal chamber before electroless deposition thereover. In one embodiment, annealing in a thermal anneal chamber comprises heating the substrate in a vacuum environment while providing a gas, such as a noble gas, a reducing gas such as hydrogen gas, a non-reducing gas such as nitrogen gas, or combinations thereof. In another embodiment, annealing in a plasma chamber comprises annealing the substrate in a plasma, such as a plasma from an argon gas, helium gas, hydrogen gas, or combinations thereof.
摘要翻译：本发明的实施例涉及在其之前的无电沉积之前在热退火室和/或等离子体退火室中退火衬底的装置和方法。在一个实施例中，热退火室中的退火包括在真空环境中加热衬底，同时提供诸如惰性气体的气体，诸如氢气的还原气体，诸如氮气的非还原性气体，或其组合。在另一个实施例中，等离子体室中的退火包括在诸如来自氩气，氦气，氢气或其组合的等离子体的等离子体中退火衬底。

75. 发明申请

US20050101130A1 Method and tool of chemical doping CoW alloys with Re for increasing barrier properties of electroless capping layers for IC Cu interconnects 失效
标题翻译：化学掺杂CoW合金与Re的方法和工具，用于增加IC Cu互连的无电覆盖层的阻隔性能
公开(公告)号：US20050101130A1
公开(公告)日：2005-05-12
申请号：US10703769
申请日：2003-11-07
申请人： Sergey Lopatin , Arulkumar Shanmugasundram , Dmitry Lubomirsky , Ian Pancham
发明人： Sergey Lopatin , Arulkumar Shanmugasundram , Dmitry Lubomirsky , Ian Pancham
IPC分类号： C23C18/16 , C23C18/18 , C23C18/50 , H01L21/288 , H01L21/44 , H01L21/768
CPC分类号： H01L21/76846 , C23C18/1651 , C23C18/1692 , C23C18/1844 , C23C18/50 , H01L21/288 , H01L21/76849 , H01L21/76858 , H01L21/76874
摘要： A method for fabricating a capping layer with enhanced barrier resistance to both copper and oxygen diffusion, comprises forming a capping layer on a conductive surface of an interconnect, wherein the capping layer comprises cobalt (Co), tungsten (W), rhenium (Re), and at least one of phosphorus (P) and boron (B). In an embodiment of the invention, forming the capping layer comprises exposing the conductive surface to an electroless capping solution comprising a cobalt source, a tungsten source, a rhenium source, and at least one of a phosphorus source and a boron source, and annealing the capping layer.
摘要翻译：一种用于制造具有对铜和氧扩散的阻挡性能增强的覆盖层的方法，包括在互连的导电表面上形成覆盖层，其中所述覆盖层包括钴（Co），钨（W），铼（Re），和磷（P）和硼（B）中的至少一种。在本发明的一个实施方案中，形成覆盖层包括将导电表面暴露于包含钴源，钨源，铼源和磷源和硼源中的至少一个的无电覆盖溶液中，并将盖层

76. 发明申请

US20050088647A1 Apparatus and method of detecting the electroless deposition endpoint 失效
标题翻译：检测无电沉积终点的装置和方法
公开(公告)号：US20050088647A1
公开(公告)日：2005-04-28
申请号：US10944228
申请日：2004-09-17
申请人： Arulkumar Shanmugasundram , Manoocher Birang , Ian Pancham , Sergey Lopatin
发明人： Arulkumar Shanmugasundram , Manoocher Birang , Ian Pancham , Sergey Lopatin
IPC分类号： C23C18/16 , G01B11/06 , G01J3/28 , G01N21/84 , G01N21/95 , H01L21/66
CPC分类号： C23C18/1667 , C23C18/1651 , C23C18/1675 , G01B11/0683 , G01N21/8422 , G01N21/9501
摘要： An apparatus and a method of controlling an electroless deposition process by directing electromagnetic radiation towards the surface of a substrate and detecting the change in intensity of the electromagnetic radiation at one or more wavelengths reflected off features on the surface of the substrate. In one embodiment the detected end of an electroless deposition process step is measured while the substrate is moved relative to the detection mechanism. In another embodiment multiple detection points are used to monitor the state of the deposition process across the surface of the substrate. In one embodiment the detection mechanism is immersed in the electroless deposition fluid on the substrate. In one embodiment a controller is used to monitor, store, and/or control the electroless deposition process by use of stored process values, comparison of data collected at different times, and various calculated time dependent data.
摘要翻译：通过将电磁辐射引导到衬底的表面并检测在基底表面上的特征反射的一个或多个波长处的电磁辐射的强度变化来控制无电沉积工艺的装置和方法。在一个实施例中，在基板相对于检测机构移动时测量无电沉积工艺步骤的检测结束。在另一个实施方案中，多个检测点用于监测穿过基底表面的沉积工艺的状态。在一个实施例中，检测机构浸没在基板上的无电沉积流体中。在一个实施例中，控制器用于通过使用存储的过程值，在不同时间收集的数据的比较以及各种计算的时间相关数据来监视，存储和/或控制无电沉积过程。

77. 发明申请

US20050085031A1 Heterogeneous activation layers formed by ionic and electroless reactions used for IC interconnect capping layers 审中-公开
标题翻译：通过用于IC互连覆盖层的离子和无电反应形成的非均相活化层
公开(公告)号：US20050085031A1
公开(公告)日：2005-04-21
申请号：US10967099
申请日：2004-10-15
申请人： Sergey Lopatin , Arulkumar Shanmugasundram , Yosef Shacham-Diamand , Timothy Weidman , Dmitry Lubomirsky
发明人： Sergey Lopatin , Arulkumar Shanmugasundram , Yosef Shacham-Diamand , Timothy Weidman , Dmitry Lubomirsky
IPC分类号： C23C18/18 , C23C18/50 , H01L21/285 , H01L21/288 , H01L21/768 , H01L21/8238
CPC分类号： H01L21/76849 , C23C18/1844 , C23C18/50 , H01L21/28562 , H01L21/288 , H01L21/76867 , H01L21/76868 , H01L21/76874
摘要： Embodiments of the invention generally provide compositions of activation-alloy solutions, methods to deposit activation-alloys and electronic devices including activation-alloys and capping layers. In one embodiment, a method for depositing a capping layer for a semiconductor device is provided which includes exposing a conductive layer on a substrate surface to an activation-alloy solution, forming an activation-alloy layer on the conductive layer using the activation-alloy solution, and depositing the capping layer on the activation-alloy layer using an electroless deposition solution.
摘要翻译：本发明的实施方案通常提供活化合金溶液的组合物，沉积活化合金的方法和包括活化合金和覆盖层的电子器件。在一个实施例中，提供了一种用于沉积半导体器件的覆盖层的方法，其包括将基板表面上的导电层暴露于活化合金溶液，使用活化合金溶液在导电层上形成活化合金层，并使用无电镀沉积溶液将所述封盖层沉积在所述活化合金层上。

78. 发明授权

US06811671B1 Method of controlling zinc-doping in a copper-zinc alloy thin film electroplated on a copper surface and a semiconductor device thereby formed 有权
标题翻译：在铜表面电镀的铜 - 锌合金薄膜和由此形成的半导体器件中控制锌掺杂的方法
公开(公告)号：US06811671B1
公开(公告)日：2004-11-02
申请号：US10082433
申请日：2002-02-22
申请人： Sergey Lopatin , Alexander H. Nickel , Joffre F. Bernard
发明人： Sergey Lopatin , Alexander H. Nickel , Joffre F. Bernard
IPC分类号： C25D712
CPC分类号： H01L21/7685 , C25D3/58 , C25D5/50 , H01L21/2885 , H01L21/76858 , H01L21/76864 , H01L2221/1078 , Y10S428/935 , Y10T428/12528 , Y10T428/12903 , Y10T428/1291
摘要： A method of fabricating a semiconductor device, having a reduced-oxygen Cu—Zn alloy thin film (30) electroplated on a Cu surface (20) by electroplating, using an electroplating apparatus, the Cu surface (20) in a unique chemical solution containing salts of zinc (Zn) and copper (Cu), their complexing agents, a pH adjuster, and surfactants; and annealing the electroplated Cu—Zn alloy thin film (30); and a semiconductor device thereby formed. The method controls the parameters of pH, temperature, and time in order to form a uniform reduced-oxygen Cu—Zn alloy thin film (30), having a controlled Zn content, for reducing electromigration on the Cu—Zn/Cu structure by decreasing the drift velocity therein which decreases the Cu migration rate in addition to decreasing the void formation rate, for improving device reliability, and for increasing corrosion resistance.
摘要翻译：一种制造半导体器件的方法，其具有通过使用电镀装置电镀电镀在Cu表面（20）上的还原氧的Cu-Zn合金薄膜（30），所述Cu表面（20）在独特的化学溶液中，所述溶液含有锌（Zn）和铜（Cu）的盐，它们的络合剂，pH调节剂和表面活性剂; 并对电镀Cu-Zn合金薄膜（30）退火; 并由此形成半导体器件。该方法控制pH，温度和时间的参数，以形成具有受控Zn含量的均匀的还原氧Cu-Zn合金薄膜（30），用于通过减少Cu-Zn / Cu结构的电迁移来减少其中除了降低空隙形成速率之外还减少Cu迁移速率，提高器件可靠性和提高耐腐蚀性的漂移速度。

79. 发明授权

US06630741B1 Method of reducing electromigration by ordering zinc-doping in an electroplated copper-zinc interconnect and a semiconductor device thereby formed 有权
标题翻译：通过在电镀铜 - 锌互连和由此形成的半导体器件中排序锌掺杂来减少电迁移的方法
公开(公告)号：US06630741B1
公开(公告)日：2003-10-07
申请号：US10016645
申请日：2001-12-07
申请人： Sergey Lopatin , Paul L. King , Joffre F. Bernard
发明人： Sergey Lopatin , Paul L. King , Joffre F. Bernard
IPC分类号： H01L2352
CPC分类号： H01L21/76846 , H01L21/2885 , H01L21/76849 , H01L21/76858 , H01L21/76873 , H01L21/76877 , H01L23/5226 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method of reducing electromigration in a graded reduced-oxygen dual-inlaid copper interconnect line by filling a via with a graded Cu-rich Cu—Zn alloy fill electroplated on a Cu surface using a stable chemical solution, and by controlling and ordering the Zn-doping thereof, which also improves interconnect reliability and corrosion resistance, and a semiconductor device thereby formed. The method involves using a graded reduced-oxygen Cu—Zn alloy as fill for the via in forming the dual-inlaid interconnect structure. The graded alloy fill is formed by electroplating, while varying electroplating parameters, the Cu surface in a unique chemical solution containing salts of Zn and Cu, their complexing agents, a pH adjuster, and surfactants, thereby electroplating the graded fill on the Cu surface; and annealing the electroplated graded Cu—Zn alloy fill; and planarizing the Cu—Zn alloy fill, thereby forming the graded reduced-oxygen dual-inlaid copper interconnect line.
摘要翻译：通过使用稳定的化学溶液电镀在Cu表面上的分级富Cu Cu-Zn合金填充通孔，并且通过控制和排序Zn来减少分级的还原氧双嵌入铜互连线中的电迁移的方法并且还提高了互连可靠性和耐腐蚀性，并且由此形成了半导体器件。该方法包括在形成双镶嵌互连结构中使用渐变的还原氧Cu-Zn合金作为通孔的填充物。分级合金填充是通过电镀而形成的，而不同的电镀参数，Cu表面在独特的含有Zn和Cu盐的化学溶液，它们的络合剂，pH调节剂和表面活性剂中，从而将分级填料电镀在Cu表面上; 并对电镀分级的Cu-Zn合金填料进行退火; 并且对Cu-Zn合金填充物进行平坦化，从而形成分级的还原氧双嵌入铜互连线。

80. 发明授权

US06624074B1 Method of fabricating a semiconductor device by calcium doping a copper surface using a chemical solution 有权
标题翻译：使用化学溶液通过钙掺杂铜表面制造半导体器件的方法
公开(公告)号：US06624074B1
公开(公告)日：2003-09-23
申请号：US10218532
申请日：2002-08-13
申请人： Sergey Lopatin , Joffre F. Bernard , Paul L. King
发明人： Sergey Lopatin , Joffre F. Bernard , Paul L. King
IPC分类号： H01L2144
CPC分类号： H01L21/7685 , H01L21/288 , H01L21/76862 , H01L21/76864 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating a semiconductor device having contaminant-reduced Ca-doped Cu surfaces formed on Cu interconnects by cost-effectively depositing a Cu—Ca—X surface and subsequently removing the contaminant layer contained therein; and a device thereby formed. In the Cu—Ca—X surface, where contaminant X═C, S, and O, removal of the contaminant from such surface is achieved by (a) immersing the Cu interconnect surface into an electroless plating solution comprising Cu salts, Ca salts, their complexing agents, a reducing agent, a pH adjuster, and at least one surfactant for facilitating Ca-doping of the Cu interconnect material; and (b) annealing of the Cu—Ca—X surface under vacuum onto the underlying Cu interconnect material to form a Cu—Ca film on Cu interconnect structure, thereby producing a uniform Cu—Ca film (i.e., Cu-rich with 0.2-5% Ca) on the Cu surface of an interconnect for maximizing Ca—Cu/Cu interconnect structure reliability, electromigration resistance, and corrosion prevention. The annealing step primarily removes O and secondarily removes C and S, especially when performed under vacuum, an inert gas, or a reducing ambient such as ammonia (NH3) plasma. Thus, the resultant device then comprises a distinctive contaminant-reduced Ca—Cu/Cu interconnect structure.
摘要翻译：通过成本有效地沉积Cu-Ca-X表面并随后除去其中包含的污染物层，制造在Cu互连上形成的具有污染减少的Ca掺杂的Cu表面的半导体器件的方法; 和由此形成的装置。在污染物X = C，S和O的Cu-Ca-X表面中，通过（a）将Cu互连表面浸入包含Cu盐，Ca盐，它们的络合剂，还原剂，pH调节剂和用于促进Cu互连材料的Ca掺杂的至少一种表面活性剂; （b）将Cu-Ca-X表面在真空下退火到下面的Cu互连材料上，以在Cu互连结构上形成Cu-Ca膜，从而产生均匀的Cu-Ca膜（即富含Cu- 5％Ca）在铜互连的Cu表面，以最大限度地提高Ca-Cu / Cu互连结构的可靠性，抗电迁移和防腐蚀。退火步骤主要去除O，并且二次除去C和S，特别是在真空，惰性气体或还原环境如氨（NH 3）等离子体下进行时）。因此，所得到的器件然后包括不同的污染物减少的Ca-Cu / Cu互连结构。

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