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    • 74. 发明授权
    • Lanthanide doped TiOx films
    • 掺镧系TiOx薄膜
    • US08102013B2
    • 2012-01-24
    • US12401404
    • 2009-03-10
    • Kie Y. AhnLeonard Forbes
    • Kie Y. AhnLeonard Forbes
    • H01L21/02
    • H01L21/0228C23C16/405C23C16/45529C23C16/45531H01L21/02186H01L21/02192H01L21/02194H01L21/022H01L21/28194H01L21/28273H01L21/28282H01L21/3115H01L21/3141H01L21/31604H01L29/4234H01L29/513H01L29/517
    • The use of atomic layer deposition (ALD) to form an amorphous dielectric layer of titanium oxide (TiOX) doped with lanthanide elements, such as samarium, europium, gadolinium, holmium, erbium and thulium, produces a reliable structure for use in a variety of electronic devices. The dielectric structure is formed by depositing titanium oxide by atomic layer deposition onto a substrate surface using precursor chemicals, followed by depositing a layer of a lanthanide dopant, and repeating to form a sequentially deposited interleaved structure. Such a dielectric layer may be used as the gate insulator of a MOSFET, as a capacitor dielectric, or as a tunnel gate insulator in flash memories, because the high dielectric constant (high-k) of the layer provides the functionality of a thinner silicon dioxide layer, and because the reduced leakage current of the dielectric layer when the percentage of the lanthanide element doping is optimized.
    • 使用原子层沉积(ALD)形成掺杂有镧系元素(例如钐,铕,钆,钬,铒和and)的氧化钛(TiOX)的非晶电介质层,产生可靠的结构,用于各种 电子设备。 通过使用前体化学品将原子层沉积氧化钛沉积到衬底表面上,然后沉积镧系元素掺杂剂层并重复以形成顺序沉积的交错结构而形成电介质结构。 这样的电介质层可以用作MOSFET的栅极绝缘体,作为电容器电介质,或者作为闪存中的隧道栅极绝缘体,因为该层的高介电常数(高k)提供更薄的硅的功能 并且由于优化了镧系元素掺杂的百分比时介电层的漏电流减小。
    • 75. 发明申请
    • METHODS OF FORMING A DIELECTRIC CONTAINING DYSPROSIUM DOPED HAFNIUM OXIDE
    • 形成含电介质掺杂氧化镝的方法
    • US20110287601A1
    • 2011-11-24
    • US13195487
    • 2011-08-01
    • Kie Y. AhnLeonard Forbes
    • Kie Y. AhnLeonard Forbes
    • H01L21/316H01L21/20H01L21/28
    • H01L21/02181C23C16/405C23C16/45529H01L21/022H01L21/0228H01L21/28194H01L21/3141H01L21/31645H01L29/513H01L29/517H01L29/78
    • The use of a monolayer or partial monolayer sequencing process, such as atomic layer deposition, to form a dielectric layer of hafnium oxide doped with dysprosium and a method of fabricating such a combination produces a reliable structure for use in a variety of electronic devices. Forming the dielectric structure can include depositing hafnium oxide onto a substrate surface using precursor chemicals, followed by depositing dysprosium oxide onto the substrate using precursor chemicals, and repeating to form a thin laminate structure. A dielectric layer of dysprosium doped hafnium oxide may be used as the gate insulator of a MOSFET, as a capacitor dielectric in a DRAM, as a tunnel gate insulator in flash memories, or as a dielectric in NROM devices, because the high dielectric constant (high-k) of the film provides the functionality of a thinner silicon dioxide film, and because the reduced leakage current of the dielectric layer when the percentage of dysprosium doping is optimized improves memory function.
    • 使用单层或部分单层测序方法(例如原子层沉积)来形成掺杂有镝的氧化铪的电介质层和制造这种组合的方法产生用于各种电子器件的可靠结构。 形成电介质结构可以包括使用前体化学物质将氧化铪沉积到衬底表面上,然后使用前体化学品将氧化镝沉积到衬底上,并重复形成薄的层压结构。 镝掺杂氧化铪的电介质层可用作MOSFET的栅极绝缘体,作为DRAM中的电容器电介质,作为闪存中的隧道栅极绝缘体或NROM器件中的电介质,因为高介电常数( 高k)的薄膜提供更薄的二氧化硅膜的功能,并且由于优化了镝掺杂的百分比时介电层的漏电流减小,从而提高记忆功能。
    • 78. 发明授权
    • Strained semiconductor by full wafer bonding
    • 应变半导体通过全晶圆键合
    • US07989311B2
    • 2011-08-02
    • US12243617
    • 2008-10-01
    • Leonard ForbesJoseph E. GeusicSalman Akram
    • Leonard ForbesJoseph E. GeusicSalman Akram
    • H01L21/425H01L21/76
    • H01L21/76254
    • One aspect of this disclosure relates to a method for forming a wafer with a strained semiconductor. In various embodiments of the method, a predetermined contour is formed in one of a semiconductor membrane and a substrate wafer. The semiconductor membrane is bonded to the substrate wafer and the predetermined contour is straightened to induce a predetermined strain in the semiconductor membrane. In various embodiments, a substrate wafer is flexed into a flexed position, a portion of the substrate wafer is bonded to a semiconductor layer when the substrate wafer is in the flexed position, and the substrate wafer is relaxed to induce a predetermined strain in the semiconductor layer. Other aspects and embodiments are provided herein.
    • 本公开的一个方面涉及一种用应变半导体形成晶片的方法。 在该方法的各种实施例中,在半导体膜和衬底晶片之一上形成预定轮廓。 将半导体膜结合到基板晶片上,并且将预定轮廓拉直以在半导体膜中引起预定应变。 在各种实施例中,衬底晶片弯曲到弯曲位置,当衬底晶片处于弯曲位置时,衬底晶片的一部分结合到半导体层,并且衬底晶片被松弛以在半导体中引起预定应变 层。 本文提供了其它方面和实施例。
    • 79. 发明授权
    • Method of forming a film containing dysprosium oxide and hafnium oxide using atomic layer deposition
    • 使用原子层沉积法形成含有氧化镝和氧化铪的膜的方法
    • US07989285B2
    • 2011-08-02
    • US12390920
    • 2009-02-23
    • Kie Y. AhnLeonard Forbes
    • Kie Y. AhnLeonard Forbes
    • H01L21/8242
    • H01L21/02181C23C16/405C23C16/45529H01L21/022H01L21/0228H01L21/28194H01L21/3141H01L21/31645H01L29/513H01L29/517H01L29/78
    • The use of atomic layer deposition (ALD) to form a dielectric layer of hafnium oxide (HfO2) doped with dysprosium (Dy) and a method of fabricating such a combination gate and dielectric layer produces a reliable structure for use in a variety of electronic devices. Forming the dielectric structure includes depositing hafnium oxide using atomic layer deposition onto a substrate surface using precursor chemicals, followed by depositing dysprosium oxide onto the substrate using precursor chemicals, and repeating to form the thin laminate structure. A dielectric layer of dysprosium doped hafnium oxide may be used as the gate insulator of a MOSFET, as a capacitor dielectric in a DRAM, as a tunnel gate insulator in flash memories, or as a dielectric in NROM devices, because the high dielectric constant (high-k) of the film provides the functionality of a thinner silicon dioxide film, and because the reduced leakage current of the dielectric layer when the percentage of dysprosium doping is optimized improves memory function.
    • 使用原子层沉积(ALD)形成掺杂有镝(Dy)的氧化铪(HfO 2)的电介质层和制造这种组合栅极和电介质层的方法产生用于各种电子器件的可靠结构 。 形成电介质结构包括使用前体化学品将原子层沉积物沉积到衬底表面上,然后使用前体化学品将氧化镝沉积到衬底上,并重复形成薄的层压结构。 镝掺杂氧化铪的电介质层可用作MOSFET的栅极绝缘体,作为DRAM中的电容器电介质,作为闪存中的隧道栅极绝缘体或NROM器件中的电介质,因为高介电常数( 高k)的薄膜提供更薄的二氧化硅膜的功能,并且由于优化了镝掺杂的百分比时介电层的漏电流减小,从而提高记忆功能。