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    • 1. 发明授权
    • Strained semiconductor by full wafer bonding
    • 应变半导体通过全晶圆键合
    • US07989311B2
    • 2011-08-02
    • US12243617
    • 2008-10-01
    • Leonard ForbesJoseph E. GeusicSalman Akram
    • Leonard ForbesJoseph E. GeusicSalman Akram
    • H01L21/425H01L21/76
    • H01L21/76254
    • One aspect of this disclosure relates to a method for forming a wafer with a strained semiconductor. In various embodiments of the method, a predetermined contour is formed in one of a semiconductor membrane and a substrate wafer. The semiconductor membrane is bonded to the substrate wafer and the predetermined contour is straightened to induce a predetermined strain in the semiconductor membrane. In various embodiments, a substrate wafer is flexed into a flexed position, a portion of the substrate wafer is bonded to a semiconductor layer when the substrate wafer is in the flexed position, and the substrate wafer is relaxed to induce a predetermined strain in the semiconductor layer. Other aspects and embodiments are provided herein.
    • 本公开的一个方面涉及一种用应变半导体形成晶片的方法。 在该方法的各种实施例中,在半导体膜和衬底晶片之一上形成预定轮廓。 将半导体膜结合到基板晶片上,并且将预定轮廓拉直以在半导体膜中引起预定应变。 在各种实施例中,衬底晶片弯曲到弯曲位置,当衬底晶片处于弯曲位置时,衬底晶片的一部分结合到半导体层,并且衬底晶片被松弛以在半导体中引起预定应变 层。 本文提供了其它方面和实施例。
    • 2. 发明申请
    • STRAINED SEMICONDUCTOR BY FULL WAFER BONDING
    • 应变半导体通过全波束焊接
    • US20090042360A1
    • 2009-02-12
    • US12243617
    • 2008-10-01
    • Leonard ForbesJoseph E. GeusicSalman Akram
    • Leonard ForbesJoseph E. GeusicSalman Akram
    • H01L21/425
    • H01L21/76254
    • One aspect of this disclosure relates to a method for forming a wafer with a strained semiconductor. In various embodiments of the method, a predetermined contour is formed in one of a semiconductor membrane and a substrate wafer. The semiconductor membrane is bonded to the substrate wafer and the predetermined contour is straightened to induce a predetermined strain in the semiconductor membrane. In various embodiments, a substrate wafer is flexed into a flexed position, a portion of the substrate wafer is bonded to a semiconductor layer when the substrate wafer is in the flexed position, and the substrate wafer is relaxed to induce a predetermined strain in the semiconductor layer. Other aspects and embodiments are provided herein.
    • 本公开的一个方面涉及一种用应变半导体形成晶片的方法。 在该方法的各种实施例中,在半导体膜和衬底晶片之一上形成预定轮廓。 将半导体膜结合到基板晶片上,并且将预定轮廓拉直以在半导体膜中引起预定应变。 在各种实施例中,衬底晶片弯曲到弯曲位置,当衬底晶片处于弯曲位置时,衬底晶片的一部分结合到半导体层,并且衬底晶片被松弛以在半导体中引起预定应变 层。 本文提供了其它方面和实施例。
    • 3. 发明申请
    • STRAINED SEMICONDUCTOR BY FULL WAFER BONDING
    • 应变半导体通过全波束焊接
    • US20110281407A1
    • 2011-11-17
    • US13192078
    • 2011-07-27
    • Leonard ForbesJoseph E. GeusicSalman Akram
    • Leonard ForbesJoseph E. GeusicSalman Akram
    • H01L21/8239H01L21/336H01L21/304
    • H01L21/76254
    • One aspect of this disclosure relates to a method for forming a wafer with a strained semiconductor. In various embodiments of the method, a predetermined contour is formed in one of a semiconductor membrane and a substrate wafer. The semiconductor membrane is bonded to the substrate wafer and the predetermined contour is straightened to induce a predetermined strain in the semiconductor membrane. In various embodiments, a substrate wafer is flexed into a flexed position, a portion of the substrate wafer is bonded to a semiconductor layer when the substrate wafer is in the flexed position, and the substrate wafer is relaxed to induce a predetermined strain in the semiconductor layer. Other aspects and embodiments are provided herein.
    • 本公开的一个方面涉及一种用应变半导体形成晶片的方法。 在该方法的各种实施例中,在半导体膜和衬底晶片之一上形成预定轮廓。 将半导体膜结合到基板晶片上,并且将预定轮廓拉直以在半导体膜中引起预定应变。 在各种实施例中,衬底晶片弯曲到弯曲位置,当衬底晶片处于弯曲位置时,衬底晶片的一部分结合到半导体层,并且衬底晶片被松弛以在半导体中引起预定应变 层。 本文提供了其它方面和实施例。
    • 5. 发明授权
    • Strained semiconductor by full wafer bonding
    • 应变半导体通过全晶圆键合
    • US08470687B2
    • 2013-06-25
    • US13192078
    • 2011-07-27
    • Leonard ForbesJoseph E. GeusicSalman Akram
    • Leonard ForbesJoseph E. GeusicSalman Akram
    • H01L21/425H01L21/76
    • H01L21/76254
    • One aspect of this disclosure relates to a method for forming a wafer with a strained semiconductor. In various embodiments of the method, a predetermined contour is formed in one of a semiconductor membrane and a substrate wafer. The semiconductor membrane is bonded to the substrate wafer and the predetermined contour is straightened to induce a predetermined strain in the semiconductor membrane. In various embodiments, a substrate wafer is flexed into a flexed position, a portion of the substrate wafer is bonded to a semiconductor layer when the substrate wafer is in the flexed position, and the substrate wafer is relaxed to induce a predetermined strain in the semiconductor layer. Other aspects and embodiments are provided herein.
    • 本公开的一个方面涉及一种用应变半导体形成晶片的方法。 在该方法的各种实施例中,在半导体膜和衬底晶片之一上形成预定轮廓。 将半导体膜结合到基板晶片上,并且将预定轮廓拉直以在半导体膜中引起预定应变。 在各种实施例中,衬底晶片弯曲到弯曲位置,当衬底晶片处于弯曲位置时,衬底晶片的一部分结合到半导体层,并且衬底晶片被松弛以在半导体中引起预定应变 层。 本文提供了其它方面和实施例。
    • 6. 发明授权
    • Strained semiconductor by full wafer bonding
    • 应变半导体通过全晶圆键合
    • US07439158B2
    • 2008-10-21
    • US10623788
    • 2003-07-21
    • Leonard ForbesJoseph E. GeusicSalman Akram
    • Leonard ForbesJoseph E. GeusicSalman Akram
    • H01L21/425H01L21/76
    • H01L21/76254
    • One aspect of this disclosure relates to a method for forming a wafer with a strained semiconductor. In various embodiments of the method, a predetermined contour is formed in one of a semiconductor membrane and a substrate wafer. The semiconductor membrane is bonded to the substrate wafer and the predetermined contour is straightened to induce a predetermined strain in the semiconductor membrane. In various embodiments, a substrate wafer is flexed into a flexed position, a portion of the substrate wafer is bonded to a semiconductor layer when the substrate wafer is in the flexed position, and the substrate wafer is relaxed to induce a predetermined strain in the semiconductor layer. Other aspects and embodiments are provided herein.
    • 本公开的一个方面涉及一种用应变半导体形成晶片的方法。 在该方法的各种实施例中,在半导体膜和衬底晶片之一上形成预定轮廓。 将半导体膜结合到基板晶片上,并且将预定轮廓拉直以在半导体膜中引起预定应变。 在各种实施例中,衬底晶片弯曲到弯曲位置,当衬底晶片处于弯曲位置时,衬底晶片的一部分结合到半导体层,并且衬底晶片被松弛以在半导体中引起预定应变 层。 本文提供了其它方面和实施例。
    • 9. 发明授权
    • Operating a memory device
    • 操作存储设备
    • US07109548B2
    • 2006-09-19
    • US10789203
    • 2004-02-27
    • Leonard ForbesJoseph E. Geusic
    • Leonard ForbesJoseph E. Geusic
    • H01L29/788
    • H01L29/66825H01L21/28273H01L27/10805H01L27/10873
    • A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored as charge on the floating gate. The data charge retention time on the floating gate is reduced. The data stored on the floating gate is dynamically refreshed. The floating gate transistor provides a dense and planar dynamic electrically alterable and programmable read only memory (DEAPROM) cell adapted for uses such as for a dynamic random access memory (DRAM) or a dynamically refreshed flash EEPROM memory. The floating gate transistor provides a high gain memory cell and low voltage operation.
    • 浮栅晶体管在与相邻栅极绝缘体的界面处具有降低的势垒能,允许在较低电压下跨越栅极绝缘体的更快的电荷转移。 数据作为电荷存储在浮动栅极上。 浮动栅极上的数据电荷保留时间减少。 存储在浮动门上的数据被动态刷新。 浮栅晶体管提供了适用于诸如用于动态随机存取存储器(DRAM)或动态刷新的快闪EEPROM存储器的密集且平面的动态电可更改和可编程只读存储器(DEAPROM)单元。 浮栅晶体管提供高增益存储单元和低电压操作。