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71. 发明授权

US5089085A Silicon carbide membrane for X-ray lithography and method for the prepartion thereof 失效
标题翻译：用于X射线光刻的硅碳膜及其制备方法
公开(公告)号：US5089085A
公开(公告)日：1992-02-18
申请号：US633047
申请日：1990-12-21
申请人： Meguru Kashida , Yoshihiro Kubota , Yoshihiko Nagata
发明人： Meguru Kashida , Yoshihiro Kubota , Yoshihiko Nagata
IPC分类号： G03F1/22 , G03F1/68 , H01L21/027
CPC分类号： G03F1/22
摘要： The inventive method provides a silicon carbide membrane for X-ray lithography having high performance in respect of stability against high energy beam irradiation. The method comprises depositing a silicon carbide film by sputtering on a silicon wafer as the substrate under such conditions that the thus deposited film is under a tensile stress in a specified range by keeping the substrate at a temperature higher than 500.degree. C. The thus deposited silicon carbide film is at least partly crystalline and the crystallinity thereof can be defined by the sharpness of a peak in the X-ray diffraction diagram of the membrane which can be assigned to the (1 1 1) plane of the crystalline silicon carbide.

72. 发明授权

US5075296A Azacyclooctadiene compound and pharmaceutical use 失效
标题翻译：氨基胆碱化合物和药物使用
公开(公告)号：US5075296A
公开(公告)日：1991-12-24
申请号：US484101
申请日：1990-02-23
申请人： Kenji Koga , Kiyoshi Tomioka , Yoshihiro Kubota , Makoto Asada , Kyosuke Kitoh
发明人： Kenji Koga , Kiyoshi Tomioka , Yoshihiro Kubota , Makoto Asada , Kyosuke Kitoh
IPC分类号： C07D317/58 , C07D317/60 , C07D405/06 , C07D413/06 , C07D491/04 , C07D491/056 , C07D491/14 , C07D491/147 , C07D498/14 , C07D499/14
CPC分类号： C07D405/06 , C07D317/58 , C07D317/60 , C07D413/06 , C07D491/04 , C07D491/14
摘要： An azacyclooctadiene compound having the formula (1) or a pharmacologically acceptable salt thereof is novel and useful as an anti-tumor agent. ##STR1## in which R1 is --CH2R, R being hydrogen, --COCH3, --OH, --NH2, --COOH or --OCOCH3, or may form --CH2--X--Y-- together with R2; R2 is hydrogen, an alkyl having 1 to 4 carbon atoms or --COR10, R10 being hydrogen, an alkyl having 1 to 4 carbon atoms, --OR11 or --NHR11, R11 being an alkyl having 1 to 4 carbon atoms, or may form --CH2--X--Y-- together with R1; R3, R4 and R5 each are hydrogen or methyl; R6 and R7 each are hydrogen or may form the direct bond to each other; R8 is hydrogen or may form the direct bond to R7; and R9 is hydrogen, --N3, --NH2, --OCH3 or .dbd.0; X being oxygen or --NZ--, Z being hydrogen, methyl, --COCH3, --CH2COOH, --CO--CH.dbd.CH2, --CO--CH.dbd.CH--CH3, --CH2C6H5, --CH2OH, --CH2OCOCH3 or --CH2--COOC(CH3)3, Y being --SC--, --CO-- or --CH2--.

73. 发明授权

US4929572A Dopant of arsenic, method for the preparation thereof and method for doping of semiconductor therewith 失效
标题翻译：砷的掺杂剂，其制备方法和掺杂半导体的方法
公开(公告)号：US4929572A
公开(公告)日：1990-05-29
申请号：US380616
申请日：1989-07-17
申请人： Shigeaki Saito , Toshiharu Matsueda , Yoshihiro Kubota , Masaaki Iguchi
发明人： Shigeaki Saito , Toshiharu Matsueda , Yoshihiro Kubota , Masaaki Iguchi
IPC分类号： H01L21/22 , H01L21/223
CPC分类号： H01L21/223 , H01L21/2225 , Y10S252/95
摘要： The dopant body of arsenic for doping of a semiconductor substrate, e.g., silicon wafer, is a sintered body of a powder mixture comprising silicon arsenide, silica and, optionally, arsenic oxide in a specified proportion. The dopant body can be easily prepared and has various advantages over conventional elementary arsenic powder or a shaped body of silicon arsenide alone in respect of the high mechanical strength of the dopant body and absence of the problem of environmental contamination.
摘要翻译：用于掺杂半导体衬底（例如硅晶片）的砷的掺杂剂体是包含砷化硅，二氧化硅和任选地以特定比例的氧化砷的粉末混合物的烧结体。相对于掺杂剂体的高机械强度和不存在环境污染的问题，掺杂剂体可以容易地制备并且具有优于常规的基本砷粉末或单独的砷化硅成形体的各种优点。

74. 发明授权

US09064929B2 Method for reducing the thickness of an SOI layer 有权
标题翻译：降低SOI层厚度的方法
公开(公告)号：US09064929B2
公开(公告)日：2015-06-23
申请号：US12153519
申请日：2008-05-20
申请人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Makoto Kawai , Yuuji Tobisaka
发明人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Makoto Kawai , Yuuji Tobisaka
IPC分类号： H01L21/762 , H01L21/3065 , H01L21/66
CPC分类号： H01L21/76254 , H01L21/3065 , H01L22/12 , H01L22/20 , H01L2924/014
摘要： There is disclosed a method for manufacturing an SOI wafer comprising: a step of implanting at least one of a hydrogen ion and a rare gas ion into a donor wafer to form an ion implanted layer; a step of bonding an ion implanted surface of the donor wafer to a handle wafer; a step of delaminating the donor wafer at the ion implanted layer to reduce a film thickness of the donor wafer, thereby providing an SOI layer; and a step of etching the SOI layer to reduce a thickness of the SOI layer, wherein the etching step includes: a stage of performing rough etching as wet etching; a stage of measuring a film thickness distribution of the SOI layer after the rough etching; and a stage of performing precise etching as dry etching based on the measured film thickness distribution of the SOI layer. There can be provided A method for manufacturing an SOI wafer having high film thickness uniformity of an SOI layer with excellent productivity.
摘要翻译：公开了一种用于制造SOI晶片的方法，包括：将氢离子和稀有气体离子中的至少一种注入施主晶片以形成离子注入层的步骤; 将施主晶片的离子注入表面接合到处理晶片的步骤; 在离子注入层分层施主晶片以降低施主晶片的膜厚，从而提供SOI层的步骤; 以及蚀刻所述SOI层以减小所述SOI层的厚度的步骤，其中所述蚀刻步骤包括：执行粗蚀刻的阶段，如湿蚀刻; 在粗蚀刻之后测量SOI层的膜厚分布的阶段; 以及基于所测量的SOI层的膜厚分布，进行干蚀刻的精确蚀刻的阶段。可以提供一种以优异的生产率制造具有SOI层的高膜厚均匀性的SOI晶片的方法。

75. 发明授权

US08765576B2 Process for producing laminated substrate and laminated substrate 有权
标题翻译：叠层基板和叠层基板的制造方法
公开(公告)号：US08765576B2
公开(公告)日：2014-07-01
申请号：US12550340
申请日：2009-08-28
申请人： Shoji Akiyama , Atsuo Ito , Yoshihiro Kubota , Koichi Tanaka , Makoto Kawai , Yuuji Tobisaka
发明人： Shoji Akiyama , Atsuo Ito , Yoshihiro Kubota , Koichi Tanaka , Makoto Kawai , Yuuji Tobisaka
IPC分类号： H01L21/30 , H01L21/762 , H01L21/3105
CPC分类号： H01L21/76254 , H01L21/31051 , H01L21/76251 , H01L31/1892 , Y02E10/50
摘要： A method of manufacturing a laminated substrate is provided. The method includes: forming an oxide film on at least a surface of a first substrate having a hardness of equal to or more than 150 GPa in Young's modulus, and then smoothing the oxide film; implanting hydrogen ions or rare gas ions, or mixed gas ions thereof from a surface of a second substrate to form an ion-implanted layer inside the substrate, laminating the first substrate and the second substrate through at least the oxide film, and then detaching the second substrate in the ion-implanted layer to form a laminated substrate; heat-treating the laminated substrate and diffusing outwardly the oxide film.
摘要翻译：提供一种制造叠层基板的方法。该方法包括：在杨氏模量下，在硬度为150GPa以上的第一基板的至少表面形成氧化膜，然后平滑氧化膜; 从第二基板的表面注入氢离子或稀有气体离子或其混合气体离子以在基板内部形成离子注入层，至少通过氧化物膜层压第一基板和第二基板，然后将在离子注入层中形成第二衬底以形成层压衬底; 对层压基板进行热处理并向外扩散氧化膜。

76. 发明授权

US08564108B2 Semiconductor device with heat spreader 有权
公开(公告)号：US08564108B2
公开(公告)日：2013-10-22
申请号：US13596736
申请日：2012-08-28
申请人： Tomoyuki Fukuda , Yoshihiro Kubota , Hiroshi Ohtsubo , Yuichi Asano
发明人： Tomoyuki Fukuda , Yoshihiro Kubota , Hiroshi Ohtsubo , Yuichi Asano
IPC分类号： H01L23/495
CPC分类号： H01L23/4334 , H01L21/561 , H01L23/3128 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73265 , H01L2224/83192 , H01L2224/92247 , H01L2224/97 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01074 , H01L2924/014 , H01L2924/07802 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2924/20752 , H01L2224/05599
摘要： A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.

77. 发明授权

US08551862B2 Method of manufacturing laminated wafer by high temperature laminating method 有权
标题翻译：通过高温层压法制造层压晶片的方法
公开(公告)号：US08551862B2
公开(公告)日：2013-10-08
申请号：US12685194
申请日：2010-01-11
申请人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Kouichi Tanaka , Yuji Tobisaka , Yoshihiro Nojima
发明人： Shoji Akiyama , Yoshihiro Kubota , Atsuo Ito , Makoto Kawai , Kouichi Tanaka , Yuji Tobisaka , Yoshihiro Nojima
IPC分类号： H01L21/30
CPC分类号： H01L21/84 , H01L21/76254 , H01L21/76256
摘要： To provide a method of manufacturing a laminated wafer by which a strong coupling is achieved between wafers made of different materials having a large difference in thermal expansion coefficient without lowering a maximum heat treatment temperature as well as in which cracks or chips of the wafer does not occur. A method of manufacturing a laminated wafer 7 by forming a silicon film layer on a surface 4 of an insulating substrate 3 comprising the steps in the following order of: applying a surface activation treatment to both a surface 2 of a silicon wafer 1 or a silicon wafer 1 to which an oxide film is layered and a surface 4 of the insulating substrate 3 followed by laminating in an atmosphere of temperature exceeding 50° C. and lower than 300° C., applying a heat treatment to a laminated wafer 5 at a temperature of 200° C. to 350° C., and thinning the silicon wafer 1 by a combination of grinding, etching and polishing to form a silicon film layer.
摘要翻译：为了提供一种制造层叠晶片的方法，在不降低最大热处理温度的情况下，不会降低最大热处理温度以及晶片的裂纹或芯片不会在不具有热膨胀系数差的不同材料制成的晶片之间实现强耦合，发生。一种通过在绝缘基板3的表面4上形成硅膜层来制造层压晶片7的方法，包括以下顺序的步骤：对硅晶片1或硅的表面2施加表面活化处理叠层氧化膜的晶片1和绝缘基板3的表面4，然后在温度超过50℃且低于300℃的气氛中层压，在层叠晶片5上进行热处理温度为200〜350℃，通过研磨，蚀刻和研磨的组合使硅晶片1变薄，形成硅膜层。

78. 发明授权

US08278743B2 Semiconductor device with heat spreader 有权
标题翻译：带散热器的半导体器件
公开(公告)号：US08278743B2
公开(公告)日：2012-10-02
申请号：US13023962
申请日：2011-02-09
申请人： Tomoyuki Fukuda , Yoshihiro Kubota , Hiroshi Ohtsubo , Yuichi Asano
发明人： Tomoyuki Fukuda , Yoshihiro Kubota , Hiroshi Ohtsubo , Yuichi Asano
IPC分类号： H01L23/495
CPC分类号： H01L23/4334 , H01L21/561 , H01L23/3128 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73265 , H01L2224/83192 , H01L2224/92247 , H01L2224/97 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01074 , H01L2924/014 , H01L2924/07802 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2924/20752 , H01L2224/05599
摘要： A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
摘要翻译： BGA型半导体器件包括：具有布线和电极的衬底; 设置在所述基板上的具有矩形平面形状的半导体元件和沿着所述半导体元件的每一侧设置的多个电极; 将半导体元件上的电极与基板上的电极连接的多条导线; 散热构件，设置在所述基板上，覆盖所述半导体元件，并且具有形成在与所述半导体元件的每一侧形成的所述电极连接的所述多根导线的顶点部分的区域中形成的开口; 以及用于覆盖和密封半导体元件和散热构件的密封树脂构件。

79. 发明申请

US20120228730A1 MICROCHIP AND SOI SUBSTRATE FOR MANUFACTURING MICROCHIP 审中-公开
标题翻译：用于制造MICROCHIP的微型芯片和SOI基板
公开(公告)号：US20120228730A1
公开(公告)日：2012-09-13
申请号：US13476301
申请日：2012-05-21
申请人： Shoji AKIYAMA , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Makoto Kawai , Yuuji Tobisaka
发明人： Shoji AKIYAMA , Yoshihiro Kubota , Atsuo Ito , Koichi Tanaka , Makoto Kawai , Yuuji Tobisaka
IPC分类号： H01L21/762 , H01L31/0248
CPC分类号： H01L21/76254 , H01L21/84
摘要： A plasma treatment or an ozone treatment is applied to the respective bonding surfaces of the single-crystal Si substrate in which the ion-implanted layer has been formed and the quartz substrate, and the substrates are bonded together. Then, a force of impact is applied to the bonded substrate to peel off a silicon thin film from the bulk portion of single-crystal silicon along the hydrogen ion-implanted layer, thereby obtaining an SOI substrate having an SOI layer on the quartz substrate. A concave portion, such as a hole or a micro-flow passage, is formed on a surface of the quartz substrate of the SOI substrate thus obtained, so that processes required for a DNA chip or a microfluidic chip are applied. A silicon semiconductor element for the analysis/evaluation of a sample attached/held to this concave portion is formed in the SOI layer.
摘要翻译：对已经形成有离子注入层的单晶Si衬底和石英衬底的各个接合表面施加等离子体处理或臭氧处理，并将衬底接合在一起。然后，对键合衬底施加冲击力，沿着氢离子注入层从单晶硅的主体部分剥离硅薄膜，从而获得在石英衬底上具有SOI层的SOI衬底。在如此获得的SOI衬底的石英衬底的表面上形成诸如孔或微流通道的凹部，从而应用DNA芯片或微流体芯片所需的工艺。在SOI层中形成用于分析/评价附着/保持在该凹部的样品的硅半导体元件。

80. 发明授权

US08236667B2 Silicon on insulator (SOI) wafer and process for producing same 有权
标题翻译：绝缘体上硅（SOI）晶片及其制造方法
公开(公告)号：US08236667B2
公开(公告)日：2012-08-07
申请号：US12163743
申请日：2008-06-27
申请人： Atsuo Ito , Yoshihiro Kubota , Kiyoshi Mitani
发明人： Atsuo Ito , Yoshihiro Kubota , Kiyoshi Mitani
IPC分类号： H01L21/30
CPC分类号： H01L27/1203 , H01L21/76254 , H01L21/84 , H01L29/78603
摘要： Ion injection is performed to a single crystal silicon wafer to form an ion injection layer, with the ion injection surface of the single crystal silicon wafer and/or the surface of the transparent insulation substrate are/is processed using plasma and/or ozone. The ion injection surface of the single crystal silicon wafer and the surface of the transparent insulation substrate are bonded to each other by bringing them into close contact with each other at room temperature. A silicon on insulator (SOI) wafer is obtained by mechanically peeling the single crystal silicon wafer by giving an impact to the ion injection layer, to form an SOI layer on the transparent insulation substrate, and thermal processing for flattening the SOI layer surface is performed to the SOI wafer, under an atmosphere of an inert gas, a hydrogen gas, and a mixture gas of them.
摘要翻译：对单晶硅晶片进行离子注入以形成离子注入层，使用等离子体和/或臭氧处理单晶硅晶片的离子注入表面和/或透明绝缘基板的表面。单晶硅晶片的离子注入表面和透明绝缘基板的表面通过在室温彼此紧密接触而彼此接合。通过对单晶硅晶片进行机械剥离而对离子注入层产生冲击，在透明绝缘基板上形成SOI层，进行SOI层表面的平坦化处理，得到绝缘体上硅（SOI）晶片在惰性气体，氢气和它们的混合气体的气氛下，向SOI晶片。

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