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    • 62. 发明授权
    • Phase adjustment circuit and demodulation circuit
    • 相位调整电路和解调电路
    • US07142382B2
    • 2006-11-28
    • US10944917
    • 2004-09-21
    • Kouichi Nagano
    • Kouichi Nagano
    • G11B5/09G11B27/10
    • H03C3/02G11B7/0053
    • A phase adjustment circuit includes: a carrier-wave-delay adjusting circuit for delaying an input carrier wave and outputting the delayed carrier wave, in accordance with phase information; and a phase-difference detecting/adjusting circuit for detecting a phase difference between an input signal and the delayed carrier wave, outputting, as the phase information, a value according to the detected phase difference, adjusting the delayed carrier wave such that the delayed carrier wave has a phase substantially coincident with a phase of the input signal, and outputting the resultant carrier wave as a phase-adjusted carrier wave. In a steady state, the phase-difference detecting/adjusting circuit outputs, as the phase information, a value indicating the presence of a phase difference.
    • 相位调整电路包括:载波延迟调整电路,用于根据相位信息延迟输入载波并输出延迟的载波; 以及相位差检测/调整电路,用于检测输入信号和延迟的载波之间的相位差,输出根据检测的相位差的值作为相位信息,调整延迟的载波,使得延迟的载波 波具有与输入信号的相位基本一致的相位,并将所得到的载波作为相位调整载波输出。 在稳定状态下,相位差检测/调整电路输出表示存在相位差的值作为相位信息。
    • 65. 发明授权
    • Signal processing device
    • 信号处理装置
    • US5289502A
    • 1994-02-22
    • US785278
    • 1991-10-30
    • Somei Kawasaki
    • Somei Kawasaki
    • G11B20/06G11B20/10H03C3/02H03C3/08H03K3/011H03K3/017H03K3/0231H03K3/282H03K7/06H03C3/00H04L27/12
    • H03K7/06G11B20/06G11B20/10H03C3/02H03C3/08H03K3/011H03K3/017H03K3/0231H03K3/2821
    • A signal processing device for processing an information signal, comprises a frequency modulator arranged to receive the information signal, to frequency-modulate the received information signal and to output a frequency-modulated information signal, a feedback signal generator arranged to receive the frequency-modulated information signal output from the frequency modulator means and to generate a feedback signal therefrom at a phase which is variable to be either in-phase or out-of-phase relative to the received frequency-modulated information signal in accordance with a duty in a high-level period of the received frequency-modulated information signal and at an amplitude which is variable within a range from a zero level to the same level as the received frequency-modulated information signal, and addition circuitry arranged to add the feedback signal output from the feedback signal generator to the information signal received by the frequency modulator.
    • 一种用于处理信息信号的信号处理装置,包括频率调制器,被配置为接收信息信号,对所接收的信息信号进行频率调制并输出调频信息信号,反馈信号发生器被布置成接收频率调制信号 从频率调制器装置输出的信号信号并且以相对于接收的调频信息信号可变为同相或异相的相位产生反馈信号,该相位根据高电平的占空比 接收的调频信息信号的低频周期,以及在从零电平到与所接收的调频信息信号的相同电平的范围内可变的幅度,以及相加电路,被配置为将从 反馈信号发生器由信号信号接收的频率调制器。
    • 67. 发明授权
    • Frequency modulated phase locked loop with fractional divider and jitter
compensation
    • 频率调制锁相环,具有分数分频和抖动补偿
    • US5038120A
    • 1991-08-06
    • US486781
    • 1990-03-01
    • Mark A. WheatleyLeslie A. LepperNigel K. Webb
    • Mark A. WheatleyLeslie A. LepperNigel K. Webb
    • H03C3/02H03C3/09H03L7/197
    • H03C3/0991H03C3/0925H03C3/0933H03C3/0941H03C3/0958H03C3/0975H03L7/1976H03C3/02
    • A fractional-N type frequency synthesizer has a voltage controlled oscillator controlled in a phase-locked loop by a divide by N divider and a phase comparator responsive to the divided frequency and to a reference frequency Fr. An accumulator is responsive to the desired fractional part of the N and is clocked by Fr to produce carry signals for producing the required periodic variations in N. A second accumulator produces periodic equal and opposite further variations in N to reduce the magnitude of the error waveform which would be given to the phase-detector output by the variations in n caused by the first accumulator. A digital to analog converter and a differentiating circuit produce a jitter correction signal for reducing residual jitter. A coherent detector detects for the presence of any residual jitter at the control input of the VCO and resulting from the fractional-N control circuit. Any such residual jitter produces a control signal which adjusts the value of the jitter correction signal accordingly. Two-port frequency modulation is produced by an in-band circuit incorporating an integrator and a full band circuit. With no FM input, a counter detects any divergence in output frequency from the desired value and caused by spurious input at the integrator. A resultant control signal offsets any such spurious inputs. The coherent detector detects at the control input of the VCO any component which is coherent with the in band modulation signal and adjusts the full band modulation signal to eliminate this, so that correct FM is produced.
    • 分数N型频率合成器具有通过除以N除法器和相位比较器在锁相环中控制的压控振荡器,该相位比较器响应于分频和参考频率Fr。 累加器响应于期望的N分数部分并由Fr计时,以产生用于产生N中所需的周期性变化的进位信号。第二个累加器在N中产生周期性相等和相反的其他变化,以减小误差波形的幅度 这将由由第一累加器引起的n的变化给予相位检测器输出。 数模转换器和微分电路产生抖动校正信号,以减少残余抖动。 相干检测器检测在VCO的控制输入处是否存在任何残留抖动,并由分数N控制电路产生。 任何这样的残余抖动产生相应地调整抖动校正信号的值的控制信号。 双端口频率调制由并入有积分器和全频带电路的带内电路产生。 在没有FM输入的情况下,计数器会从所需值检测输出频率的任何偏差,并由积分器的寄生输入引起。 所得到的控制信号抵消任何这样的虚假输入。 相干检测器在VCO的控制输入处检测与带内调制信号相干的任何分量,并调整全频带调制信号以消除该频带调制信号,从而产生正确的FM。
    • 69. 发明授权
    • Circuit for independently adjusting frequency deviation of a VCO
    • 独立调节VCO频偏的电路
    • US4531155A
    • 1985-07-23
    • US436369
    • 1982-10-25
    • Kenichi Hasegawa
    • Kenichi Hasegawa
    • H03C3/06G11B20/06H03C3/02H04N5/40H04N5/922H04N1/32H04B1/04
    • H03C3/02H04N5/40
    • A circuit for controlling the application of a signal source to a variable frequency oscillator is disclosed in which the width of frequency deviation and the lower limit frequency of the modulated signal can be set independently of each other. The emitter of a first transistor is connected to a first voltage source through a first resistor. Its base is connected to a signal source through a capacitor, and also to a second voltage source through a switch circuit. The base of a second transistor is connected to the second voltage source and its emitter is connected to the first voltage source through a variable resistor. The emitters of the first and second transistors are connected with each other by a third resistor. The collector current of the second transistor is supplied to a variable frequency oscillator.
    • 公开了一种用于控制向可变频率振荡器施加信号源的电路,其中可以彼此独立地设置调制信号的频率偏差和下限频率的宽度。 第一晶体管的发射极通过第一电阻器连接到第一电压源。 其基极通过电容器连接到信号源,并且还通过开关电路连接到第二电压源。 第二晶体管的基极连接到第二电压源,其发射极通过可变电阻器连接到第一电压源。 第一和第二晶体管的发射极通过第三电阻器相互连接。 第二晶体管的集电极电流被提供给可变频率振荡器。
    • 70. 发明授权
    • Deviation detector for FM video recording system
    • FM录像系统偏差探测器
    • US4476498A
    • 1984-10-09
    • US346370
    • 1982-02-05
    • David A. Sheean
    • David A. Sheean
    • G01R23/00H03C3/02H03C3/06G11B27/36H04N5/76
    • H03C3/02G01R23/00
    • The deviation of an FM signal modulated by a video signal is detected by measuring the average period of the FM signal at a measurement rate proportional to the average frequency of the FM signal. The value of each average period measurement is compared with a predetermined number to produce an indicator signal each time the measured value is less than or equal to the predetermined number. The effect of overshoot of the video signal due to preemphasis is minimized by detecting the successive occurrence of at least two indicator signals to provide a further indicator signal which may be used for visually monitoring video peak levels and/or for protecting a utilization device to which the FM signal is supplied.
    • 通过以与FM信号的平均频率成比例的测量速率测量FM信号的平均周期来检测由视频信号调制的FM信号的偏差。 将每个平均周期测量的值与预定数量进行比较,以在每次测量值小于或等于预定数量时产生指示符信号。 通过检测至少两个指示符信号的连续出现来提供视频监视视频峰值电平和/或用于保护使用设备到达哪个 提供FM信号。