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1. 发明授权

US08952763B2 Frequency modulator having digitally-controlled oscillator with modulation tuning and phase-locked loop tuning 有权
标题翻译：具有调制调谐和锁相环调谐的数字控制振荡器的频率调制器
公开(公告)号：US08952763B2
公开(公告)日：2015-02-10
申请号：US13612767
申请日：2012-09-12
申请人： Robert Bogdan Staszewski , Chi-Hsueh Wang
发明人： Robert Bogdan Staszewski , Chi-Hsueh Wang
IPC分类号： H03C3/06 , H04L27/12
CPC分类号： H03C3/0958 , H04L27/12 , H04L27/127
摘要： A frequency modulator includes a digitally-controlled oscillator (DCO) arranged for producing a frequency deviation in response to a modulation tuning word and a phase-locked loop (PLL) tuning word. In addition, another frequency modulator includes a DCO and a DCO interface circuit. The DCO is arranged for producing a frequency deviation in response to an integer tuning word and a fractional tuning word. The DCO interface circuit is arranged for generating the integer tuning word and the fractional tuning word to the DCO, wherein the fractional tuning word is obtained through asynchronous sampling of a fixed-point tuning word.
摘要翻译：频率调制器包括数字控制振荡器（DCO），其被配置为响应于调制调谐字和锁相环（PLL）调谐字产生频率偏差。此外，另一个频率调制器包括DCO和DCO接口电路。 DCO被布置成响应于整数调整字和分数调谐字产生频率偏差。 DCO接口电路用于将整数调整字和分数调谐字产生到DCO，其中分数调谐字通过定点调谐字的异步采样获得。

2. 发明授权

US08890635B2 Signal generator for a transmitter or a receiver, a transmitter and a receiver 有权
标题翻译：用于发射机或接收机，发射机和接收机的信号发生器
公开(公告)号：US08890635B2
公开(公告)日：2014-11-18
申请号：US13019358
申请日：2011-02-02
申请人： Alexander Belitzer , Andre Hanke , Boris Kapfelsperger , Volker Thomas , Elmar Wagner
发明人： Alexander Belitzer , Andre Hanke , Boris Kapfelsperger , Volker Thomas , Elmar Wagner
IPC分类号： H03L7/06 , H03C3/06 , H03L7/099 , H04B1/40
CPC分类号： H04B1/403 , H03L7/099 , H03L2207/06
摘要： A signal generator for a transmitter or a receiver for transmitting or receiving RF-signals according to a given communication protocol includes an oscillator and a mismatch compensator. The oscillator is configured to provide a signal generator output signal having a signal generator output frequency and comprises a fine tuning circuit for providing a fine adjustment of the signal generator output frequency based on a fine tuning signal and a coarse tuning circuit for providing a course adjustment of the signal generator output frequency based on a coarse tuning signal. The mismatch compensator is configured to receive the signal generator output signal and compensate a frequency mismatch between a desired signal generator output frequency and the signal generator output frequency generated by the oscillator by providing the fine tuning signal for changing the state of the fine tuning circuit of the oscillator and by providing the coarse tuning signal for changing a state of the coarse tuning circuit of the oscillator. The mismatch compensator provides the coarse tuning signal during a guard period defined in the given communication protocol, during which no RF-signals are transmitted by the transmitter or no RF-signals are to be received by the receiver, such that the state of the coarse tuning circuit is changed within the guard period.
摘要翻译：用于根据给定通信协议发送或接收RF信号的发射机或接收机的信号发生器包括振荡器和不匹配补偿器。振荡器被配置为提供具有信号发生器输出频率的信号发生器输出信号，并且包括微调电路，用于基于微调信号和粗调谐电路提供信号发生器输出频率的微调，以提供路线调整基于粗调谐信号的信号发生器输出频率。失配补偿器被配置为接收信号发生器输出信号，并且通过提供用于改变微调电路的状态的微调信号来补偿期望的信号发生器输出频率与由振荡器产生的信号发生器输出频率之间的频率失配并且通过提供用于改变振荡器的粗调电路的状态的粗调谐信号。不匹配补偿器在给定通信协议中定义的保护周期期间提供粗调谐信号，在此期间，发射机不发射RF信号，或接收机不接收RF信号，使得粗略的状态调谐电路在保护期内发生变化。

3. 发明授权

US08884709B2 Double-point modulator with accurate and fast gain calibration 有权
标题翻译：具有精确和快速增益校准的双点调制器
公开(公告)号：US08884709B2
公开(公告)日：2014-11-11
申请号：US13547594
申请日：2012-07-12
申请人： Franck Badets , Serge Ramet , Michel Ayraud
发明人： Franck Badets , Serge Ramet , Michel Ayraud
IPC分类号： H03C3/06 , H03C3/09
CPC分类号： H03C3/0908
摘要： A phase-locked loop double-point modulator may include a frequency divider having a ratio which can be changed by a first modulation signal, and an oscillator, a frequency of which can be changed by a second modulation signal correlated to the first modulation signal. A calibration circuit may be configured, in a calibration mode, to match the gains of the first and second modulation signals based on frequency measurements of the oscillator for two different calibration values of the second modulation signal. The phase-locked double-point modulator may also include an attenuator having a constant ratio greater than 1 and placed in the path of the second modulation signal, and a selector switch configured to be controlled by the calibration circuit to reduce the ratio of the attenuator in the calibration mode.
摘要翻译：锁相环双点调制器可以包括具有可以通过第一调制信号改变的比率的分频器和可以通过与第一调制信号相关的第二调制信号来改变其频率的振荡器。校准电路可以在校准模式下被配置为基于用于第二调制信号的两个不同校准值的振荡器的频率测量来匹配第一和第二调制信号的增益。锁相双点调制器还可以包括具有大于1的恒定比率并置于第二调制信号的路径中的衰减器，以及配置为由校准电路控制的选择器开关，以减小衰减器在校准模式下。

4. 发明授权

US08364098B2 PLL calibration 有权
标题翻译： PLL校准
公开(公告)号：US08364098B2
公开(公告)日：2013-01-29
申请号：US12771900
申请日：2010-04-30
申请人： Timothy John Ridgers
发明人： Timothy John Ridgers
IPC分类号： H04B1/04 , H03C3/06 , H03C3/09
CPC分类号： H03C3/0925 , H03C3/0933 , H03C3/0941 , H03C3/095 , H03C3/0991
摘要： A method for applying a modulation signal to a phase locked loop comprises filtering the modulation signal to provide a low frequency component and a high frequency for application to respectively the feedback and feedforward paths of a phase locked loop. The high frequency component is scaled by a gain factor before being applied to the feedforward path. The low frequency component is also scaled by a gain factor and applied to the feedforward path. The energy in a common low frequency range of the modulation signal and of the loop error signal is estimated, and the gain factors are modified dependent on the measured energy.
摘要翻译：将调制信号施加到锁相环的方法包括对调制信号进行滤波以提供低频分量和高频，以分别应用于锁相环的反馈和前馈路径。在施加到前馈路径之前，高频分量被增益因子缩放。低频分量也被增益因子缩放并应用于前馈路径。估计调制信号和环路误差信号的共同低频范围内的能量，并根据测得的能量修改增益因子。

5. 发明授权

US07728690B2 Method and apparatus for compensating for tuning nonlinearity of an oscillator 失效
标题翻译：用于补偿振荡器的调谐非线性的方法和装置
公开(公告)号：US07728690B2
公开(公告)日：2010-06-01
申请号：US11875766
申请日：2007-10-19
申请人： Gary John Ballantyne
发明人： Gary John Ballantyne
IPC分类号： H03C3/08 , H03C3/06 , H03L7/093
CPC分类号： H03C3/09 , H03C3/08
摘要： Techniques to compensate for nonlinearity of a tuning function of an oscillator are described. The tuning nonlinearity of the oscillator may be modeled as a disturbance input to the oscillator and may be compensated with an equal but opposite disturbance. In one design, a nonlinearity correction signal to compensate for the tuning nonlinearity may be generated, e.g., based on a phase error signal in a phase-locked loop (PLL) and a scaling factor determined adaptively. The nonlinearity correction signal may compensate for the n-th (e.g., second) order tuning nonlinearity, and an n-th order (e.g., squared) modulating signal may be used to derive the scaling factor and the nonlinearity correction signal. A control signal for the oscillator may be generated based on the nonlinearity correction signal and possibly one or more other signals. The control signal may be applied to the oscillator to adjust the oscillation frequency of the oscillator.
摘要翻译：描述了补偿振荡器的调谐功能的非线性的技术。振荡器的调谐非线性可以被建模为对振荡器的干扰输入，并且可以用相等但相反的干扰来补偿。在一种设计中，可以例如基于锁相环（PLL）中的相位误差信号和自适应确定的缩放因子来产生补偿调谐非线性的非线性校正信号。非线性校正信号可以补偿第n（例如，第二）阶调谐非线性，并且可以使用n阶（例如，平方）调制信号来导出缩放因子和非线性校正信号。可以基于非线性校正信号和可能的一个或多个其他信号来产生用于振荡器的控制信号。控制信号可以施加到振荡器以调节振荡器的振荡频率。

6. 发明授权

US07649428B2 Method and system for generating noise in a frequency synthesizer 有权
标题翻译：用于在频率合成器中产生噪声的方法和系统
公开(公告)号：US07649428B2
公开(公告)日：2010-01-19
申请号：US11717370
申请日：2007-03-13
申请人： Ajit Kumar Reddy
发明人： Ajit Kumar Reddy
IPC分类号： H03C3/06
CPC分类号： H03L7/1976
摘要： A method and system for generating noise in a frequency synthesizer are provided. The method includes generating a noise portion of an input signal within the frequency synthesizer and appending the noise portion to a control portion of the input signal.
摘要翻译：提供了一种用于在频率合成器中产生噪声的方法和系统。该方法包括在频率合成器内产生输入信号的噪声部分，并将噪声部分附加到输入信号的控制部分。

7. 发明授权

US07573348B2 Arrangement and method for determining a gradient factor for a digitally controlled oscillator, and phase locked loop 有权
标题翻译：用于确定数控振荡器和锁相环路的梯度因子的布置和方法
公开(公告)号：US07573348B2
公开(公告)日：2009-08-11
申请号：US11840408
申请日：2007-08-17
申请人： Thomas Bauernfeind , Linus Maurer
发明人： Thomas Bauernfeind , Linus Maurer
IPC分类号： H03C3/06 , H03L7/085
CPC分类号： H03C3/0925 , H03C3/0941 , H03C3/095 , H03L7/093 , H03L7/095 , H03L7/0991 , H03L7/187 , H03L7/1976
摘要： An arrangement for determining a gradient factor for a digitally controlled oscillator has a data alignment device and an identification device. The data alignment device can be supplied a modulation signal, a phase error signal and an oscillator control word. The data alignment device is configured to output a modulation setting word based on the modulation signal, output a time interval magnitude based on the phase error signal and a reference interval, and output an oscillator modulation word based on the oscillator control word. The identification device is configured to adapt and output the gradient factor based on the modulation setting word, the time interval magnitude and the oscillator modulation word.
摘要翻译：用于确定数字控制振荡器的梯度因子的装置具有数据对准装置和识别装置。可以向数据对准装置提供调制信号，相位误差信号和振荡器控制字。数据对准装置被配置为基于调制信号输出调制设置字，基于相位误差信号和参考间隔输出时间间隔幅度，并且基于振荡器控制字输出振荡器调制字。识别装置被配置为基于调制设置字，时间间隔幅度和振荡器调制字来适应和输出梯度因子。

8. 发明申请

US20080079465A1 CLOCK SIGNAL GENERATOR FOR USB DEVICE 有权
标题翻译： USB设备的时钟信号发生器
公开(公告)号：US20080079465A1
公开(公告)日：2008-04-03
申请号：US11775541
申请日：2007-07-10
申请人： Hyuk-Jun Sung , Chan-Yong Kim , Jong-Pil Cho
发明人： Hyuk-Jun Sung , Chan-Yong Kim , Jong-Pil Cho
IPC分类号： H03H11/26 , H03C3/06
CPC分类号： G06F1/04
摘要： A clock signal generator for a USB device. The clock signal generator includes a control circuit and a clock generator that does not need to include a crystal oscillator. The control circuit counts the cycle of the clock signal during the period between two sync signals successively inputted, and generates a frequency control signal corresponding to the count value. The clock generator generates the clock signal with a frequency corresponding to the frequency control signal. The clock signal generator can generate a clock signal that is suitable for the data transfer rate defined, in the USB specification. In addition, the clock; signal generator can generate an RX clock signal so that an RX data signal can be recovered with its energy being stable.
摘要翻译： USB设备的时钟信号发生器。时钟信号发生器包括不需要包括晶振的控制电路和时钟发生器。控制电路在连续输入的两个同步信号之间的周期内对时钟信号的周期进行计数，并产生与计数值对应的频率控制信号。时钟发生器产生具有对应于频率控制信号的频率的时钟信号。时钟信号发生器可以产生适合于在USB规范中定义的数据传输速率的时钟信号。另外，时钟; 信号发生器可以产生RX时钟信号，使得RX数据信号能够以其能量稳定地恢复。

9. 发明授权

US07075384B2 Delta-sigma modulated fractional-N PLL frequency synthesizer and wireless communication apparatus 有权
$Delta-sigma modulated fractional-N PLL frequency synthesizer and wireless communication apparatus$
标题翻译： Delta-sigma调制分数N PLL频率合成器和无线通信装置
公开(公告)号：US07075384B2
公开(公告)日：2006-07-11
申请号：US11095352
申请日：2005-03-31
申请人： Masahisa Tamura
发明人： Masahisa Tamura
IPC分类号： H03C3/06
CPC分类号： H03L7/1976
摘要： Disclosed is a delta-sigma modulated fractional-N PLL frequency synthesizer which performs fractional-N by modulating a divider that divides output frequencies from a voltage controlled oscillator. Fractional part data F from a register is forwarded to a second adder. A first adder adds output from a delta-sigma modulator to output therefrom delayed and inverted by a delay inverter to generate an artificially random bit stream averaging zero. The second adder adds fractional part data F to output from the first adder to generate an artificially random data sequence averaging a value of fractional part data. The generated data sequence is forwarded to the delta-sigma modulator. An adder adds integral part data to output from the delta-sigma modulator. Added output is forwarded to the divider.
摘要翻译：公开了一种Δ-Σ调制分数N PLL频率合成器，其通过对从压控振荡器分频输出频率的分频器进行调制来执行分数N。来自寄存器的小数部分数据F被转发到第二加法器。第一加法器将来自Δ-Σ调制器的输出相加，由延迟反相器延迟和反相输出，以产生平均为零的人为随机比特流。第二加法器将小数部分数据F加到从第一加法器输出，以产生对分数部分数据的值进行平均的人为随机数据序列。生成的数据序列被转发到delta-Σ调制器。加法器将积分部分数据添加到delta-Σ调制器的输出。添加的输出转发到分频器。

10. 发明授权

US06960961B2 EMI reduction of oscillating signals by way of controlled randomized modulation 失效
标题翻译：通过受控随机调制的振荡信号的EMI降低
公开(公告)号：US06960961B2
公开(公告)日：2005-11-01
申请号：US10426483
申请日：2003-04-30
申请人： Michael Andrews
发明人： Michael Andrews
IPC分类号： H03C3/06 , H01H31/02 , H03B5/36
CPC分类号： H03C3/06
摘要： An electrical circuit generates an oscillating signal that produces reduced electromagnetic interference by way of modulation of the frequency of the oscillating signal within a specified frequency range. A randomized signal generator creates a randomized signal, which is then used to drive a frequency range converter that is employed to produce a frequency modulation signal. The current state of the frequency modulation signal is based on the current state of the randomized signal, with the converter limiting the current state of the frequency modulation signal so that the oscillating signal will only operate within the specified frequency range. A variable frequency oscillator then generates the oscillating signal whose frequency is based on the current state of the frequency modulation signal.
摘要翻译：电路产生振荡信号，其通过在特定频率范围内调制振荡信号的频率来产生降低的电磁干扰。随机信号发生器产生一个随机信号，然后将其用于驱动用于产生频率调制信号的频率范围转换器。频率调制信号的当前状态基于随机信号的当前状态，转换器限制频率调制信号的当前状态，使得振荡信号将仅在指定的频率范围内工作。然后，可变频率振荡器产生其频率基于频率调制信号的当前状态的振荡信号。

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