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61. 发明授权

US5323635A Air fuel ratio detecting arrangement and method therefor for an internal combustion engine 失效
标题翻译：用于内燃机的空燃比检测装置及其方法
公开(公告)号：US5323635A
公开(公告)日：1994-06-28
申请号：US68670
申请日：1993-05-28
申请人： Sadayasu Ueno , Takao Sasayama , Seiko Suzuki , Kanemasa Sato , Shiro Ouchi , Naoki Minami , Norio Hasegawa
发明人： Sadayasu Ueno , Takao Sasayama , Seiko Suzuki , Kanemasa Sato , Shiro Ouchi , Naoki Minami , Norio Hasegawa
IPC分类号： F02B1/04 , F02D41/14 , F02D41/24 , G01N27/419
CPC分类号： F02D41/2474 , F02D41/1493 , F02D41/2441 , F02B1/04 , F02D2200/703 , F02D41/1456 , F02D41/2454
摘要： An air fuel ratio detecting arrangement using a diffusion suppressing type air fuel ratio sensor applicable to an air fuel ratio control unit for an internal combustion engine incorporating an atmospheric air pressure correction circuit in a signal processing and outputting device for correcting an output voltage signal processed therein based on a change in atmospheric air pressure which is detected when a predetermined operating condition of an internal combustion engine is satisfied. A secular change correction circuit included in the signal processing and outputting device detects a change in electromotive force of a concentration cell portion of the air fuel ratio sensor when a predetermined rich air fuel ratio is reached and corrects a reference voltage for the air fuel ratio sensor based on the detected change in electromotive force of the concentration cell portion in addition to an air calibration circuit.
摘要翻译：一种空气燃料比检测装置，其使用扩散抑制型空燃比传感器，其适用于在内置有大气压力校正电路的内燃机的空燃比控制单元，该信号处理和输出装置用于校正其中处理的输出电压信号基于当满足内燃机的预定操作条件时检测到的大气压力的变化。包括在信号处理和输出装置中的长期变化校正电路在达到预定的浓空气燃料比时检测空燃比传感器的浓缩池部分的电动势的变化，并校正空燃比传感器的参考电压基于除了空气校准电路之外的所检测到的浓度单元部分的电动势的变化。

62. 发明申请

US20140302679A1 PHASE SHIFT MASK, METHOD OF FORMING ASYMMETRIC PATTERN, METHOD OF MANUFACTURING DIFFRACTION GRATING, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：相位移掩模，形成非对称图案的方法，制造衍射光栅的方法和制造半导体器件的方法
公开(公告)号：US20140302679A1
公开(公告)日：2014-10-09
申请号：US14350314
申请日：2012-09-13
申请人： Kazuyuki Kakuta , Toshihiko Onozuka , Shigeru Matsui , Yoshisada Ebata , Norio Hasegawa
发明人： Kazuyuki Kakuta , Toshihiko Onozuka , Shigeru Matsui , Yoshisada Ebata , Norio Hasegawa
IPC分类号： H01L21/3065 , G03F1/26 , H01L21/308
CPC分类号： H01L21/3065 , G03F1/0046 , G03F1/26 , G03F1/28 , G03F1/30 , H01L21/3085
摘要： A technique of forming an asymmetric pattern by using a phase shift mask, and further, techniques of manufacturing a diffraction grating and a semiconductor device, capable of improving accuracy of a product and capable of shortening manufacturing time. In a method of manufacturing a diffraction grating by using a phase shift mask (in which a light shield part and a light transmission part are periodically arranged), light emitted from an illumination light source is transmitted through the phase shift mask, and a photoresist on a surface of a Si wafer is exposed by providing interference between zero diffraction order light and positive first diffraction order light which are generated by the transmission through this phase shift mask onto the surface of the Si wafer, and a diffraction grating which has a blazed cross-sectional shape is formed on the Si wafer.
摘要翻译：通过使用相移掩模形成非对称图案的技术，以及制造衍射光栅和半导体器件的技术，能够提高产品的精度并能缩短制造时间。在通过使用相移掩模（其中周期性地布置有遮光部分和透光部分）制造衍射光栅的方法中，从照明光源发射的光透射穿过相移掩模，并且光致抗蚀剂在通过提供由通过该相移掩模的透射产生的零衍射级光和正的第一衍射级光之间的干涉而暴露于Si晶片的表面到Si晶片的表面上的衍射光栅和具有闪耀十字在Si晶片上形成截面形状。

63. 发明申请

US20120267528A1 Pattern Measuring Apparatus and Computer Program 有权
标题翻译：图案测量仪器和计算机程序
公开(公告)号：US20120267528A1
公开(公告)日：2012-10-25
申请号：US13518706
申请日：2010-12-01
申请人： Kei Sakai , Yafeng Zhang , Norio Hasegawa
发明人： Kei Sakai , Yafeng Zhang , Norio Hasegawa
IPC分类号： H01J37/28
CPC分类号： G03F7/70466 , G01B2210/56 , G06T7/001 , G06T2207/10061 , G06T2207/30148 , H01J2237/2817
摘要： A pattern measuring apparatus which can identify a kind of gaps formed by a manufacturing process having a plurality of exposing steps such as SADP, particularly, which can suitably access a gap even if a sample has the gap that is not easily accessed is disclosed. A feature amount regarding one end side of a pattern having a plurality of patterns arranged therein and a plurality of kinds of feature amounts regarding the other end side of the pattern are extracted from a signal detected on the basis of scanning of a charged particle beam. With respect to proper kinds of feature amounts among the plurality of kinds of feature amounts, the feature amount on one side of the pattern and that on the other end side of the pattern are compared. On the basis of the comparison, the kinds of spaces among the patterns are determined.
摘要翻译：公开了一种图案测量装置，其可以识别由具有多个曝光步骤的制造工艺形成的间隙，例如SADP，特别是即使样品具有不容易接近的间隙也能适当地接近间隙。从基于扫描带电粒子束检测的信号中提取关于其中布置有多个图案的图案的一端侧的特征量和关于图案的另一端的多种特征量。对于多种特征量中的适当种类的特征量，比较图案的一侧的特征量和图案的另一端的特征量。在比较的基础上，确定了图案间的空间种类。

64. 发明申请

US20120151428A1 Pattern Shape Estimation Method and Pattern Measuring Device 有权
标题翻译：图案形状估计方法和图案测量装置
公开(公告)号：US20120151428A1
公开(公告)日：2012-06-14
申请号：US13390354
申请日：2010-07-15
申请人： Maki Tanaka , Norio Hasegawa , Chie Shishido , Mayuka Osaki
发明人： Maki Tanaka , Norio Hasegawa , Chie Shishido , Mayuka Osaki
IPC分类号： G06F17/50
CPC分类号： G01B15/04 , H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： The present invention aims at proposing a library creation method and a pattern shape estimation method in which it is possible, when estimating a shape based on comparison between an actual waveform and a library, to appropriately estimate the shape.As an illustrative embodiment to achieve the object, there are proposed a method of selecting a pattern by referring to a library, a method of creating a library by use of pattern cross-sectional shapes calculated through an exposure process simulation in advance, and a method for selecting a pattern shape stored in the library.
摘要翻译：本发明旨在提出一种库创建方法和图案形状估计方法，其中当基于实际波形和库之间的比较来估计形状时，可以适当地估计形状。作为实现该目的的说明性实施例，提出了通过参照库来选择图案的方法，通过使用预先通过曝光处理模拟计算的图案横截面形状来创建库的方法，以及方法用于选择存储在库中的图案形状。

65. 发明申请

US20060189282A1 Transmitter 有权
标题翻译：发射机
公开(公告)号：US20060189282A1
公开(公告)日：2006-08-24
申请号：US10532338
申请日：2003-10-20
申请人： Norio Hasegawa , Tetsuhiko Miyatani , Hisashi Kawai , Masami Yoshida , Jun Watanabe
发明人： Norio Hasegawa , Tetsuhiko Miyatani , Hisashi Kawai , Masami Yoshida , Jun Watanabe
IPC分类号： H04B1/04 , H01Q11/12
CPC分类号： H04L27/2614
摘要： A transmitter for averagedly suppressing the variation in input level of an amplifier according to variation in carrier level. The transmitter comprises an input power calculation section (16) for calculating mean input power of each carrier, an output power calculating section (17) for calculating mean output power of each carrier after the carrier band is limited, a monitoring section (18) for identifying a carrier having the maximum mean input power, acquiring the maximum value, acquiring the mean output power of the identified carrier, determining the ratio of the mean input power to the mean output power, and calculating level control information which is the ratio of the ratio determined above to a predetermined expected value, and a signal level adjusting section (15) for adjusting the level of a multicarrier signal by multiplying the level control information outputted from the monitoring section (18).
摘要翻译：一种发射机，用于根据载波电平的变化平均地抑制放大器输入电平的变化。发射机包括用于计算每个载波的平均输入功率的输入功率计算部分（16），用于在载波频带被限制之后计算每个载波的平均输出功率的输出功率计算部分（17），用于识别具有最大平均输入功率的载波，获取最大值，获取所识别的载波的平均输出功率，确定平均输入功率与平均输出功率的比率，以及计算作为平均输入功率的比率的电平控制信息以及用于通过乘以从监视部分（18）输出的电平控制信息来调整多载波信号的电平的信号电平调节部分（15）。

66. 发明申请

US20050277065A1 Method of manufacturing a semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20050277065A1
公开(公告)日：2005-12-15
申请号：US11147222
申请日：2005-06-08
申请人： Norio Hasegawa , Katsuya Hayano
发明人： Norio Hasegawa , Katsuya Hayano
IPC分类号： G03F1/54 , G03F1/56 , G03F7/00 , G03F7/20 , H01L21/027 , H01L21/8238 , H01L27/092
CPC分类号： G03F1/34 , G03F1/29 , G03F1/56
摘要： By using a high-accuracy mask capable of being manufactured through a simplified step, a semiconductor device manufacturing method of forming a desired pattern over a wafer is provided. A relatively narrow groove pattern and a groove pattern wider than the narrow groove pattern are formed, and a shade film made of, for example, a resist film is formed in the relatively wide groove pattern. As a concrete method of manufacturing a mask, after applying a resist film onto the quartz glass substrate, exposure and developing processings are performed, whereby the resist film is patterned. The patterned resist film is used as a mask to form the groove patterns in the quartz glass substrate (dry etching). Subsequently, after removing the patterned resist film, a new resist film is applied. Then, patterning is performed to form the shade film only in the groove pattern.
摘要翻译：通过使用能够通过简化步骤制造的高精度掩模，提供了在晶片上形成期望图案的半导体器件制造方法。形成比窄槽图案宽的相对窄的槽图案和凹槽图案，并且以比较宽的凹槽图案形成由例如抗蚀剂膜制成的遮光膜。作为制造掩模的具体方法，在将石英玻璃基板上施加抗蚀剂膜之后，进行曝光和显影处理，从而对抗蚀剂膜进行图案化。图案化的抗蚀剂膜用作掩模以在石英玻璃基板（干蚀刻）中形成凹槽图案。随后，在去除图案化的抗蚀剂膜之后，施加新的抗蚀剂膜。然后，进行图案化以仅在凹槽图案中形成遮光膜。

67. 发明申请

US20050158638A1 Photomask and pattern forming method employing the same 审中-公开
标题翻译：光掩模和使用其的图案形成方法
公开(公告)号：US20050158638A1
公开(公告)日：2005-07-21
申请号：US11080511
申请日：2005-03-16
申请人： Norio Hasegawa , Fumio Murai , Katsuya Hayano
发明人： Norio Hasegawa , Fumio Murai , Katsuya Hayano
IPC分类号： G03F1/00 , G03F1/26 , G03F1/29 , G03F1/32 , G03F1/68 , G03F7/20 , H01L21/027 , H01L21/30 , G03F9/00 , G03C5/00
CPC分类号： G03F1/32 , G03F1/26 , G03F1/29 , G03F7/2022 , G03F7/70066
摘要： A semitransparent phase shifting mask has, in the periphery of a pattern element area, a light shielding portion which is formed by a semitransparent phase shifting portion and a transparent portion with the optimal size combination. A pattern is formed employing the semitransparent phase shifting mask.
摘要翻译：半透射相移掩模在图形元件区域的外围具有由半透射相移部分和具有最佳尺寸组合的透明部分形成的遮光部分。使用半透明相移掩模形成图案。

68. 发明申请

US20050090120A1 Manufacturing method of semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件的制造方法
公开(公告)号：US20050090120A1
公开(公告)日：2005-04-28
申请号：US10967277
申请日：2004-10-19
申请人： Norio Hasegawa , Katsuya Hayano , Shoji Hotta
发明人： Norio Hasegawa , Katsuya Hayano , Shoji Hotta
IPC分类号： G03C5/00 , G03F1/30 , G03F1/32 , G03F1/68 , G03F7/20 , H01L21/027 , H01L21/302 , H01L21/311 , H01L21/768
CPC分类号： H01L21/76808 , G03F1/30 , G03F1/32 , G03F1/50 , H01L21/31144
摘要： In a massed region of each of a plurality of transfer areas of a mask a plurality of light transmission patterns are formed by opening a half-tone film. A phase shifter is disposed in each of the light transmission patterns so that a 180° phase inversion occurs between the lights that transmit through adjacent light transmission patterns. In a sparse region of the plurality of transfer areas a solitary light transmission pattern is formed by opening the half-tone film. Both shape and size are the same among the light transmission patterns, which are disposed symmetrically in both the massed and sparse regions about the center between the transfer areas. The phase shifters in the massed regions are disposed so that the phase of each phase shifter in one of the transfer areas comes to be opposed to that of its counterpart in the other transfer area. In the exposure process, those transfer areas are overlaid one upon another in the same chip region.
摘要翻译：在掩模的多个转印区域的每一个的质量区域中，通过打开半色调膜形成多个透光图案。在每个透光图案中设置移相器，使得在通过相邻光传输图案传输的光之间发生180°的相位反转。在多个转印区域的稀疏区域中，通过打开半色调膜形成单独的透光图案。在透光图案之间的形状和尺寸都相同，所述光透射图案在转印区域之间的中心周围的质量和稀疏区域中对称地设置。配置区域中的移相器被布置成使得其中一个传送区域中的每个移相器的相位与其它传送区域中的相应部件的相位相反。在曝光处理中，这些传送区域在相同的芯片区域中彼此重叠。

69. 发明授权

US06824958B2 Method of manufacturing photomask and method of manufacturing semiconductor integrated circuit device 失效
标题翻译：制造光掩模的方法和制造半导体集成电路器件的方法
公开(公告)号：US06824958B2
公开(公告)日：2004-11-30
申请号：US10025457
申请日：2001-12-26
申请人： Katsuya Hayano , Norio Hasegawa
发明人： Katsuya Hayano , Norio Hasegawa
IPC分类号： G03C500
CPC分类号： G03F3/10 , G03F1/26
摘要： Disclosed is a technique capable of reducing the manufacturing time of a photomask. In a method of transferring a predetermined pattern onto a semiconductor wafer by reduced projection exposure using a product mask manufactured by performing the reduced projection exposure to a pattern of an IP mask Mm1, the IP mask Mm1 is designed to have a resist mask structure in which a light-shielding pattern thereof is constituted of an organic film such as a resist film.
摘要翻译：公开了能够减少光掩模的制造时间的技术。在通过使用通过对IP掩模Mm1的图案执行减少的投影曝光制造的产品掩模的减少的投影曝光将预定图案转印到半导体晶片上的方法中，IP掩模Mm1被设计为具有抗蚀剂掩模结构，其中其遮光图案由诸如抗蚀剂膜的有机膜构成。

70. 发明授权

US06713231B1 Method of manufacturing semiconductor integrated circuit devices 有权
标题翻译：制造半导体集成电路器件的方法
公开(公告)号：US06713231B1
公开(公告)日：2004-03-30
申请号：US09707833
申请日：2000-11-08
申请人： Norio Hasegawa , Akira Imai , Katsuya Hayano
发明人： Norio Hasegawa , Akira Imai , Katsuya Hayano
IPC分类号： G03F700
CPC分类号： G03F7/70358 , G03F1/30 , G03F7/70283 , G03F7/70466
摘要： To alleviate the absolute value control accuracy of phases in a mask having a groove shifter structure, transfer regions 4C, 4D formed at different planar positions on the same plane of the same mask 2 are subjected to a multiple exposure by scanning exposure. Although identical mask patterns are formed over the transfer regions 4C, 4D, respective groove shifters 2d provided to these mask patterns are arranged opposite from each other.
摘要翻译：为了减轻具有凹槽移位结构的掩模中的相位的绝对值控制精度，形成在同一掩模2的同一平面上的不同平面位置处的转印区域4C，4D通过扫描曝光进行多次曝光。虽然在转印区域4C，4D上形成相同的掩模图案，但是设置在这些掩模图案上的相应的凹槽移位器2d彼此相对布置。

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