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61. 发明授权

US06384698B1 Transverse double mode saw filter 有权
标题翻译：横向双模锯式过滤器
公开(公告)号：US06384698B1
公开(公告)日：2002-05-07
申请号：US09719836
申请日：2000-12-21
申请人： Satoru Hayashi , Michiaki Takagi , Takashi Yamazaki
发明人： Satoru Hayashi , Michiaki Takagi , Takashi Yamazaki
IPC分类号： H03H964
CPC分类号： H03H9/6479 , H03H9/0028 , H03H9/6463
摘要： A transversally coupled double-mode SAW filter using a surface acoustic wave has two SAW resonators which have curtain-like electrodes and a pair of reflectors on both side thereof, respectively, and which are disposed in parallel on a piezoelectric flat plate in the propagation direction of the surface acoustic wave. The curtain-like electrodes of the SAW resonators have a first bus bar of electrically positive electrode which extends in the propagation direction of SAW and second and third bus bars of electrically negative electrode which extend in parallel on both sides of the first bus bar. The first bus bar has multiple electrode fingers of electrically positive electrode which face the second and third bus bars on both sides thereof and which extend in a direction perpendicular to the propagation direction of SAW so as to suitably have a space of &lgr;/2, &lgr; being the wavelength of the surface acoustic wave, and a width of &lgr;/4. The second and third bus bars have multiple electrode fingers of electrically negative electrode which correspond to the electrode fingers of electrically positive electrode, face the first bus bar and extend in a direction perpendicular to the propagation direction of SAW so as to similarly have a space of &lgr;/2 and a width of &lgr;/4. Thereby, the curtain-like electrodes are constituted to invert the direction of driving field by 180° with the first bus bar therebetween, and to enable making the passband width sharply broader than before by use of the frequency difference between excited primary symmetric mode and primary anti-symmetric mode.
摘要翻译：使用声表面波的横向耦合的双模式SAW滤波器具有两个SAW谐振器，它们分别在其两侧具有帘状电极和一对反射器，并且在传播方向上并联设置在压电平板上的表面声波。 SAW谐振器的帘状电极具有在SAW的传播方向上延伸的电正极的第一母线和在第一母线的两侧平行延伸的电负极的第二和第三母线。第一母线具有电极正极的多个电极指，其两侧面对第二和第三母线，并且在与SAW的传播方向垂直的方向上延伸，以适当地具有lambd / 2，lambd的空间是表面声波的波长，以及lambd / 4的宽度。第二和第三母线具有电负极的多个电极指，其对应于电正极的电极指，面对第一母线并且在垂直于SAW的传播方向的方向上延伸，以类似地具有 lambd / 2和lambd / 4的宽度。由此，帘式电极被构成为将驱动场的方向与其间的第一母线反转180°，并且通过使用被激励的主对称模式与初级对称模式之间的频率差，能够使通带宽度比以前更宽反对称模式。

62. 发明授权

US06217990B1 Multilayer circuit board having no local warp on mounting surface thereof 失效
标题翻译：在其安装表面上没有局部翘曲的多层电路板
公开(公告)号：US06217990B1
公开(公告)日：2001-04-17
申请号：US09073139
申请日：1998-05-06
申请人： Yasutomi Asai , Takashi Nagasaka , Shinji Ota , Takashi Yamazaki , Shinya Terao , Syoichi Nakagawa
发明人： Yasutomi Asai , Takashi Nagasaka , Shinji Ota , Takashi Yamazaki , Shinya Terao , Syoichi Nakagawa
IPC分类号： B32B300
CPC分类号： H05K1/0271 , H01L23/49822 , H01L23/49838 , H01L2224/16 , H01L2924/09701 , H01L2924/15192 , H05K1/0306 , H05K3/4611 , H05K3/4629 , H05K2201/09781 , H05K2201/10674 , Y10T428/24926
摘要： A multilayer circuit board for holding a flip chip thereon includes laminated first to fourth substrates. A first pattern integrated portion having a locally high pattern density is provided on the second substrate. Further, on the fourth substrate which is disposed on an opposite side of the second substrate with respect to a center in a laminated direction of the circuit board, a second pattern integrated portion having a locally high pattern density is disposed to correspond to the first pattern integrated portion. Accordingly, a local warp can be prevented from being produced on the mounting surface of the multilayer circuit board when the circuit board is manufactured by baking.
摘要翻译：用于保持倒装芯片的多层电路板包括层叠的第一至第四基板。具有局部高图案密度的第一图案集成部分设置在第二基板上。此外，在相对于电路板的层叠方向的中心设置在第二基板的相对侧的第四基板上，具有局部高图案密度的第二图案一体化部分设置成对应于第一图案集成部分。因此，当通过烘烤制造电路板时，可以防止在多层电路板的安装表面上产生局部翘曲。

63. 发明授权

US06212089B1 Semiconductor memory device and defect remedying method thereof 有权
标题翻译：半导体存储器件及其缺陷补救方法
公开(公告)号：US06212089B1
公开(公告)日：2001-04-03
申请号：US09547917
申请日：2000-04-11
申请人： Kazuhiko Kajigaya , Kazuyuki Miyazawa , Manabu Tsunozaki , Kazuyoshi Oshima , Takashi Yamazaki , Yuji Sakai , Jiro Sawada , Yasunori Yamaguchi , Tetsurou Matsumoto , Shinji Udo , Hiroshi Yoshioka , Hirokazu Saito , Mitsuhiro Takano , Makoto Morino , Sinichi Miyatake , Eiji Miyamoto , Yasuhiro Kasama , Akira Endo , Ryoichi Hori , Jun Etoh , Masashi Horiguchi , Shinichi Ikenaga , Atsushi Kumata
发明人： Kazuhiko Kajigaya , Kazuyuki Miyazawa , Manabu Tsunozaki , Kazuyoshi Oshima , Takashi Yamazaki , Yuji Sakai , Jiro Sawada , Yasunori Yamaguchi , Tetsurou Matsumoto , Shinji Udo , Hiroshi Yoshioka , Hirokazu Saito , Mitsuhiro Takano , Makoto Morino , Sinichi Miyatake , Eiji Miyamoto , Yasuhiro Kasama , Akira Endo , Ryoichi Hori , Jun Etoh , Masashi Horiguchi , Shinichi Ikenaga , Atsushi Kumata
IPC分类号： G11C1300
CPC分类号： H01L24/06 , G11C5/025 , G11C5/04 , G11C5/063 , G11C11/406 , G11C29/06 , G11C29/12005 , G11C29/12015 , G11C29/24 , G11C29/34 , G11C29/50 , G11C29/50012 , G11C29/70 , G11C29/80 , G11C29/804 , G11C29/832 , G11C29/844 , G11C2029/2602 , H01L24/05 , H01L24/45 , H01L24/48 , H01L27/0207 , H01L27/105 , H01L27/10897 , H01L27/11898 , H01L2224/04042 , H01L2224/05553 , H01L2224/05556 , H01L2224/05624 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/48624 , H01L2224/73215 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01021 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01037 , H01L2924/01038 , H01L2924/01039 , H01L2924/01041 , H01L2924/01043 , H01L2924/0105 , H01L2924/01051 , H01L2924/01052 , H01L2924/01054 , H01L2924/01055 , H01L2924/01058 , H01L2924/01059 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01083 , H01L2924/01084 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , H01L2924/00 , H01L2924/00012
摘要： Herein disclosed is a semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. Thanks to this structure in which the peripheral circuits are arranged at the center portion of the chip, the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
摘要翻译：这里公开了一种半导体存储器件，其中外围电路布置在由纵向中心部分和横向中心部分组成的半导体芯片的交叉区域中，并且其中存储器阵列布置在由交叉区域。由于外围电路布置在芯片的中心部分的这种结构，最长的信号传输路径可以缩短到芯片尺寸的大约一半，以加快DRAM的大容量。

64. 发明授权

US6124629A Semiconductor device including a resin sealing member which exposes the rear surface of the sealed semiconductor chip 失效
标题翻译：半导体装置包括使密封的半导体芯片的后表面露出的树脂密封构件
公开(公告)号：US6124629A
公开(公告)日：2000-09-26
申请号：US168097
申请日：1998-10-08
申请人： Gen Murakami , Kunihiro Tsubosaki , Masahiro Ichitani , Kunihiko Nishi , Ichiro Anjo , Asao Nishimura , Makoto Kitano , Akihiro Yaguchi , Sueo Kawai , Masatsugu Ogata , Syuuji Eguchi , Hiroyoshi Kokaku , Masanori Segawa , Hiroshi Hozoji , Takashi Yokoyama , Noriyuki Kinjo , Aizo Kaneda , Junichi Saeki , Shozo Nakamura , Akio Hasebe , Hiroshi Kikuchi , Isamu Yoshida , Takashi Yamazaki , Kazuyoshi Oshima , Tetsuro Matsumoto
发明人： Gen Murakami , Kunihiro Tsubosaki , Masahiro Ichitani , Kunihiko Nishi , Ichiro Anjo , Asao Nishimura , Makoto Kitano , Akihiro Yaguchi , Sueo Kawai , Masatsugu Ogata , Syuuji Eguchi , Hiroyoshi Kokaku , Masanori Segawa , Hiroshi Hozoji , Takashi Yokoyama , Noriyuki Kinjo , Aizo Kaneda , Junichi Saeki , Shozo Nakamura , Akio Hasebe , Hiroshi Kikuchi , Isamu Yoshida , Takashi Yamazaki , Kazuyoshi Oshima , Tetsuro Matsumoto
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50 , H01L23/31 , H01L23/495 , H01L25/10 , H01L29/06 , H05K1/14 , H05K1/18 , H05K3/34
CPC分类号： H01L24/32 , H01L23/3107 , H01L23/4951 , H01L23/49555 , H01L23/49558 , H01L23/49568 , H01L23/49586 , H01L24/05 , H01L24/06 , H01L25/105 , H01L29/0657 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/05556 , H01L2224/05599 , H01L2224/05624 , H01L2224/06136 , H01L2224/16 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/4569 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/48624 , H01L2224/48724 , H01L2224/48799 , H01L2224/73215 , H01L2224/85205 , H01L2224/8592 , H01L2225/1005 , H01L2225/1029 , H01L2225/107 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01043 , H01L2924/01045 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01058 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01092 , H01L2924/0132 , H01L2924/014 , H01L2924/10253 , H01L2924/13091 , H01L2924/14 , H01L2924/15738 , H01L2924/15747 , H01L2924/1576 , H01L2924/181 , H01L2924/1815 , H01L2924/3025 , H01L2924/3511 , H05K1/144 , H05K1/181 , H05K3/3421 , Y10T29/49121
摘要： As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
摘要翻译：由于半导体芯片尺寸大，高集成度和加速度，所以难以将半导体芯片与包装中的引线组合在一起。鉴于这种困难，已经采用称为半导体和引线堆叠和封装的称为“片上引线”或“引线芯片”结构的封装结构。在该结构的封装中，根据本发明，内引线和半导体芯片的前端部之间的间隙比除引导端部和半导体芯片之外的内引线部分之间的间隙宽，从而减小杂散容量，提高信号传输速率和减少电气噪声。

65. 发明授权

US6100115A Semiconductor device 失效
公开(公告)号：US6100115A
公开(公告)日：2000-08-08
申请号：US166121
申请日：1998-10-05
申请人： Gen Murakami , Kunihiro Tsubosaki , Masahiro Ichitani , Kunihiko Nishi , Ichiro Anjo , Asao Nishimura , Makoto Kitano , Akihiro Yaguchi , Sueo Kawai , Masatsugu Ogata , Syuuji Eguchi , Hiroyoshi Kokaku , Masanori Segawa , Hiroshi Hozoji , Takashi Yokoyama , Noriyuki Kinjo , Aizo Kaneda , Junichi Saeki , Shozo Nakamura , Akio Hasebe , Hiroshi Kikuchi , Isamu Yoshida , Takashi Yamazaki , Kazuyoshi Oshima , Tetsuro Matsumoto
发明人： Gen Murakami , Kunihiro Tsubosaki , Masahiro Ichitani , Kunihiko Nishi , Ichiro Anjo , Asao Nishimura , Makoto Kitano , Akihiro Yaguchi , Sueo Kawai , Masatsugu Ogata , Syuuji Eguchi , Hiroyoshi Kokaku , Masanori Segawa , Hiroshi Hozoji , Takashi Yokoyama , Noriyuki Kinjo , Aizo Kaneda , Junichi Saeki , Shozo Nakamura , Akio Hasebe , Hiroshi Kikuchi , Isamu Yoshida , Takashi Yamazaki , Kazuyoshi Oshima , Tetsuro Matsumoto
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50 , H01L23/31 , H01L23/495 , H01L25/10 , H01L29/06 , H05K1/14 , H05K1/18 , H05K3/34
CPC分类号： H01L24/32 , H01L23/3107 , H01L23/4951 , H01L23/49555 , H01L23/49558 , H01L23/49568 , H01L23/49586 , H01L24/05 , H01L24/06 , H01L25/105 , H01L29/0657 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/05556 , H01L2224/05599 , H01L2224/05624 , H01L2224/06136 , H01L2224/16 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/4569 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/48624 , H01L2224/48724 , H01L2224/48799 , H01L2224/73215 , H01L2224/85205 , H01L2224/8592 , H01L2225/1005 , H01L2225/1029 , H01L2225/107 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01043 , H01L2924/01045 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01058 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01092 , H01L2924/0132 , H01L2924/014 , H01L2924/10253 , H01L2924/13091 , H01L2924/14 , H01L2924/15738 , H01L2924/15747 , H01L2924/1576 , H01L2924/181 , H01L2924/1815 , H01L2924/3025 , H01L2924/3511 , H05K1/144 , H05K1/181 , H05K3/3421 , Y10T29/49121
摘要： As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

66. 发明授权

US5854508A Semiconductor memory device having zigzag bonding pad arrangement 失效
标题翻译：具有之字形焊盘布置的半导体存储器件
公开(公告)号：US5854508A
公开(公告)日：1998-12-29
申请号：US618381
申请日：1996-03-19
申请人： Kazuhiko Kajigaya , Kazuyuki Miyazawa , Manabu Tsunozaki , Kazuyoshi Oshima , Takashi Yamazaki , Yuji Sakai , Jiro Sawada , Yasunori Yamaguchi , Tetsurou Matsumoto , Shinji Udo , Hiroshi Yoshioka , Hirokazu Saito , Mitsuhiro Takano , Makoto Morino , Sinichi Miyatake , Eiji Miyamoto , Yasuhiro Kasama , Akira Endo , Ryoichi Hori , Jun Etoh , Masashi Horiguchi , Shinichi Ikenaga , Atsushi Kumata
发明人： Kazuhiko Kajigaya , Kazuyuki Miyazawa , Manabu Tsunozaki , Kazuyoshi Oshima , Takashi Yamazaki , Yuji Sakai , Jiro Sawada , Yasunori Yamaguchi , Tetsurou Matsumoto , Shinji Udo , Hiroshi Yoshioka , Hirokazu Saito , Mitsuhiro Takano , Makoto Morino , Sinichi Miyatake , Eiji Miyamoto , Yasuhiro Kasama , Akira Endo , Ryoichi Hori , Jun Etoh , Masashi Horiguchi , Shinichi Ikenaga , Atsushi Kumata
IPC分类号： G11C5/00 , G11C5/02 , G11C11/406 , H01L23/485 , H01L23/48
CPC分类号： H01L24/05 , G11C11/406 , G11C5/025 , H01L24/06 , H01L24/48 , H01L2224/04042 , H01L2224/05553 , H01L2224/05556 , H01L2224/05624 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/48624 , H01L2224/73215 , H01L24/45 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01021 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01033 , H01L2924/01037 , H01L2924/01038 , H01L2924/01039 , H01L2924/01041 , H01L2924/01043 , H01L2924/0105 , H01L2924/01051 , H01L2924/01052 , H01L2924/01054 , H01L2924/01055 , H01L2924/01058 , H01L2924/01059 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/01087 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/3011 , H01L2924/3025 , Y10S257/908
摘要： Herein disclosed is a semiconductor memory device, in which peripheral circuits are arranged in a cross area of a semiconductor chip composed of the longitudinal center portions and the transverse center portions, and in which memory arrays are arranged in the four regions which are divided by the cross area. Thanks to this structure in which the peripheral circuits are arranged at the center portion of the chip, the longest signal transmission paths can be shortened to about one half of the chip size to speed up the DRAM which is intended to have a large storage capacity.
摘要翻译：这里公开了一种半导体存储器件，其中外围电路布置在由纵向中心部分和横向中心部分组成的半导体芯片的交叉区域中，并且其中存储器阵列布置在由交叉区域。由于外围电路布置在芯片的中心部分的这种结构，最长的信号传输路径可以缩短到芯片尺寸的大约一半，以加快DRAM的大容量。

67. 发明授权

US5777978A Disk unit and process for assembling transmission mechanism used for driving head carriage 失效
标题翻译：用于驱动头架的组合传动机构的磁盘单元和过程
公开(公告)号：US5777978A
公开(公告)日：1998-07-07
申请号：US432173
申请日：1995-06-26
申请人： Toshiro Ota , Masakatsu Hosoya , Takashi Yamazaki
发明人： Toshiro Ota , Masakatsu Hosoya , Takashi Yamazaki
IPC分类号： G11B7/085 , G11B17/04 , G11B21/04 , G11B21/02
CPC分类号： G11B17/056 , G11B21/046 , G11B7/08582 , G11B7/085
摘要： Coil springs 96 and 97 are incorporated in a driving-side transmission mechanism 61 so as to absorb backlashes between a rack 55 and a drive gear 59a. Since the respective backlashes between the drive gear 59a and the rack 55 are absorbed by way of the coil springs 96 and 97, merely phase matching at the sole driving-side transmission mechanism 61 is required as phase matching work of toothed portions of gears during assembly, thereby simplifying the assembling task and shortening assembly time. Additionally, since a coil spring is not included in the rack 55, the rack can be designed to be small-sized in its width direction, thereby minimizing the moment of a force about the meshed engagement point, acting on an optical head carriage 53, and reducing transfer loss in the head.
摘要翻译： PCT No.PCT / JP94 / 01510 Sec。 371日期：1995年6月26日 102（e）日期1995年6月26日PCT 1994年9月12日PCT PCT。公开号WO95 / 08172 日期1995年3月23日线弹簧96和97并入驱动侧传动机构61中，以吸收齿条55与驱动齿轮59a之间的间隙。由于驱动齿轮59a和齿条55之间的相应的间隙被螺旋弹簧96和97吸收，因此仅需要在底部驱动侧传动机构61处的相位匹配作为在组装期间齿轮的齿形部分的相位匹配工作从而简化组装任务，缩短装配时间。此外，由于螺旋弹簧不包括在齿条55中，所以齿条可以被设计成在其宽度方向上的尺寸小，从而最小化作用在光学头滑架53上的啮合接合点周围的力的力矩，并减少头部的转移损失。

68. 发明授权

US4949617A Apparatus for applying and dispensing masking paper 失效
标题翻译：用于施加和分配掩蔽纸的装置
公开(公告)号：US4949617A
公开(公告)日：1990-08-21
申请号：US271874
申请日：1988-11-16
申请人： Takashi Yamazaki
发明人： Takashi Yamazaki
IPC分类号： B05B15/04 , B65H35/00 , C09J7/02
CPC分类号： B65H35/004 , B05B15/0456 , C09J7/02 , C09J2203/31 , Y10T83/8784 , Y10T83/8822 , Y10T83/9454
摘要： A masking paper is wound in a roll form and includes a relatively thin synthetic resin film folded in a plurality of parallel pleats and a relatively thick tape disposed along a longitudinal margin of the film and having a pressure sensitive adhesive layer formed on the opposite sides thereof. An apparatus for applying and dispensing the masking paper includes a housing accommodating the masking paper in a roll form, a group of rolls for taking the masking paper out of the housing and a cutter blade for cutting the masking paper. The cutter blade is reciprocated back and forth across the masking paper, and is retracted from the masking paper during its movement from a starting position.
摘要翻译：掩模纸以卷状卷绕，并且包括折叠成多个平行褶皱的相对薄的合成树脂膜和沿着膜的纵向边缘布置的相对厚的带，并且在其相对侧上形成有压敏粘合剂层。用于施加和分配掩模纸的装置包括容纳卷状掩模纸的壳体，用于将掩模纸从壳体中取出的一组辊和用于切割掩模纸的切割刀。切割刀片在掩模纸上往复运动，并且在从起始位置移动时从掩模纸退回。

69. 发明授权

US4930583A Portable battery-powered tool 失效
标题翻译：便携式电池供电工具
公开(公告)号：US4930583A
公开(公告)日：1990-06-05
申请号：US255824
申请日：1988-10-11
申请人： Fusao Fushiya , Takashi Yamazaki , Mikio Saito
发明人： Fusao Fushiya , Takashi Yamazaki , Mikio Saito
IPC分类号： B25D17/04 , B25F5/00 , B25F5/02
CPC分类号： B25F5/003 , B25D17/04 , B25F5/02
摘要： A portable, cordless battery-powered tool with a relatively small overall length is provided. A handle section forms the rearmost part of the tool. An electric motor is located below a spindle and forwardly of the handle section. The motor has a rotatable shaft located in parallel with the spindle. The handle section is provided with a switch trigger which is substantially aligned with the central axis of the spindle at its top.
摘要翻译：提供了一种具有相对较小总体长度的便携式，无绳电池供电的工具。手柄部分形成工具的最后部分。电动机位于主轴下方并且在手柄部分的前方。电动机具有与主轴平行的旋转轴。手柄部分设置有开关触发器，其在其顶部基本上与心轴的中心轴线对准。

70. 外观设计

USD300230S Combined tape dispenser and cutter blade 失效
公开(公告)号：USD300230S
公开(公告)日：1989-03-14
申请号：US809917
申请日：1985-12-17
申请人： Takashi Yamazaki
设计人： Takashi Yamazaki

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