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61. 发明授权

US06702648B1 Use of scatterometry/reflectometry to measure thin film delamination during CMP 有权
标题翻译：在CMP期间使用散射/反射测量薄膜分层
公开(公告)号：US06702648B1
公开(公告)日：2004-03-09
申请号：US10277559
申请日：2002-10-22
申请人： Steven C. Avanzino , Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
发明人： Steven C. Avanzino , Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
IPC分类号： B24B4900
CPC分类号： B24B37/013 , B24B49/12
摘要： One aspect of the present invention relates to a system and method for examining a wafer for delamination in real time while polishing the wafer. The system comprises a polishing system programmed to planarize one or more film layers formed on at least a portion of a semiconductor wafer surface; a real-time metrology system coupled to the polishing system such that the metrology system examines the layers as they are planarized; and one or more delamination sensors, wherein at least a portion of each sensor is integrated into the polishing system in order to provide data to the metrology system and wherein the sensor comprises at least one optical element to detect delamination during polishing. The method involves polishing at least a portion of an uppermost film layer and examining at least a portion of a layer underlying the uppermost film layer for delamination as the uppermost layer is being polished.
摘要翻译：本发明的一个方面涉及一种用于在抛光晶片的同时检查晶片以实时分层的系统和方法。该系统包括被编程为平坦化形成在半导体晶片表面的至少一部分上的一个或多个膜层的抛光系统; 耦合到抛光系统的实时计量系统，使得计量系统在平面化时对层进行检查; 和一个或多个分层传感器，其中每个传感器的至少一部分被集成到抛光系统中，以便向计量系统提供数据，并且其中传感器包括至少一个光学元件以在抛光期间检测分层。该方法包括抛光最上面的薄膜层的至少一部分，并且在最上层被抛光时检查最上面的薄膜层下面的层的至少一部分用于分层。

62. 发明授权

US06629786B1 Active control of developer time and temperature 失效
标题翻译：主动控制显影时间和温度
公开(公告)号：US06629786B1
公开(公告)日：2003-10-07
申请号：US09845232
申请日：2001-04-30
申请人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh , Ramkumar Subramanian
发明人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： G03D500
CPC分类号： G03D5/00
摘要： A system for regulating the time and temperature of a development process is provided. The system includes one or more light sources, each light source directing light to one or more gratings being developed on a wafer. Light reflected from the gratings is collected by a measuring system, which processes the collected light. Light passing through the gratings may similarly be collected by the measuring system, which processes the collected light. The collected light is indicative of the progress of development of the respective portions of the wafer. The measuring system provides progress of development related data to a processor that determines the progress of development of the respective portions of the wafer. The system also includes a plurality of heating devices, each heating device corresponds to a respective portion of the developer and provides for the heating thereof. The processor selectively controls the heating devices so as to regulate temperature of the respective portions of the wafer.
摘要翻译：提供了一种用于调节开发过程的时间和温度的系统。该系统包括一个或多个光源，每个光源将光引导到在晶片上显影的一个或多个光栅。从光栅反射的光被测量系统收集，该系统处理收集的光。通过光栅的光可以类似地由处理所收集的光的测量系统收集。所收集的光表示晶片的各个部分的显影进展。该测量系统提供开发相关数据的进展到处理器，该处理器确定晶片的相应部分的开发进度。该系统还包括多个加热装置，每个加热装置对应于显影剂的相应部分并提供其加热。处理器选择性地控制加热装置，以调节晶片各部分的温度。

63. 发明授权

US06448097B1 Measure fluorescence from chemical released during trim etch 失效
标题翻译：测量在修剪蚀刻期间释放的化学物质的荧光
公开(公告)号：US06448097B1
公开(公告)日：2002-09-10
申请号：US09911236
申请日：2001-07-23
申请人： Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
发明人： Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
IPC分类号： H01L3126
CPC分类号： G01N21/64 , G01N2021/6417 , H01L22/26
摘要： A system and method is provided for determining and controlling development of a semiconductor substrate employing fluorescence spectroscopy. One aspect of the invention relates to a system and method employing fluorescence spectroscopy to facilitate control of a chemical trim etch process during development of a photoresist material layer. The chemical trim etch process comprises applying a trim compound or material to a patterned photoresist. The trim compound or material is diffusable into the sides and top of the patterned resist. The diffused regions of the resist are soluble in a developer, which facilitates creating smaller features in the patterned photoresist. The fluorescence spectroscopy system can be employed to measure isolated and dense gratings or CDs and use the evolution of the CD to determine when to terminate the chemical trim process.
摘要翻译：提供了一种使用荧光光谱法确定和控制半导体衬底的开发的系统和方法。本发明的一个方面涉及使用荧光光谱学来促进在光致抗蚀剂材料层的显影期间控制化学修剪蚀刻工艺的系统和方法。化学修剪蚀刻工艺包括将修剪化合物或材料施加到图案化的光致抗蚀剂上。修整组合物或材料可扩散到图案化抗蚀剂的侧面和顶部。抗蚀剂的扩散区域可溶于显影剂，这有助于在图案化的光致抗蚀剂中产生更小的特征。荧光光谱系统可用于测量孤立和致密的光栅或CD，并使用CD的演变来确定何时终止化学修饰过程。

64. 发明授权

US06335152B1 Use of RTA furnace for photoresist baking 有权
标题翻译：使用RTA炉进行光刻胶烘烤
公开(公告)号：US06335152B1
公开(公告)日：2002-01-01
申请号：US09564408
申请日：2000-05-01
申请人： Ramkumar Subramanian , Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh
发明人： Ramkumar Subramanian , Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh
IPC分类号： G03F738
CPC分类号： G03F7/38
摘要： In one embodiment, the present invention relates to a method of processing an irradiated photoresist involving the steps of placing a substrate having the irradiated photoresist thereon at a first temperature in a rapid thermal anneal furnace; heating the substrate having the irradiated photoresist thereon to a second temperature within about 0.1 seconds to about 10 seconds; cooling the substrate having the irradiated photoresist thereon to a third temperature in a rapid thermal annealing furnace within about 0.1 seconds to about 10 seconds; and developing the irradiated photoresist, wherein the second temperature is higher than the first temperature and the third temperature. In another embodiment, the present invention relates to a system of processing a photoresist, containing a source of actinic radiation and a mask for selectively irradiating a photoresist; a rapid thermal annealing furnace for rapidly heating and rapidly cooling a selectively irradiated photoresist, wherein the rapid heating and rapid cooling are independently conducted within about 0.1 seconds to about 10 seconds; and a developer for developing a rapid thermal annealing furnace heated and selectively irradiated photoresist into a patterned photoresist.
摘要翻译：在一个实施方案中，本发明涉及一种处理被照射的光致抗蚀剂的方法，包括以下步骤：在快速热退火炉中将具有照射光致抗蚀剂的基底在第一温度下放置; 将其上具有照射的光致抗蚀剂的基板加热至约0.1秒至约10秒的第二温度; 将快速热退火炉中具有照射光致抗蚀剂的基板冷却至约0.1秒至约10秒的第三温度; 并且显影所述被照射的光致抗蚀剂，其中所述第二温度高于所述第一温度和所述第三温度。在另一个实施方案中，本发明涉及一种处理含有光化辐射源的光致抗蚀剂的系统和用于选择性地照射光致抗蚀剂的掩模; 快速热退火炉，用于快速加热和快速冷却选择性照射的光致抗蚀剂，其中快速加热和快速冷却在约0.1秒至约10秒内独立进行; 以及用于将快速热退火炉加热并选择性地照射光致抗蚀剂的显影剂加工成图案化的光致抗蚀剂。

65. 发明授权

US07224456B1 In-situ defect monitor and control system for immersion medium in immersion lithography 有权
标题翻译：浸没式光刻浸渍介质的原位缺陷监测和控制系统
公开(公告)号：US07224456B1
公开(公告)日：2007-05-29
申请号：US10858759
申请日：2004-06-02
申请人： Khoi Phan , Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
发明人： Khoi Phan , Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
IPC分类号： G01N15/02
CPC分类号： G01N21/47 , G01N2015/0011 , G03F7/70341
摘要： A system and method for detecting bubbles in a lithographic immersion medium and for controlling a lithographic process based at least in part on the detection of bubbles is provided. A bubble monitoring component emits an incident beam that passes through the immersion medium and is incident upon a substrate to produce a reflected and/or diffracted beam(s). The reflected and/or diffracted beam(s) is received by one or more optical detectors. The presence or absence of bubbles can be derived from information extracted by scatterometry from the reflected and/or diffracted beams. A process control component interacts with a positioning component and an optical exposure component to alter a lithographic process based at least in part on the results of the scatterometry.
摘要翻译：提供了一种用于在光刻浸渍介质中检测气泡并且至少部分地基于气泡检测来控制光刻工艺的系统和方法。气泡监测部件发射穿过浸没介质并入射到基板上以产生反射和/或衍射光束的入射光束。反射和/或衍射光束被一个或多个光学检测器接收。可以通过从反射和/或衍射光束散射法提取的信息导出气泡的存在或不存在。过程控制部件与定位部件和光学曝光部件相互作用，以至少部分地基于散射测量的结果来改变光刻工艺。

66. 发明授权

US06771374B1 Scatterometry based measurements of a rotating substrate 有权
标题翻译：旋转基板的基于散射法的测量
公开(公告)号：US06771374B1
公开(公告)日：2004-08-03
申请号：US10050758
申请日：2002-01-16
申请人： Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton , Ramkumar Subramanian
发明人： Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton , Ramkumar Subramanian
IPC分类号： G01N2155
CPC分类号： G01N21/211 , G01B11/0675 , G01N21/4738 , G01N21/9501 , Y10T428/21
摘要： A system and method are disclosed for monitoring characteristics of a rotating substrate. As the substrate rotates in an environment, an incident light beam is emitted onto the substrate near an axis about which the substrate rotates. The emission of the incident beam is controlled as a function of the angular orientation of the substrate, so that the incident beam selectively interrogates a central region of the substrate to facilitate measuring and/or inspecting characteristics of the substrate.
摘要翻译：公开了一种用于监测旋转衬底的特性的系统和方法。当衬底在环境中旋转时，入射光束在衬底旋转的轴附近被发射到衬底上。入射光束的发射被控制为衬底的角度取向的函数，使得入射光束选择性地询问衬底的中心区域以便于测量和/或检查衬底的特性。

67. 发明授权

US06562185B2 Wafer based temperature sensors for characterizing chemical mechanical polishing processes 有权
标题翻译：用于表征化学机械抛光工艺的基于晶圆的温度传感器
公开(公告)号：US06562185B2
公开(公告)日：2003-05-13
申请号：US09955552
申请日：2001-09-18
申请人： Steven C. Avanzino , Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
发明人： Steven C. Avanzino , Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
IPC分类号： B24B3700
CPC分类号： B24B37/015
摘要： A system for characterizing a chemical mechanical polishing process is provided. The system includes a wafer that has a metal, polysilicon, and/or dielectric layer and/or substrate and a temperature sensor located in and/or on the metal, polysilicon and/or dielectric layer and/or substrate. The system also includes a temperature monitoring system that can read the wafer temperature from the temperature sensors and that can analyze the wafer temperature to characterize the chemical mechanical polishing process. Such characterization includes producing information concerning relationships between wafer temperature and polishing rate, polishing uniformity and introduction of defects during polishing. Such relationships are correlated with wafer temperature as related to parameters like polishing time, pressure, speed, slurry properties and wafer/metal layer properties. Such characterization can be employed, for example, to better understand a CMP process, to facilitate initializing subsequent chemical mechanical polishing processes and/or apparatus and/or to control such chemical mechanical polishing processes and/or apparatus by monitoring and/or controlling wafer temperature.
摘要翻译：提供了表征化学机械抛光工艺的系统。该系统包括具有位于金属，多晶硅和/或电介质层和/或衬底中和/或上的金属，多晶硅和/或电介质层和/或衬底和温度传感器的晶片。该系统还包括一个温度监控系统，可以从温度传感器读取晶圆温度，并且可以分析晶圆温度以表征化学机械抛光过程。这种表征包括产生关于晶片温度和抛光速率之间的关系的信息，抛光均匀性和在抛光期间引入缺陷。这些关系与晶片温度相关，如与抛光时间，压力，速度，浆料性质和晶片/金属层性质等参数相关。可以采用这种表征，例如，更好地理解CMP工艺，以便于初始化随后的化学机械抛光工艺和/或设备和/或通过监测和/或控制晶片温度来控制这种化学机械抛光工艺和/或设备。

68. 发明授权

US06482558B1 Conducting electron beam resist thin film layer for patterning of mask plates 失效
标题翻译：用于掩模板图形化的导电电子束抗蚀剂薄膜层
公开(公告)号：US06482558B1
公开(公告)日：2002-11-19
申请号：US09782382
申请日：2001-02-12
申请人： Bhanwar Singh , Ramkumar Subramanian , Bharath Rangarajan
发明人： Bhanwar Singh , Ramkumar Subramanian , Bharath Rangarajan
IPC分类号： G03F900
CPC分类号： G03F7/093 , G03F1/40 , G03F1/50 , Y10S430/143
摘要： One aspect of the present invention relates to a system for dissipating electrostatic charge on a mask plate structure containing the mask plate structure containing a substrate, a chromium layer over the substrate, and a conductive polymer over the chromium layer; a conductive structure coupled to the mask plate structure which allows accumulated electrostatic charge to flow from the mask plate structure; a conductive path between the conductive structure and a ground, wherein the conductive path inacludes a switch controlled by a controller; and a detector coupled to the controller for signaling the controller when the accumulation of electrostatic charge is detected. Another aspect of the present invention relates to a method for dissipating charge accumulation during patterning of mask plates using a conductive polymer layer involving the steps of providing a mask substrate having a chromium layer; depositing a conductive polymer layer over the chromium layer; connecting a conductive structure to the mask substrate; irradiating portions of the mask substrate with an electron beam; detecting whether electrostatic charge exists on the mask substrate; and if electrostatic charge is detected, closing a circuit whereby the conductive structure is grounded to permit a flow of electrostatic charge from the mask substrate to the ground.
摘要翻译：本发明的一个方面涉及一种用于在掩模板结构上耗散静电电荷的系统，该系统包含含有衬底的掩模板结构，在衬底上的铬层和在铬层上的导电聚合物; 耦合到掩模板结构的导电结构，其允许积聚的静电电荷从掩模板结构流动; 导电结构和地之间的导电路径，其中导电路径不允许由控制器控制的开关; 以及耦合到控制器的检测器，用于在检测到静电电荷的累积时用于发信号通知控制器。本发明的另一方面涉及一种使用导电聚合物层在掩模板图案化期间耗散电荷累积的方法，包括以下步骤：提供具有铬层的掩模基板; 在所述铬层上沉积导电聚合物层; 将导电结构连接到所述掩模基板; 用电子束照射掩模基板的部分; 检测在掩模基板上是否存在静电电荷; 并且如果检测到静电电荷，则关闭电路，由此导电结构接地以允许静电电荷从掩模基板流到地面。

69. 发明授权

US07251033B1 In-situ reticle contamination detection system at exposure wavelength 有权
标题翻译：曝光波长处原位标线污染检测系统
公开(公告)号：US07251033B1
公开(公告)日：2007-07-31
申请号：US10858757
申请日：2004-06-02
申请人： Khoi Phan , Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
发明人： Khoi Phan , Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
IPC分类号： G01N21/00
CPC分类号： G01N21/94 , G01N2021/95676 , G03F1/84 , G03F7/70916
摘要： A system and method are provided for detecting contaminants or defects on a reticle in-situ. The system and method provide a system that measures the optical transmission through clear areas on a reticle and determines whether the optical transmission of a reticle has been degraded by contaminants or other defects.
摘要翻译：提供了一种系统和方法来现场检测标线上的污染物或缺陷。该系统和方法提供一种系统，其通过掩模版上的清晰区域测量光学透射，并确定掩模版的光学传输是否已被污染物或其他缺陷降解。

70. 发明授权

US07084988B1 System and method for creation of semiconductor multi-sloped features 失效
标题翻译：用于创建半导体多倾斜特征的系统和方法
公开(公告)号：US07084988B1
公开(公告)日：2006-08-01
申请号：US09893803
申请日：2001-06-28
申请人： Bharath Rangarajan , Bhanwar Singh , Ramkumar Subramanian
发明人： Bharath Rangarajan , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： G01B11/24
CPC分类号： H01L22/26
摘要： A system and method for monitoring the creation of semiconductor features with multi-slope profiles by employing scatterometry is provided. The system includes a wafer partitioned into one or more portions and one or more light sources, each light source directing light to one or more devices etched on a wafer, the devices having multi-sloped profiles. Reflected light is collected and converted into data by a measuring system. The data is indicative of the etching at the one or more portions of the wafer. The measuring system provides the data to a process analyzer that determines whether adjustments to etching components are necessary by comparing the data to stored etch parameter values. The system also includes etching components. At least one etch component corresponds to a portion of the wafer and performs the etching thereof. The process analyzer selectively controls the etch components to promote consistent etching of multi-slope profiles/features to compensate for wafer to wafer variations.
摘要翻译：提供了一种通过采用散射法来监测具有多斜率分布的半导体特征的创建的系统和方法。该系统包括分为一个或多个部分和一个或多个光源的晶片，每个光源将光引导到在晶片上蚀刻的一个或多个器件，该器件具有多倾斜轮廓。反射光被测量系统收集并转换成数据。数据表示在晶片的一个或多个部分处的蚀刻。测量系统将数据提供给过程分析仪，通过将数据与存储的蚀刻参数值进行比较来确定是否需要对蚀刻部件进行调整。该系统还包括蚀刻部件。至少一个蚀刻部件对应于晶片的一部分并执行其蚀刻。过程分析器选择性地控制蚀刻部件以促进多斜率分布/特征的一致蚀刻以补偿晶片到晶片的变化。

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