专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

61. 发明申请

US20100095691A1 COOLING STORAGE AND METHOD OF OPERATING THE SAME 审中-公开
标题翻译：冷却储存及其运行方法
公开(公告)号：US20100095691A1
公开(公告)日：2010-04-22
申请号：US12528684
申请日：2007-03-12
申请人： Naoshi Kondou , Akihiko Hirano , Masahide Yatori , Shinichi Kaga , Hideyuki Tashiro
发明人： Naoshi Kondou , Akihiko Hirano , Masahide Yatori , Shinichi Kaga , Hideyuki Tashiro
IPC分类号： F25B1/00 , F25B39/02 , F25D13/04 , G05B15/00
CPC分类号： F25B5/02 , F25B2600/0251 , F25B2600/2511 , F25D11/022 , F25D2700/12 , F25D2700/122 , Y02B40/32
摘要： PROBLEM TO BE SOLVED: To provide a cooling storage, in which a refrigerant from one compressor is selectively supplied to multiple evaporators respectively disposed in multiple storage rooms having different thermal loads, and prevent any temperature rise of a storage room of higher thermal load.SOLUTION: The liquid refrigerant from the compressor 20 and the condenser 21 is alternately supplied to the cooling device for the freezing room 27F and the evaporator for the refrigeration room 27R through the three-way valve 24, so that the freezing room and the refrigeration room are alternately cooled. Even if any one of the freezing room 13F and the refrigeration room 13R reached the lower limit set temperature on ahead, the freezing room 13F (the storage room of higher thermal load) is always cooled last and certainly cooled until it reaches the lower limit set temperature.
摘要翻译：要解决的问题：提供一种冷却储存器，其中来自一个压缩机的制冷剂选择性地供应到分别设置在具有不同热负荷的多个储藏室中的多个蒸发器，并且防止具有较高热负荷的储藏室的任何温度升高。解决方案：通过三通阀24将来自压缩机20和冷凝器21的液体制冷剂交替地供给到用于冷冻室27F的冷却装置和用于冷藏室27R的蒸发器，使得冷冻室和冷藏室交替冷却。即使冷冻室13F和制冷室13R中的任一个达到预定的下限设定温度，冷冻室13F（热负荷较高的储藏室）总是被冷却，并且确实冷却直到达到下限值温度。

62. 发明申请

US20100082160A1 REFRIGERATING STORAGE CABINET AND CONTROL METHOD FOR COMPRESSOR THEREOF 失效
标题翻译：制冷储存柜及其压缩机的控制方法
公开(公告)号：US20100082160A1
公开(公告)日：2010-04-01
申请号：US12527581
申请日：2007-02-26
申请人： Naoshi Kondou , Akihiko Hirano , Shinichi Kaga , Masahide Yatori , Hideyuki Tashiro
发明人： Naoshi Kondou , Akihiko Hirano , Shinichi Kaga , Masahide Yatori , Hideyuki Tashiro
IPC分类号： G05B15/00 , F25B1/00 , F25D13/00
CPC分类号： F25D29/00 , F25B49/025 , F25B2600/021 , F25B2600/2511 , F25D2700/12 , Y02B30/741
摘要： Deviation calculating means 42 calculates a deviation between an internal temperature detected by a temperature sensor 35 and a target temperature provided from target temperature setting means 41 for each predetermined time period. The deviation is integrated by deviation integrating means 46. When the integrated value exceeds a predetermined reference value, a rotational speed of an inverter motor that drives a compressor is increased. Therefore, for example, even if an internal temperature temporarily rises because a door is opened temporarily and outside air flows into a storage compartment, because there is no sudden change in the integrated value of the temperature deviation and the rotational speed of the compressor does not react in an oversensitive manner and rapidly increase. Consequently the control is stable. Thus, an unnecessarily oversensitive response to a sudden change in an internal temperature can be prevented, enabling operation at a higher efficiency.
摘要翻译：偏差计算装置42计算每个预定时间段由温度传感器35检测的内部温度与目标温度设定装置41提供的目标温度之间的偏差。偏差由偏差积分装置46积分。当积分值超过预定基准值时，驱动压缩机的变频电动机的转速增加。因此，例如，即使内部温度暂时上升，门暂时打开，外部空气流入储藏室，因为温度偏差的积分值没有突然变化，压缩机的转速不会以过敏的方式作出反应，并迅速增加。因此，控制是稳定的。因此，可以防止对内部温度的突然变化的不必要的过敏响应，使得能够以更高的效率进行操作。

63. 发明申请

US20090064710A1 Cooling apparatus 审中-公开
标题翻译：冷却装置
公开(公告)号：US20090064710A1
公开(公告)日：2009-03-12
申请号：US12221097
申请日：2008-07-31
申请人： Shinichi Kaga , Akihiko Hirano , Kazuyoshi Seki
发明人： Shinichi Kaga , Akihiko Hirano , Kazuyoshi Seki
IPC分类号： F25B1/00 , F25B49/00
CPC分类号： F25B49/027 , F25B2339/047 , F25B2400/06
摘要： A cooling apparatus which stably cools a target. The cooling apparatus includes a primary circuit that has a first heat exchanging section which is provided at a heat exchanger, and vaporizes a liquid-phase primary coolant to be a gas-phase primary coolant, and a condenser which condenses the gas-phase primary coolant to be the liquid-phase primary coolant, and lets the liquid-phase primary coolant flow to the first heat exchanging section from the condenser through a liquid piping and lets the gas-phase primary coolant flow to the condenser from the first heat exchanging section through a gas piping. The cooling apparatus further includes a secondary circuit having a second heat exchanging section, an expansion valve, an evaporator, and a compressor connected together by a coolant piping.
摘要翻译：稳定地冷却目标物的冷却装置。该冷却装置包括一个主回路，该主回路具有设置在热交换器处的第一热交换部分，并将液相一次冷却剂蒸发成气相一次冷却剂;以及冷凝器，其将气相一次冷却剂作为液相一级冷却剂，并且使液相一级冷却剂通过液体管道从冷凝器流到第一热交换部分，并使气相一级冷却剂从第一热交换部通过冷凝器流入冷凝器气体管道。冷却装置还包括具有通过冷却剂管道连接在一起的第二热交换部分，膨胀阀，蒸发器和压缩机的二次回路。

64. 发明申请

US20090007575A1 Cooling apparatus 有权
标题翻译：冷却装置
公开(公告)号：US20090007575A1
公开(公告)日：2009-01-08
申请号：US11822127
申请日：2007-07-02
申请人： Shinichi Kaga , Takeshi Ueda , Yoshiyasu Suzuki , Akihiko Hirano
发明人： Shinichi Kaga , Takeshi Ueda , Yoshiyasu Suzuki , Akihiko Hirano
IPC分类号： F25B49/00
CPC分类号： F25B49/02 , F25B2600/021 , F25B2600/111 , F25B2600/112 , F25B2700/197 , F25B2700/2104 , F25B2700/2116 , Y02B30/741 , Y02B30/743
摘要： A cooling apparatus such as a refrigerator includes a refrigeration cycle including a compressor driven by an electric motor, a condenser, a throttle valve and an evaporator, a first physical amount detector capable of detecting a physical quantity representing a temperature of an object to be cooled by the cooling operation of the evaporator, a temperature control device capable of controlling a rotating speed of the motor based on the physical quantity detected by the first physical quantity detector so that the object is cooled approximately to a target temperature, a second physical quantity detector capable of detecting a physical quantity corresponding to a performance margin of the refrigeration cycle, and a rotating speed limiter capable of limiting the rotating speed of the motor to or below a predetermined speed based on a physical quantity detected by the second physical quantity detector.
摘要翻译：诸如冰箱的冷却装置包括：制冷循环，包括由电动机驱动的压缩机，冷凝器，节流阀和蒸发器;第一物理量检测器，能够检测表示待冷却物体的温度的物理量通过所述蒸发器的冷却运转，能够根据由所述第一物理量检测器检测到的物理量来控制所述电动机的转速使得所述物体被冷却到目标温度的温度控制装置;第二物理量检测器能够检测与制冷循环的性能余量相对应的物理量;以及旋转速度限制器，其能够基于由第二物理量检测器检测到的物理量将电动机的转速限制在或低于预定速度。

65. 发明授权

US06697976B1 Performance evaluation method, performance evaluation system, and information storage apparatus using same 失效
标题翻译：绩效考核方法，绩效评价体系以及使用该评价体系的信息存储装置
公开(公告)号：US06697976B1
公开(公告)日：2004-02-24
申请号：US09597272
申请日：2000-06-19
申请人： Naoki Satoh , Yasuyuki Ito , Akihiko Hirano , Terumi Takashi , Mikio Suzuki
发明人： Naoki Satoh , Yasuyuki Ito , Akihiko Hirano , Terumi Takashi , Mikio Suzuki
IPC分类号： G06F1100
CPC分类号： G11B20/18 , G06F11/076
摘要： Data byte errors are detected by a comparator and classified into errors for respective interleaves, and the classified errors are counted by counters in an error count block. Further, at the time one sector has been read, comparators compare the counted values for the respective interleaves with an interleave threshold to detect whether nor not there are interleaves which have a number of errors exceeding the interleave threshold, and the detected results are counted by an error count block. The frequency of retries after an ECC is predicted from the counted value on the error count block and the total number of read sectors.
摘要翻译：数据字节错误由比较器检测并分类为相应交错的错误，分类错误由错误计数块中的计数器计数。此外，在读取一个扇区时，比较器将交织的计数值与交织阈值进行比较，以检测是否存在具有超过交织阈值的错误数量的交织，并且将检测结果计数为一个错误计数块。根据误差计数块上的计数值和读取扇区总数来预测ECC之后的重试次数。

66. 发明授权

US6104331A Reproduced signal processing method, reproduced signal processing circuit, and a magnetic storage apparatus 有权
标题翻译：再现信号处理方法，再现信号处理电路和磁存储装置
公开(公告)号：US6104331A
公开(公告)日：2000-08-15
申请号：US161734
申请日：1998-09-29
申请人： Yoshiteru Ishida , Naoki Satoh , Terumi Takashi , Akihiko Hirano , Seiichi Mita
发明人： Yoshiteru Ishida , Naoki Satoh , Terumi Takashi , Akihiko Hirano , Seiichi Mita
IPC分类号： G11B5/09 , G11B5/012 , G11B19/04 , G11B20/10 , G11B20/24 , G11B23/00 , H03M1/12 , G11B5/02
CPC分类号： G11B19/04 , G11B20/10009 , G11B20/24 , G11B5/012 , G11B23/0007 , G11B5/09
摘要： A reproduced signal processing circuit includes a variable gain amplifier to which a signal read from a medium by a reproducing head is inputted; an analog-to-digital converter for converting a signal outputted from the variable gain amplifier into a digital signal; and a variable frequency oscillator for supplying an operation clock signal to the analog-to-digital converter. A reproduced signal processing method includes the steps of operating a first control loop for controlling the variable gain amplifier; operating at least either one of a second control loop and a third control loop, the second control loop controlling the variable frequency oscillator, the third control loop controlling the variable frequency oscillator; filtering by analog filter means the read signal inputted to the variable gain amplifier; operating at least one of first, second, and third noise detecting operations, the first noise detecting operation detecting presence or absence of a noise by comparing an amplitude of the output signal from the variable gain amplifier with a predetermined threshold value, the second noise detecting operation detecting a noise during an operation period of the second control loop, the third noise detecting operation detecting a noise during an operation period of the third control loop; and changing the range of cutoff frequency of the analog filter means in accordance with a result from at least one of the first, second, and third noise detecting operations, thereby controlling at least one of the first, second, and third control loops.
摘要翻译：再现信号处理电路包括可变增益放大器，从再现头从介质读取的信号被输入到该可变增益放大器; 用于将从可变增益放大器输出的信号转换为数字信号的模拟 - 数字转换器; 以及用于向模数转换器提供操作时钟信号的可变频率振荡器。再现信号处理方法包括以下步骤：操作用于控制可变增益放大器的第一控制环路; 操作第二控制回路和第三控制回路中的至少一个，控制可变频率振荡器的第二控制回路，控制可变频率振荡器的第三控制回路; 通过模拟滤波器滤波意味着输入到可变增益放大器的读取信号; 操作第一，第二和第三噪声检测操作中的至少一个，所述第一噪声检测操作通过将来自可变增益放大器的输出信号的幅度与预定阈值进行比较来检测噪声的存在或不存在，第二噪声检测操作在第二控制回路的操作期间检测噪声，第三噪声检测操作在第三控制回路的操作期间检测噪声; 以及根据第一，第二和第三噪声检测操作中的至少一个的结果改变模拟滤波器装置的截止频率的范围，从而控制第一，第二和第三控制回路中的至少一个。

67. 发明授权

US5818655A Signal processing circuit and information recording/reproducing apparatus using the same, and method for optimizing coefficients of equalizer circuit 失效
公开(公告)号：US5818655A
公开(公告)日：1998-10-06
申请号：US506635
申请日：1995-07-25
申请人： Naoki Satoh , Seiichi Mita , Shoichi Miyazawa , Terumi Takashi , Yosuke Hori , Yoshiju Watanabe , Akihiko Hirano , Satoshi Minoshima , Hideki Miyasaka , Toshihiro Nitta , Tomoaki Hirai , Ryushi Shimokawa , Koji Shida , Yasuhide Ouchi
发明人： Naoki Satoh , Seiichi Mita , Shoichi Miyazawa , Terumi Takashi , Yosuke Hori , Yoshiju Watanabe , Akihiko Hirano , Satoshi Minoshima , Hideki Miyasaka , Toshihiro Nitta , Tomoaki Hirai , Ryushi Shimokawa , Koji Shida , Yasuhide Ouchi
IPC分类号： G11B5/035 , G11B5/09 , G11B20/10
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10481 , G11B5/035 , G11B5/09
摘要： A signal processing circuit for a magnetic recording/reproducing apparatus, including at least an AGC, a PLL, a LPF, an equalizer circuit and a detection circuit, wherein a coefficient compensation circuit is formed by defining a constitution of the equalizer circuit, an error detection circuit is provided which operates by receiving input from the detection circuit, and the LSI is formed by a plurality of analog and digital chips, and the analog and digital chips are connected by current-output type D/A converters connected to at least the AGC and the PLL.

68. 发明授权

US5553104A Information recording/reproducing apparatus having a clock timing extraction circuit for extracting a clock signal from an input data signal 失效
标题翻译：具有用于从输入数据信号中提取时钟信号的时钟定时提取电路的信息记录/再现装置
公开(公告)号：US5553104A
公开(公告)日：1996-09-03
申请号：US266779
申请日：1994-06-29
申请人： Terumi Takashi , Akihiko Hirano , Kazunori Iwabuchi , Hideyuki Yamakawa , Yoshiteru Ishida , Kazuhisa Shiraishi , Kazutoshi Ashikawa
发明人： Terumi Takashi , Akihiko Hirano , Kazunori Iwabuchi , Hideyuki Yamakawa , Yoshiteru Ishida , Kazuhisa Shiraishi , Kazutoshi Ashikawa
IPC分类号： G11B20/14 , G11B27/30 , H03L7/06 , H03L7/081 , H03L7/099 , H03L7/183 , H04L7/033 , H03D3/24
CPC分类号： H03L7/0996 , G11B20/1403 , G11B27/30 , H03L7/081 , H03L7/183 , H04L7/0337
摘要： A clock timing extraction circuit for use in an information recording/reproducing apparatus has a phase comparator for comparing the reproduced signal with a selected clock signal to generate a phase error signal, a clock signal generation circuit for adjusting frequency to cause the error signal to approach zero according to the phase error signal and outputting a plurality of clock signals having mutually different phase differences, a selection circuit for outputting one of the plurality of clock signals on the basis of a selection signal, a phase difference judgement circuit for determining one of the plurality of clock signals having a minimum phase error (Vdet) and generating a selection signal for selection of the clock signal having the minimum phase difference, and a freeze circuit for blocking an output of the phase comparator until the clock signal having the minimum phase error is selected. The information recording/reproducing apparatus has an AGC circuit for limiting an amplitude of a reproduced signal received from a recording medium, the aforementioned clock timing extraction circuit, and a decoder circuit. The clock timing extraction circuit extracts a clock signal from an output signal of the AGC circuit and the decoder decodes the output signal of the AGC circuit on the basis of the extracted clock signal.
摘要翻译：用于信息记录/再现装置的时钟定时提取电路具有一个相位比较器，用于将再生信号与所选择的时钟信号进行比较以产生相位误差信号;时钟信号产生电路，用于调整频率以使误差信号接近根据相位误差信号输出零，并输出具有相互不同的相位差的多个时钟信号，用于基于选择信号输出多个时钟信号中的一个的选择电路，用于确定其中之一的相位差判定电路具有最小相位误差（Vdet）的多个时钟信号，并且产生用于选择具有最小相位差的时钟信号的选择信号，以及用于阻止相位比较器的输出的冻结电路，直到具有最小相位误差的时钟信号被选中。信息记录/重放装置具有用于限制从记录介质接收的再现信号的幅度的AGC电路，上述时钟定时提取电路和解码器电路。时钟定时提取电路从AGC电路的输出信号中提取时钟信号，解码器根据所提取的时钟信号对AGC电路的输出信号进行解码。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式