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51. 发明授权

US4465529A Method of producing semiconductor device 失效
标题翻译：半导体器件的制造方法
公开(公告)号：US4465529A
公开(公告)日：1984-08-14
申请号：US385137
申请日：1982-06-04
申请人： Hideaki Arima , Tadashi Nishimura , Masahiro Yoneda , Takaaki Fukumoto , Yoshihiro Hirata
发明人： Hideaki Arima , Tadashi Nishimura , Masahiro Yoneda , Takaaki Fukumoto , Yoshihiro Hirata
IPC分类号： C30B31/18 , H01L21/223 , H01L21/225 , H01L21/263 , H01L21/268
CPC分类号： H01L21/2254 , C30B31/185 , H01L21/223 , H01L21/2636 , H01L21/268
摘要： A method for producing an impurity containing semiconductor substrate includes depositing an impurity on selected portions of the substrate by placing a charge on the substrate and converting a gaseous impurity containing atmosphere into a plasma. The impurity may then be diffused into the substrate to a controlled and shallow depth by employing a laser or the like to selectively irradiate the impurity.
摘要翻译：一种用于制造含杂质的半导体衬底的方法包括通过在衬底上放置电荷并将含气态杂质的气氛转化成等离子体来在衬底的选定部分上沉积杂质。然后可以通过使用激光等来选择性地照射杂质，将杂质扩散到衬底中至受控和浅的深度。

52. 发明授权

US08118347B2 Structure of mounting impact absorption material for use with vehicle 有权
标题翻译：用于车辆的安装冲击吸收材料的结构
公开(公告)号：US08118347B2
公开(公告)日：2012-02-21
申请号：US12791932
申请日：2010-06-02
申请人： Akihiro Kawashima , Masami Uratsu , Michinori Kawasumi , Eiji Fujii , Tomonari Masuda , Tadashi Nishimura , Mariko Wada , Mamoru Yamaguchi , Kenichi Uemori
发明人： Akihiro Kawashima , Masami Uratsu , Michinori Kawasumi , Eiji Fujii , Tomonari Masuda , Tadashi Nishimura , Mariko Wada , Mamoru Yamaguchi , Kenichi Uemori
IPC分类号： B60J7/00
CPC分类号： B60R21/04 , B60R21/0428 , B60R2021/0421
摘要： An aspect in accordance with the present invention is a structure of mounting an impact absorption material for use with a vehicle. The structure includes: a door trim 30, a holder, and an EA pad. The holder includes a base and a plurality of legs, the base of the holder being disposed on the compartment outer side surface of the EA pad. The plurality of legs are disposed at intervals around an outer peripheral edge of the base of the holder and extend from the base of the holder, along an outer peripheral side surface of the EA pad, and to the door trim, thereby fixing the base of the holder to the door trim.
摘要翻译：根据本发明的一个方面是安装用于车辆的冲击吸收材料的结构。该结构包括：门装饰件30，保持器和EA垫。保持器包括基部和多个腿，保持器的基部设置在EA垫的隔室外侧表面上。多个支腿围绕保持器的基部的外周边缘间隔设置，并且沿着EA垫的外周侧表面从保持器的基部延伸到门装饰件，从而将持有人到门饰。

53. 发明授权

US06459125B2 SOI based transistor inside an insulation layer with conductive bump on the insulation layer 失效
标题翻译：绝缘层内的SOI基晶体管，绝缘层上有导电凸块
公开(公告)号：US06459125B2
公开(公告)日：2002-10-01
申请号：US09122863
申请日：1998-07-27
申请人： Shigenobu Maeda , Tadashi Nishimura , Kazuhito Tsutsumi , Shigeto Maegawa , Yuuichi Hirano
发明人： Shigenobu Maeda , Tadashi Nishimura , Kazuhito Tsutsumi , Shigeto Maegawa , Yuuichi Hirano
IPC分类号： H01L2900
CPC分类号： H01L23/556 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/12 , H01L29/786 , H01L2224/03914 , H01L2224/0401 , H01L2224/05624 , H01L2224/11334 , H01L2224/1148 , H01L2224/1191 , H01L2224/13022 , H01L2224/131 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/0102 , H01L2924/01022 , H01L2924/01028 , H01L2924/01033 , H01L2924/0105 , H01L2924/01068 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/05042 , H01L2924/13091 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/3025 , H01L2224/13099 , H01L2924/00
摘要： A semiconductor device for CSP mounting which avoids errors due to alpha rays and is highly stress-resistant is provided. A buried oxide film (107) is formed on a semiconductor substrate (101), and a MOS transistor having an SOI structure is formed on the buried oxide film (107). The MOS transistor comprises source and drain regions (120a, 120b) formed in a semiconductor layer (120), and a gate electrode (110). An aluminum pad (103) connected to any one of the source and drain regions (120a, 120b) through a connecting mechanism not shown, and a silicon nitride film (104) having an opening on the top of the aluminum pad (103) are formed on an interlayer insulation film (108). A layer of titanium (105) and a layer of nickel (106) are formed extending from the aluminum pad (103) to an end of the silicon nitride film (104). A solder bump (11) is disposed on the layer of nickel (106).
摘要翻译：提供用于CSP安装的半导体器件，其避免由于α射线引起的误差并且具有高抗应力。在半导体衬底（101）上形成掩埋氧化膜（107），在掩埋氧化膜（107）上形成具有SOI结构的MOS晶体管。 MOS晶体管包括形成在半导体层（120）中的源区和漏区（120a，120b）和栅电极（110）。通过未示出的连接机构连接到源极和漏极区域（120a，120b）中的任何一个的铝焊盘（103）和在铝焊盘（103）的顶部具有开口的氮化硅膜（104）形成在层间绝缘膜（108）上。形成从铝焊盘（103）向氮化硅膜（104）的一端延伸的钛（105）层和镍层（106）。焊料凸块（11）设置在镍层（106）上。

54. 发明授权

US6069379A Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US6069379A
公开(公告)日：2000-05-30
申请号：US968897
申请日：1997-11-06
申请人： Hiroshi Kimura , Tadashi Nishimura , Takahiro Tsuruda , Kazutami Arimoto , Tadato Yamagata , Kazuyasu Fujishima
发明人： Hiroshi Kimura , Tadashi Nishimura , Takahiro Tsuruda , Kazutami Arimoto , Tadato Yamagata , Kazuyasu Fujishima
IPC分类号： H01L21/335 , H01L21/8239 , H01L21/8242 , H01L27/10 , H01L27/105 , H01L27/108 , H01L29/78 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L27/10852
摘要： In a semiconductor device and a method of manufacturing the same, an isolating and insulating film is provided at an end neighboring to a second impurity region with a groove extended to a semiconductor substrate. This removes a crystal defect existed at the end of the isolating and insulating film, and thus prevents leak of a current at this portion from a storage node. Consequently, provision of the groove at the edge portion of the isolating oxide film neighboring to the impurity region removes a crystal defect at this region, and thus eliminates a possibility of leak of a current.
摘要翻译：在半导体器件及其制造方法中，隔离绝缘膜设置在与第二杂质区相邻的端部处，并且沟槽延伸到半导体衬底。这消除了隔离和绝缘膜末端存在的晶体缺陷，从而防止在该部分处的电流从存储节点泄漏。因此，在与杂质区相邻的隔离氧化膜的边缘部分处设置沟槽消除了该区域的晶体缺陷，从而消除了电流泄漏的可能性。

55. 发明授权

US4661167A Method for manufacturing a monocrystalline semiconductor device 失效
标题翻译：单晶半导体器件的制造方法
公开(公告)号：US4661167A
公开(公告)日：1987-04-28
申请号：US677343
申请日：1984-12-03
申请人： Shigeru Kusunoki , Tadashi Nishimura , Kazuyuki Sugahara
发明人： Shigeru Kusunoki , Tadashi Nishimura , Kazuyuki Sugahara
IPC分类号： H01L27/00 , H01L21/20 , H01L21/268 , H01L21/762 , H01L29/78 , H01L29/786 , H01L21/263
CPC分类号： H01L21/76264 , H01L21/2026 , H01L29/78654 , H01L21/76272 , H01L21/76281 , Y10S117/904 , Y10S148/164
摘要： A method for manufacturing a semiconductor device, which comprises: a first process for producing a semiconductor layer of polycrystalline silicon or amorphous silicon on the surface of a substrate of insulator or a substrate made up by forming an insulating layer on a basic semiconductor; a second process for producing an island of semiconductor layer surrounded by dielectric materials from the semiconductor layer; a third process for producing a film of Si.sub.3 N.sub.4 on the island of semiconductor layer, or on a film of SiO.sub.2 formed on the island; a fourth process for removing the film of Si.sub.3 N.sub.4 at a predetermined region on the island; and a fifth process for irradiating with scanning an energy beam to the island of semiconductor layer so as to melt and recrystallize the island, thereby monocrystallizing or increasing the size of crystal grains at at least a partial region thereof.
摘要翻译：一种半导体器件的制造方法，其特征在于，包括：通过在基础半导体上形成绝缘层而构成的绝缘体或基板的基板的表面上制造多晶硅或非晶硅的半导体层的第一工序; 用于制造由半导体层被电介质材料包围的半导体层的岛的第二工艺; 在半导体层的岛上或在岛上形成的SiO 2膜上制造Si 3 N 4的膜的第3工序; 在岛上的预定区域除去Si 3 N 4膜的第四工序; 以及将能量束扫描到半导体层的岛上以便使岛熔融并重结晶的第五种方法，从而在其至少部分区域上单晶化或增加晶粒的尺寸。

56. 发明授权

US4392506A Apparatus for conveying tubular materials in pickling facilities of the same 失效
标题翻译：用于在其酸洗设备中输送管状材料的设备
公开(公告)号：US4392506A
公开(公告)日：1983-07-12
申请号：US307670
申请日：1981-10-01
申请人： Yoshiro Tanaka , Hayato Moroi , Yukihiko Komatsu , Kazuo Akagi , Ryujiro Shitamatsu , Tadashi Nishimura
发明人： Yoshiro Tanaka , Hayato Moroi , Yukihiko Komatsu , Kazuo Akagi , Ryujiro Shitamatsu , Tadashi Nishimura
IPC分类号： B65G49/04 , B08B3/04 , B66C11/08 , B66C17/06 , C23G3/04
CPC分类号： C23G3/04
摘要： An apparatus for conveying tubular members along a plurality of treatment liquid tanks in pickling facilities. The apparatus includes a pair of guide rails and a travelling car adapted to reciprocate on the guide rails. The travelling car includes at least one pair of tube-supporting hooks which can be reciprocated upwardly and downwardly and turned between positions parallel to the rails and other positions perpendicular to the rails. The tube-supporting hooks can be lowered or raised independently so as to support the tubular members aslant near the treatment liquid level in each of the treatment liquid tanks, thereby allowing immersion of the tubular members into the treatment liquid or retraction of the tubular members out of the treatment liquid without forming considerable air bubbles in the liquid. Since such bubbles are known to develop stains on the tubular members, tubular members of high surface quality can be obtained. The above apparatus also permits a smooth, simple and efficient conveyance and loading and unloading of tubular members between the treatment liquid tanks.
摘要翻译：一种用于在酸洗设备中沿着多个处理液体罐输送管状构件的装置。该装置包括一对导轨和适于在导轨上往复运动的行进车。行进车包括至少一对管支撑钩，其可以向上和向下往复运动，并且在平行于轨道的位置和垂直于轨道的其它位置之间转动。管支撑钩可以独立地降低或升高，以支撑在每个处理液体槽中靠近处理液面倾斜的管状构件，从而允许将管状构件浸入处理液体中或将管状构件收回的处理液体，而不会在液体中形成相当大的气泡。由于已知这种气泡在管状部件上产生污渍，因此可获得高表面质量的管状部件。上述设备还允许在处理液体罐之间顺利，简单且有效地传送和装载和卸载管状构件。

57. 发明授权

US4392267A Apparatus for continuously pickling the outer surfaces of tubular materials 失效
标题翻译：用于连续酸洗管状材料外表面的装置
公开(公告)号：US4392267A
公开(公告)日：1983-07-12
申请号：US307676
申请日：1981-10-01
申请人： Yoshiro Tanaka , Hayato Moroi , Yukihiko Komatsu , Kazuo Akagi , Ryujiro Shitamatsu , Tadashi Nishimura
发明人： Yoshiro Tanaka , Hayato Moroi , Yukihiko Komatsu , Kazuo Akagi , Ryujiro Shitamatsu , Tadashi Nishimura
IPC分类号： B65G13/00 , C23G3/04 , B08B9/02
CPC分类号： C23G3/04
摘要： An apparatus for continuously pickling the outer surfaces of hermetically plugged tubular members is described. The apparatus includes a plurality of liquid tanks which separately contain different pickling liquids and define through-holes in their respective front and rear walls on at least one common longitudinal line to permit the successive passage of the tubular members therethrough while rotating them around their respective longitudinal axes. The apparatus includes a cleaning tank and cleaning brush unit provided sequentially before the liquid tanks. The cleaning tank includes at least one ultrasonic cleaning oscillator and defines through-holes in the front and rear walls thereof for allowing said tubular members to pass through the cleaning tank and the brush unit. Since any oil, grease or dust can be completely removed by the cleaning tank and brush unit prior to pickling, it is possible to obtain tubular members having excellent outer surface quality.
摘要翻译：描述了用于连续酸洗密封管状构件的外表面的装置。该装置包括多个液体罐，其分开地容纳不同的酸洗液体，并且在至少一个共同的纵向线上的相应的前壁和后壁中形成通孔，以允许管状构件连续通过，同时使它们围绕它们各自的纵向旋转轴。该装置包括在液罐之前依次提供的清洗槽和清洁刷单元。清洗槽包括至少一个超声波清洗振荡器，并在其前壁和后壁上形成通孔，以允许所述管状构件通过清洁槽和刷子单元。由于在酸洗之前可以通过清洗槽和刷子单元完全除去任何油，油脂或灰尘，所以可以获得具有优异的外表面质量的管状构件。

58. 发明授权

US06214664B1 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US06214664B1
公开(公告)日：2001-04-10
申请号：US09443016
申请日：1999-11-18
申请人： Hiroshi Kimura , Tadashi Nishimura , Takahiro Tsuruda , Kazutami Arimoto , Tadato Yamagata , Kazuyasu Fujishima
发明人： Hiroshi Kimura , Tadashi Nishimura , Takahiro Tsuruda , Kazutami Arimoto , Tadato Yamagata , Kazuyasu Fujishima
IPC分类号： H01L218242
CPC分类号： H01L27/10852
摘要： In a semiconductor device and a method of manufacturing the same, an isolating and insulating film is provided at an end neighboring to a second impurity region with a groove extended to a semiconductor substrate. This removes a crystal defect existed at the end of the isolating and insulating film, and thus prevents leak of a current at this portion from a storage node. Consequently, provision of the groove at the edge portion of the isolating oxide film neighboring to the impurity region removes a crystal defect at this region, and thus eliminates a possibility of leak of a current.
摘要翻译：在半导体器件及其制造方法中，隔离绝缘膜设置在与第二杂质区相邻的端部处，并且沟槽延伸到半导体衬底。这消除了隔离和绝缘膜末端存在的晶体缺陷，从而防止在该部分处的电流从存储节点泄漏。因此，在与杂质区相邻的隔离氧化膜的边缘部分处设置沟槽消除了该区域的晶体缺陷，从而消除了电流泄漏的可能性。

59. 发明授权

US5721444A Thin-film transistor having a buried impurity region and method of fabricating the same 失效
标题翻译：具有埋入杂质区的薄膜晶体管及其制造方法
公开(公告)号：US5721444A
公开(公告)日：1998-02-24
申请号：US824550
申请日：1997-03-25
申请人： Toshiyuki Oashi , Jiro Matsufusa , Takahisa Eimori , Tadashi Nishimura
发明人： Toshiyuki Oashi , Jiro Matsufusa , Takahisa Eimori , Tadashi Nishimura
IPC分类号： H01L21/316 , H01L21/02 , H01L21/205 , H01L21/265 , H01L21/76 , H01L21/84 , H01L27/12 , H01L29/786 , H01L27/01
CPC分类号： H01L27/1203 , H01L21/84 , H01L29/78606 , H01L29/78609
摘要： A buried insulating layer is provided in a semiconductor substrate, in a position separated from its major surface. A LOCOS isolation film is provided in the major surface of the semiconductor substrate for isolating an active region from other active regions. A thin-film transistor is provided in the active region. The thin-film transistor comprises a gate electrode which is provided on the active region with interposition of a gate insulating layer. A pair of source/drain layers are provided in the major surface of the semiconductor substrate on both sides of the gate electrode. A high-concentration impurity layer is provided in the semiconductor substrate immediately under the buried insulating layer.
摘要翻译：掩埋绝缘层设置在半导体衬底中的与其主表面分离的位置。在半导体衬底的主表面上提供了一个LOCOS隔离膜，用于将活性区域与其它活性区域隔离。在有源区域中设置薄膜晶体管。薄膜晶体管包括设置在有源区上的栅极，插入栅极绝缘层。在栅电极的两侧的半导体衬底的主表面上设置一对源极/漏极层。在掩埋绝缘层正下方的半导体衬底中设置高浓度杂质层。

60. 发明授权

US5471086A Semiconductor device having piezo resistance 失效
标题翻译：具有压电电阻的半导体器件
公开(公告)号：US5471086A
公开(公告)日：1995-11-28
申请号：US332623
申请日：1992-10-31
申请人： Takashi Ipposhi , Tadashi Nishimura
发明人： Takashi Ipposhi , Tadashi Nishimura
IPC分类号： H01L21/20 , G01L9/00 , H01L21/822 , H01L27/04 , H01L29/84 , H01L41/04 , H01L41/08
CPC分类号： G01L9/0055 , H01L29/84
摘要： Disclosed herein a semiconductor pressure sensor, which is capable of carrying out temperature compensation in high accuracy, having a piezo resistance layer consisting of a single crystal layer formed by lateral seeding. In this semiconductor pressure sensor, a piezo resistance is so formed as to contain no crystal sub-grain boundary. Thus prevented is inconvenience of reduction in resistance temperature coefficient, which is caused when the piezo resistance contains the crystal sub-grain boundary. Thus, the piezo resistance can be set at a high resistance temperature coefficient, whereby a semiconductor pressure sensor capable of carrying out temperature compensation in high accuracy is obtained.
摘要翻译：这里公开了能够以高精度进行温度补偿的半导体压力传感器，其具有由横向接种形成的单晶层构成的压电电阻层。在该半导体压力传感器中，压电电阻形成为不含晶粒子晶界。因此防止了当压电电阻含有晶体亚晶界时引起的电阻温度系数降低的不便。因此，可以将压电电阻设定在高电阻温度系数，从而获得能够以高精度进行温度补偿的半导体压力传感器。

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