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51. 发明申请

US20130207194A1 TRANSISTORS WITH UNIAXIAL STRESS CHANNELS 失效
标题翻译：具有单向应力通道的晶体管
公开(公告)号：US20130207194A1
公开(公告)日：2013-08-15
申请号：US13396872
申请日：2012-02-15
申请人： Ming Cai , Dechao Guo , Liyang Song , Chun-Chen Yeh
发明人： Ming Cai , Dechao Guo , Liyang Song , Chun-Chen Yeh
IPC分类号： H01L21/336 , H01L27/088
CPC分类号： H01L29/7846 , H01L21/76224 , H01L21/823412 , H01L21/823418 , H01L21/823481 , H01L21/845 , H01L29/1054 , H01L29/165 , H01L29/66575 , H01L29/66636 , H01L29/66651 , H01L29/7848 , H01L29/785 , H01L29/78684
摘要： A method for fabricating a transistor with uniaxial stress channels includes depositing an insulating layer onto a substrate, defining bars within the insulating layer, recessing a channel into the substrate, growing a first semiconducting material in the channel, defining a gate stack over the bars and semiconducting material, defining source and drain recesses and embedding a second semiconducting material into the source and drain recesses.
摘要翻译：用于制造具有单轴应力通道的晶体管的方法包括：将绝缘层沉积到衬底上，在绝缘层内限定棒，将沟道凹入衬底中，在沟道中生长第一半导体材料，在栅柱上限定栅叠层，半导体材料，限定源极和漏极凹部并且将第二半导体材料嵌入到源极和漏极凹部中。

52. 发明授权

US08455862B2 Self-aligned contacts in carbon devices 有权
标题翻译：碳装置中的自对准触点
公开(公告)号：US08455862B2
公开(公告)日：2013-06-04
申请号：US13562827
申请日：2012-07-31
申请人： Josephine B. Chang , Dechao Guo , Shu-Jen Han , Chung-Hsun Lin
发明人： Josephine B. Chang , Dechao Guo , Shu-Jen Han , Chung-Hsun Lin
IPC分类号： H01L29/775
CPC分类号： H01L29/1606 , B82Y10/00 , H01L29/165 , H01L29/41733 , H01L29/41766 , H01L29/41775 , H01L29/66431 , H01L29/66742 , H01L29/7781 , H01L29/78 , H01L29/78684 , H01L51/0048
摘要： A semiconductor device includes a carbon layer disposed on a substrate, a gate stack disposed on a portion of the carbon layer, a first cavity defined by the carbon layer and the substrate, a second cavity defined by the carbon layer and the substrate, a source region including a first conductive contact disposed in the first cavity, a drain region including a second conductive contact disposed in the second cavity.
摘要翻译：半导体器件包括设置在基底上的碳层，设置在碳层的一部分上的栅极叠层，由碳层和衬底限定的第一腔，由碳层和衬底限定的第二腔，源区域，包括设置在第一腔中的第一导电触点，漏区，包括设置在第二腔中的第二导电触点。

53. 发明申请

US20130105896A1 Threshold Voltage Adjustment For Thin Body Mosfets 审中-公开
标题翻译：薄体硅片的阈值电压调整
公开(公告)号：US20130105896A1
公开(公告)日：2013-05-02
申请号：US13625350
申请日：2012-09-24
申请人： MaryJane Brodsky , Ming Cai , Dechao Guo , William K. Henson , Shreesh Narasimha , Yue Liang , Liyang Song , Yanfeng Wang , Chun-Chen Yeh
发明人： MaryJane Brodsky , Ming Cai , Dechao Guo , William K. Henson , Shreesh Narasimha , Yue Liang , Liyang Song , Yanfeng Wang , Chun-Chen Yeh
IPC分类号： H01L27/12
CPC分类号： H01L29/66803
摘要： A structure includes a substrate; a transistor disposed over the substrate, the transistor comprising a fin comprised of Silicon that is implanted with Carbon; and a gate dielectric layer and gate metal layer overlying a portion of the fin that defines a channel of the transistor. In the structure a concentration of Carbon within the fin is selected to establish a desired voltage threshold of the transistor.
摘要翻译：一种结构包括基板; 设置在所述衬底上的晶体管，所述晶体管包括由碳注入的由硅构成的鳍; 以及覆盖限定晶体管的沟道的鳍片的一部分上的栅极电介质层和栅极金属层。在该结构中，选择鳍内的碳浓度以建立晶体管的期望电压阈值。

54. 发明授权

US08420474B1 Controlling threshold voltage in carbon based field effect transistors 失效
公开(公告)号：US08420474B1
公开(公告)日：2013-04-16
申请号：US13348355
申请日：2012-01-11
申请人： Martin M. Frank , Dechao Guo , Shu-Jen Hen , Kuen-Ting Shiu
发明人： Martin M. Frank , Dechao Guo , Shu-Jen Hen , Kuen-Ting Shiu
IPC分类号： H01L21/8238
CPC分类号： H01L51/0048 , B82Y10/00 , H01L21/823807 , H01L21/823828 , H01L27/1203 , H01L29/413 , H01L51/0558
摘要： A field effect transistor fabrication method includes defining a gate structure on a substrate, depositing a dielectric layer on the gate structure, depositing a first metal layer on the dielectric layer, removing a portion of the first metal layer, depositing a second metal layer, annealing the first and second metal layers, and defining a carbon based device on the dielectric layer and the gate structure.

55. 发明申请

US20120329193A1 GRAPHENE SENSOR 审中-公开
标题翻译：石墨传感器
公开(公告)号：US20120329193A1
公开(公告)日：2012-12-27
申请号：US13605107
申请日：2012-09-06
申请人： Dechao Guo , Shu-Jen Han , Chung-Hsun Lin , Ning Su
发明人： Dechao Guo , Shu-Jen Han , Chung-Hsun Lin , Ning Su
IPC分类号： H01L21/336
CPC分类号： G01N27/4145 , G01N27/4146 , H01L29/1606 , H01L29/42384 , H01L29/4908 , H01L29/66742 , H01L29/78684 , H01L51/0048
摘要： A method for forming a sensor includes forming a channel in substrate, forming a sacrificial layer in the channel, forming a sensor having a first dielectric layer disposed on the substrate, a graphene layer disposed on the first dielectric layer, and a second dielectric layer disposed on the graphene layer, a source region, a drain region, and a gate region, wherein the gate region is disposed on the sacrificial layer removing the sacrificial layer from the channel.
摘要翻译：一种用于形成传感器的方法，包括在衬底中形成通道，在通道中形成牺牲层，形成具有设置在衬底上的第一介电层的传感器，设置在第一电介质层上的石墨烯层，以及设置在第二电介质层在石墨烯层上，源区域，漏极区域和栅极区域，其中栅极区域设置在牺牲层上，从沟道去除牺牲层。

56. 发明申请

US20120299125A1 SELF-ALIGNED CONTACTS 审中-公开
标题翻译：自对准联系人
公开(公告)号：US20120299125A1
公开(公告)日：2012-11-29
申请号：US13568832
申请日：2012-08-07
申请人： Dechao Guo , Wilfried E.A. Haensch , Shu-Jen Han , Chung-Hsun Lin
发明人： Dechao Guo , Wilfried E.A. Haensch , Shu-Jen Han , Chung-Hsun Lin
IPC分类号： H01L29/78
CPC分类号： H01L21/28008 , H01L21/28052 , H01L21/28097 , H01L21/76897 , H01L29/517 , H01L29/66507 , H01L29/66545
摘要： A method of forming a gate structure with a self-aligned contact is provided and includes sequentially depositing a sacrificial layer and a secondary layer onto poly-Si disposed at a location of the gate structure, encapsulating the sacrificial layer, the secondary layer and the poly-Si, removing the sacrificial layer through openings formed in the secondary layer and forming silicide within at least the space formally occupied by the sacrificial layer.
摘要翻译：提供了一种形成具有自对准接触的栅极结构的方法，并且包括将牺牲层和次级层顺序地沉积到设置在栅极结构的位置处的多晶硅上，封装牺牲层，第二层和聚 -Si，通过形成在次级层中的开口去除牺牲层，并在至少由牺牲层正式占据的空间内形成硅化物。

57. 发明申请

US20120280322A1 Self-Aligned Contacts for Field Effect Transistor Devices 有权
标题翻译：场效应晶体管器件的自对准触点
公开(公告)号：US20120280322A1
公开(公告)日：2012-11-08
申请号：US13554305
申请日：2012-07-20
申请人： Dechao Guo , Wilfried E. Haensch , Xinhui Wang , Keith Kwong Hon Wong
发明人： Dechao Guo , Wilfried E. Haensch , Xinhui Wang , Keith Kwong Hon Wong
IPC分类号： H01L29/78
CPC分类号： H01L29/665 , H01L21/28088 , H01L21/28114 , H01L21/28525 , H01L21/76897 , H01L21/78 , H01L29/66545
摘要： A field effect transistor device includes a gate stack disposed on a substrate a first contact portion disposed on a first distal end of the gate stack, a second contact portion disposed on a second distal end of the gate stack, the first contact portion disposed a distance (d) from the second contact portion, and a third contact portion having a width (w) disposed in a source region of the device, the distance (d) is greater than the width (w).
摘要翻译：场效应晶体管器件包括设置在基板上的栅极堆叠，设置在栅极堆叠的第一远端上的第一接触部分，设置在栅极堆叠的第二远端上的第二接触部分，第一接触部分设置距离（d）从所述第二接触部分和具有设置在所述器件的源极区域中的宽度（w）的第三接触部分，所述距离（d）大于所述宽度（w）。

58. 发明授权

US08288217B2 Stressor in planar field effect transistor device 失效
标题翻译：应力平面场效应晶体管器件
公开(公告)号：US08288217B2
公开(公告)日：2012-10-16
申请号：US12945026
申请日：2010-11-12
申请人： Dechao Guo , Pranita Kulkarni , Philip J. Oldiges , Alexander Reznicek , Keith Kwong Hon Wong
发明人： Dechao Guo , Pranita Kulkarni , Philip J. Oldiges , Alexander Reznicek , Keith Kwong Hon Wong
IPC分类号： H01L21/338
CPC分类号： H01L29/66545 , H01L29/1054 , H01L29/66477 , H01L29/66651 , H01L29/7843 , H01L29/7848
摘要： A field effect transistor device includes a gate stack portion disposed on a substrate, and a channel region in the substrate having a depth partially defined by the gate stack portion and a silicon region of the substrate, the silicon region having a sloped profile such that a distal regions of the channel region have greater depth than a medial region of the channel region.
摘要翻译：场效应晶体管器件包括设置在衬底上的栅极堆叠部分和衬底中的沟道区域，其具有由栅极堆叠部分和衬底的硅区域部分地限定的深度，所述硅区域具有倾斜轮廓，使得沟道区域的远侧区域具有比沟道区域的中间区域更深的深度。

59. 发明授权

US08268689B2 Multiple threshold voltages in field effect transistor devices 失效
标题翻译：场效应晶体管器件中的多个阈值电压
公开(公告)号：US08268689B2
公开(公告)日：2012-09-18
申请号：US12860979
申请日：2010-08-23
申请人： Dechao Guo , Keith Kwong Hon Wong
发明人： Dechao Guo , Keith Kwong Hon Wong
IPC分类号： H01L27/088
CPC分类号： H01L29/78696 , H01L21/845 , H01L27/1211 , H01L29/42392 , H01L29/66795
摘要： A method for fabricating a field effect transistor device includes forming a first conducting channel and a second conducting channel, forming a first gate stack on the first conducting channel to partially define a first device, forming second gate stack on the second conducting channel to partially define a second device, implanting ions to form a source region and a drain region connected to the first conducting channel and the second conducting channel, forming a masking layer over second device, a portion of the source region and a portion of the drain region, performing a first annealing process operative to change a threshold voltage of the first device, removing a portion of the masking layer to expose the second device, and performing a second annealing process operative to change the threshold voltage of the first device and a threshold voltage of the second device.
摘要翻译：一种用于制造场效应晶体管器件的方法包括形成第一导电沟道和第二导电沟道，在第一导电沟道上形成第一栅极叠层以部分地限定第一器件，在第二导电沟道上形成第二栅极堆叠以部分地限定第二装置，注入离子以形成连接到第一导电沟道和第二导电沟道的源极区域和漏极区域，在第二器件上形成掩模层，源极区域的一部分和漏极区域的一部分，执行第一退火处理，其可操作以改变第一器件的阈值电压，去除掩模层的一部分以暴露第二器件，以及执行可操作以改变第一器件的阈值电压的第二退火处理和第二器件的阈值电压第二设备

60. 发明申请

US20120220114A1 TENSILE STRESS ENHANCEMENT OF NITRIDE FILM FOR STRESSED CHANNEL FIELD EFFECT TRANSISTOR FABRICATION 失效
标题翻译：用于应力通道场效应晶体管制造的氮化物膜的拉伸应力增强
公开(公告)号：US20120220114A1
公开(公告)日：2012-08-30
申请号：US13034045
申请日：2011-02-24
申请人： Ming Cai , Dechao Guo , Chun-chen Yeh , Pranita Kulkarni
发明人： Ming Cai , Dechao Guo , Chun-chen Yeh , Pranita Kulkarni
IPC分类号： H01L21/28 , H01L21/768
CPC分类号： H01L29/7843 , H01L21/3105 , H01L21/76814 , H01L21/76825 , H01L21/76834
摘要： A method for inducing a tensile stress in a channel of a field effect transistor (FET) includes forming a nitride film over the FET; forming a contact hole to the FET through the nitride film; and performing ultraviolet (UV) curing of the nitride film after forming the contact hole to the FET through the nitride film, wherein the UV cured nitride film induces the tensile stress in the channel of the FET.
摘要翻译：用于在场效应晶体管（FET）的沟道中诱发拉伸应力的方法包括在FET上形成氮化物膜; 通过氮化物膜形成与FET的接触孔; 并且通过氮化物膜在形成接触孔之后对氮化物膜进行紫外（UV）固化，其中，UV固化的氮化物膜在FET的沟道中引起拉伸应力。

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