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51. 发明授权

US08288289B2 Method of fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08288289B2
公开(公告)日：2012-10-16
申请号：US13016228
申请日：2011-01-28
申请人： Jun-Ho Jeong , Jang-Eun Lee , Se-Chung Oh , Suk-Hun Choi , Jea-Hyoung Lee , Woo-Jin Kim , Woo-Chang Lim
发明人： Jun-Ho Jeong , Jang-Eun Lee , Se-Chung Oh , Suk-Hun Choi , Jea-Hyoung Lee , Woo-Jin Kim , Woo-Chang Lim
IPC分类号： H01L21/302
CPC分类号： H01L21/28
摘要： A method of fabricating a semiconductor device, the method including providing a substrate; forming an underlying layer on the substrate; forming a sacrificial layer on the underlying layer; forming an opening in the sacrificial layer by patterning the sacrificial layer such that the opening exposes a predetermined region of the underlying layer; forming a mask layer in the opening; forming an oxide mask by partially or completely oxidizing the mask layer; removing the sacrificial layer; and etching the underlying layer using the oxide mask as an etch mask to form an underlying layer pattern.
摘要翻译：一种制造半导体器件的方法，所述方法包括提供衬底; 在衬底上形成下层; 在下层上形成牺牲层; 通过图案化所述牺牲层在所述牺牲层中形成开口，使得所述开口暴露所述下层的预定区域; 在开口中形成掩模层; 通过部分或完全氧化掩模层形成氧化物掩模; 去除牺牲层; 并使用氧化物掩模作为蚀刻掩模蚀刻下层以形成下层图案。

52. 发明申请

US20120188143A1 UNIFIED ANTENNA OF SHARK FIN TYPE 有权
标题翻译： SHARK FIN类型的统一天线
公开(公告)号：US20120188143A1
公开(公告)日：2012-07-26
申请号：US13351024
申请日：2012-01-16
申请人： Tae Hoon YANG , Woo Jin KIM
发明人： Tae Hoon YANG , Woo Jin KIM
IPC分类号： H01Q1/42 , H01Q9/04
CPC分类号： H01Q1/3275 , H01Q1/42 , H01Q9/36 , H01Q21/28
摘要： A unified antenna of shark fin type comprises a pad, a base disposed on upper surface of the pad and providing a space for arranging a printed circuit board and a plurality of antenna units, and a case for covering the pad and the base, wherein the antenna further comprises: a first antenna unit disposed in the middle of the printed circuit board and provided for receiving signal of AM/FM band; a second antenna unit disposed near the first antenna unit and provided for receiving signal of DMB (Digital Multimedia Broadcasting) band; and a third antenna unit disposed in front of the first antenna unit and provided for receiving signal of GPS (Global Positioning System) band, and a first auxiliary unit is disposed over the first antenna unit for enhancing electrical properties of the first antenna unit.
摘要翻译：鲨鱼鳍式统一天线包括垫，设置在垫的上表面上的基座，并提供布置印刷电路板和多个天线单元的空间，以及用于覆盖该垫和底座的壳体，其中，天线还包括：第一天线单元，设置在印刷电路板的中间并被提供用于接收AM / FM频带的信号; 设置在第一天线单元附近并被提供用于接收DMB（数字多媒体广播）频带的信号的第二天线单元; 以及第三天线单元，设置在第一天线单元的前面，用于接收GPS（全球定位系统）频带的信号，第一辅助单元设置在第一天线单元上，用于增强第一天线单元的电气特性。

53. 发明申请

US20110187655A1 MULTI-DISPLAY DEVICE AND METHOD FOR CONTROLLING THE SAME 有权
标题翻译：多显示装置及其控制方法
公开(公告)号：US20110187655A1
公开(公告)日：2011-08-04
申请号：US12861481
申请日：2010-08-23
申请人： Seung Jun Min , Chang Dae LEE , Seung Heon JEON , Jenny Hyomi KANG , Woo Jin KIM
发明人： Seung Jun Min , Chang Dae LEE , Seung Heon JEON , Jenny Hyomi KANG , Woo Jin KIM
IPC分类号： G06F3/041 , G09G5/00
CPC分类号： G06F3/0412 , G06F1/1641 , G06F1/1643 , G06F1/1647 , G06F1/1652 , G06F3/041 , G06F3/0488
摘要： A multi-display device includes: a transparent first touch panel; a second touch panel of which at least a part overlaps the first touch panel; and an operation controller which operates the first and second touch panels. The operation controller senses a touch input of the first and second touch panels to determine and execute a function according to a state of the sensed touch input and an overlapped state of the first and second touch panels. The operation controller may selectively activate first and second functions of first and second touch panels, respectively, according to a touch recognition result and select and execute a third function linked with the first and second functions.
摘要翻译：多显示设备包括：透明第一触摸面板; 第二触摸面板，其至少部分与第一触摸面板重叠; 以及操作第一和第二触摸面板的操作控制器。操作控制器感测第一和第二触摸面板的触摸输入，以根据所感测的触摸输入的状态和第一和第二触摸面板的重叠状态来确定和执行功能。操作控制器可以根据触摸识别结果分别选择性地激活第一和第二触摸面板的第一和第二功能，并选择并执行与第一和第二功能相链接的第三功能。

54. 发明授权

US07595772B2 Plasma display panel method and apparatus for preventing after-image on the plasma display panel 失效
标题翻译：用于防止等离子体显示面板上的后置图像的等离子体显示面板方法和装置
公开(公告)号：US07595772B2
公开(公告)日：2009-09-29
申请号：US11252405
申请日：2005-10-17
申请人： Soo-Jin Lee , Woo-Jin Kim , Im-Su Choi
发明人： Soo-Jin Lee , Woo-Jin Kim , Im-Su Choi
IPC分类号： G09G3/28
CPC分类号： G09G3/2007 , G09G3/296 , G09G2320/0257 , G09G2320/0626 , G09G2360/16
摘要： An after-image prevention apparatus and method for a plasma display panel having a plurality of address electrodes and a plurality of scan and sustain electrodes arranged in pairs and in a zigzag pattern. An average signal level until the current frame from currently input picture data and an average signal level of each cell until the previous frame as stored in a memory section is calculated. The average signal level is compared with the picture data. An attenuation coefficient is generated corresponding to the difference between the average signal level and the picture data. The picture data is multiplied by the attenuation coefficient to output correction data, thereby preventing an after-image phenomenon on the plasma display panel.
摘要翻译：一种用于等离子体显示面板的后置图像防止装置和方法，其具有多个地址电极和成对地布置成Z字形图案的多个扫描和维持电极。计算从当前输入图像数据起的当前帧直到存储在存储器部分中的前一帧之前的每个单元的平均信号电平的平均信号电平。将平均信号电平与图像数据进行比较。根据平均信号电平和图像数据之间的差异产生衰减系数。图像数据乘以衰减系数以输出校正数据，从而防止等离子体显示面板上的后图像现象。

55. 发明申请

US20080159459A1 Methods and apparatus to provide clock resynchronization in communication networks 有权
标题翻译：在通信网络中提供时钟重新同步的方法和装置
公开(公告)号：US20080159459A1
公开(公告)日：2008-07-03
申请号：US11653534
申请日：2007-01-16
申请人： Chung San Roger Chan , Richard M. Prentice , Woo Jin Kim
发明人： Chung San Roger Chan , Richard M. Prentice , Woo Jin Kim
IPC分类号： H04L7/00
CPC分类号： H04L7/033
摘要： Methods and apparatus to provide clock resynchronization in communication networks are disclosed. An example method of clock resynchronization disclosed herein comprises determining a vote based on adjacent samples occurring within a single bit interval in a sampled data stream, wherein the vote comprises an early vote when the adjacent samples indicate a sampling phase of a sampling clock is early relative to a center position in the bit interval and wherein the vote comprises a late vote when adjacent samples indicate the sampling phase is late relative to the center position, tracking a running difference between a number of early votes and a number of late votes in a plurality of votes corresponding to a plurality of adjacent samples, and adjusting the sampling phase when the running difference reaches a threshold.
摘要翻译：公开了在通信网络中提供时钟再同步的方法和装置。本文公开的时钟重新同步的示例性方法包括基于在采样数据流中的单个位间隔内发生的相邻采样来确定投票，其中当相邻采样指示采样时钟的采样相位为早期相对时，投票包括早期投票到所述比特间隔中的中心位置，并且其中所述投票包括晚期投票，当相邻样本指示所述采样阶段相对于所述中心位置较晚时，跟踪多个早期投票与多个晚期投票数之间的差异的投票对应于多个相邻样本，并且当运行差达到阈值时调整采样相位。

56. 发明申请

US20080132073A1 Oxide Pattern Forming Method and Patterning Method of Semiconductor Device 失效
标题翻译：半导体器件的氧化物图案形成方法和图案化方法
公开(公告)号：US20080132073A1
公开(公告)日：2008-06-05
申请号：US11770983
申请日：2007-06-29
申请人： Hyo Geun Yoon , Woo Jin Kim , Dong Joo Kim , Ji Yong Park , Yong Soo Jung , Geun Min Choi , Young Wok Song , Sang Hyun Lee
发明人： Hyo Geun Yoon , Woo Jin Kim , Dong Joo Kim , Ji Yong Park , Yong Soo Jung , Geun Min Choi , Young Wok Song , Sang Hyun Lee
IPC分类号： H01L21/311
CPC分类号： H01L21/3086 , H01L21/3081 , H01L21/31111 , H01L21/31155
摘要： An oxide pattern forming method comprises forming an oxide layer on a semiconductor substrate, implanting boron ions of not less than 1.0×1016 atoms/cm2 onto the oxide layer in a given region, and wet-etching the oxide layer in the remaining region where the boron ions are not implanted.
摘要翻译：氧化物图案形成方法包括在半导体衬底上形成氧化物层，在给定的氧化物层中将不少于1.0×10 16原子/ cm 2的硼离子注入到氧化物层上区域，并且在没有植入硼离子的剩余区域中湿法蚀刻氧化物层。

57. 发明授权

US07342595B2 Apparatus and method for driving plasma display panel 失效
标题翻译：用于驱动等离子体显示面板的装置和方法
公开(公告)号：US07342595B2
公开(公告)日：2008-03-11
申请号：US10992210
申请日：2004-11-19
申请人： Geun-Yeong Chang , Woo-Jin Kim
发明人： Geun-Yeong Chang , Woo-Jin Kim
IPC分类号： G09G5/10
CPC分类号： G09G3/288 , G09G2320/0626 , G09G2330/02 , G09G2330/045 , G09G2360/16
摘要： A method and apparatus for driving a plasma display panel that automatically controls power using an average signal level that is compensated based on a difference between power consumption at red (R), green (G), and blue (B) discharge cells. The method includes calculating R, G, and B average signal levels, calculating a compensated average signal level using the R, G, and B average signal levels and R, G, and B weights, and controlling the number of discharges for each frame, which is in inversely proportional to the compensated average signal level. The R, G, and B weights are set at a value that reduces a difference between power consumption at the R, G, and B colored discharge cells when displaying the R, G, and B colors in a case where the R, G, and B average signal levels are equal to each other.
摘要翻译：一种用于驱动等离子体显示面板的方法和装置，其使用基于红色（R），绿色（G）和蓝色（B）放电单元的功率消耗之间的差异来补偿的平均信号电平来自动控制功率。该方法包括计算R，G和B平均信号电平，使用R，G和B平均信号电平和R，G和B权重来计算补偿的平均信号电平，并且控制每帧的放电次数，其与补偿的平均信号电平成反比。将R，G和B权重设定为在R，G和B着色放电单元上显示R，G和B颜色时的功耗之差减小的值， B平均信号电平相等。

58. 发明授权

US07338864B2 Memory device and method for fabricating the same 有权
标题翻译：存储器件及其制造方法
公开(公告)号：US07338864B2
公开(公告)日：2008-03-04
申请号：US11385217
申请日：2006-03-20
申请人： Eung-Rim Hwang , Se-Aug Jang , Tae-Woo Jung , Seo-Min Kim , Woo-Jin Kim , Hyung-Soon Park , Young-Bog Kim , Hong-Seon Yang , Hyun-Chul Sohn
发明人： Eung-Rim Hwang , Se-Aug Jang , Tae-Woo Jung , Seo-Min Kim , Woo-Jin Kim , Hyung-Soon Park , Young-Bog Kim , Hong-Seon Yang , Hyun-Chul Sohn
IPC分类号： H01L21/8242
CPC分类号： H01L27/11521 , H01L27/10855 , H01L27/10888 , H01L27/115 , H01L29/7886
摘要： Disclosed are a memory device and a method for fabricating the same. The memory device includes: a substrate provided with a trench; a bit line contact junction formed beneath the trench; a plurality of storage node contact junctions formed outside the trench; and a plurality of gate structures each being formed on the substrate disposed between the bit line contact junction and one of the storage node contact junctions. Each sidewall of the trench becomes a part of the individual channels and thus, channel lengths of the transistors in the cell region become elongated. Accordingly, the storage node contact junctions have a decreased level of leakage currents, thereby increasing data retention time.
摘要翻译：公开了一种存储器件及其制造方法。存储器件包括：具有沟槽的衬底; 位于沟槽下面的位线接触结; 形成在沟槽外部的多个存储节点接触结; 以及多个栅极结构，每个栅极结构都形成在位于位线接触连接点与存储节点接触接点之一之间的衬底上。沟槽的每个侧壁成为各个沟道的一部分，因此，单元区域中的晶体管的沟道长度变长。因此，存储节点接触点具有降低的漏电流水平，从而增加数据保留时间。

59. 发明授权

US07091934B2 Method and apparatus for controlling address power for a plasma display panel 失效
标题翻译：用于控制等离子体显示面板的地址功率的方法和装置
公开(公告)号：US07091934B2
公开(公告)日：2006-08-15
申请号：US10628739
申请日：2003-07-28
申请人： Woo-Jin Kim , Yoon-Phil Eo , Young-Chan Lee
发明人： Woo-Jin Kim , Yoon-Phil Eo , Young-Chan Lee
IPC分类号： G09G3/28
CPC分类号： G09G3/2803 , G09G3/2077 , G09G3/293 , G09G2310/0213 , G09G2320/0271 , G09G2330/021 , G09G2360/16
摘要： A method and apparatus for controlling address power of a plasma display panel and a plasma display panel device having that apparatus, wherein the plasma display panel includes pluralities of address electrodes, scan electrodes, and sustain electrodes, the scan electrodes and sustain electrodes forming pairs and being alternately disposed. After determining an attenuation coefficient that corresponds to a sum of pixel differences between lines throughout an input video signal, output video data is modified by multiplying the attenuation coefficient to the input video data. According to such a power control of address data, power consumption is reduced since the number of times of switching address data is reduced.
摘要翻译：一种用于控制等离子体显示面板的地址功率的方法和装置和具有该装置的等离子体显示面板装置，其中等离子体显示面板包括多个寻址电极，扫描电极和维持电极，扫描电极和维持电极形成对，交替布置。在确定对应于整个输入视频信号中的行之间的像素差之和的衰减系数之后，通过将衰减系数与输入视频数据相乘来修改输出视频数据。根据地址数据的这种功率控制，由于切换地址数据的次数减少，所以功耗降低。

60. 发明申请

US20050276131A1 Semiconductor memory device and burn-in test method therefor 审中-公开
标题翻译：半导体存储器件及其老化测试方法
公开(公告)号：US20050276131A1
公开(公告)日：2005-12-15
申请号：US11020323
申请日：2004-12-27
申请人： Woo-Jin Kim , Kwang-Joon Park , Joo-Seok Kwak , Kwang-Won Lee , Jong-Jin Yi
发明人： Woo-Jin Kim , Kwang-Joon Park , Joo-Seok Kwak , Kwang-Won Lee , Jong-Jin Yi
IPC分类号： G11C29/00 , G11C7/00 , G11C29/36
CPC分类号： G11C29/12005 , G11C29/36
摘要： A semiconductor memory device includes a switch circuit that inverts input data or output data when burn-in mode enable signals are activated or a control signal switch that inverts external control signals or internal control signals when burn-in mode enable signals are activated. A burn-in test method for the semiconductor memory device performs a pass/fail decision to determine whether the output data has passed or failed based on an inverted logical value of the input data.
摘要翻译：半导体存储器件包括一个开关电路，当老化模式使能信号被激活时，其反相输入数据或输出数据，或者当老化模式使能信号被激活时转换外部控制信号或内部控制信号的控制信号开关。半导体存储器件的老化测试方法基于输入数据的反相逻辑值执行通过/失败判定以确定输出数据是否通过或失败。

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