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41. 发明申请

US20160299519A1 Zero Drift, Limitless and Adjustable Reference Voltage Generation 有权
标题翻译：零漂移，无限和可调参考电压产生
公开(公告)号：US20160299519A1
公开(公告)日：2016-10-13
申请号：US15094459
申请日：2016-04-08
申请人： PR Electronics A/S
发明人： Dan Vinge Madsen , Stig Alnøe Lindemann
IPC分类号： G05F1/46 , H03K7/08 , H03K5/007
CPC分类号： G05F1/468 , H02M3/157 , H03F3/347 , H03F3/393 , H03F3/45475 , H03F2200/135 , H03F2200/144 , H03F2200/156 , H03F2200/159 , H03F2200/165 , H03F2200/264 , H03F2200/297 , H03F2200/351 , H03F2200/372 , H03F2200/375 , H03F2200/528 , H03F2203/45512 , H03F2203/45526 , H03F2203/45528 , H03F2203/45531 , H03F2203/45534 , H03F2203/45536 , H03F2203/45594 , H03F2203/45631 , H03F2203/45701 , H03G3/3021 , H03K5/007 , H03K7/08 , H03M1/822
摘要： A circuit for generation of a reference voltage for an electronic system, which circuit comprises at least one digital buffer (U21, U31, U32, U41, U51), a low pass filter (R21, C21; R31, C31; R41, C41; R51, C51) and an operational amplifier (OA21, OA31, OA41, OA51)), which circuit is adapted to revive an input in the form of a bandgap reference voltage into the digital buffer, which digital buffer is adapted to receive a digital input from a Pulse Width Modulated (PWM) signal, which digital buffer is adapted to generate an output signal adapted to be fed to the low pass filter, which output signal after filtration is adapted to be fed to a positive input terminal of the operational amplifier, which operational amplifier comprises a feedback circuit, which feedback circuit comprises at least one capacitor (C22, C32, C44, C54) adapted to be connected from an output terminal of the operational amplifier towards a negative input terminal of the operational amplifier so as to form an integrator, wherein the feedback circuit further comprises at least one chopped signal path (R22, S21; R33, R34, S32; R33, R35, C35, S31), which chopped signal is adapted to be modulated by the output signal of the digital buffer.
摘要翻译：用于产生电子系统的参考电压的电路，该电路包括至少一个数字缓冲器（U21，U31，U32，U41，U51），低通滤波器（R21，C21; R31，C31; R41，C41; R51，C51）和运算放大器（OA21，OA31，OA41，OA51）），该电路适于将带隙参考电压形式的输入恢复到数字缓冲器中，该数字缓冲器适于接收数字输入来自脉宽调制（PWM）信号，该数字缓冲器适于产生适于馈送到低通滤波器的输出信号，滤波后的输出信号适于馈送到运算放大器的正输入端，该运算放大器包括反馈电路，该反馈电路包括适于从运算放大器的输出端子向运算放大器的负输入端连接的至少一个电容器（C22，C32，C44，C54），以形成一个整合其中所述反馈电路还包括至少一个斩波信号路径（R22，S21; R33，R34，S32; R33，R35，C35，S31），该斩波信号适于由数字缓冲器的输出信号调制。

42. 发明授权

US09444406B1 Amplifier topology achieving high DC gain and wide output voltage range 有权
标题翻译：放大器拓扑实现高直流增益和宽输出电压范围
公开(公告)号：US09444406B1
公开(公告)日：2016-09-13
申请号：US14985677
申请日：2015-12-31
申请人： Silicon Laboratories Inc.
发明人： Michael H. Perrott , Srisai R. Seethamraju , Timothy A. Monk
IPC分类号： H03M1/34 , H03F1/02 , H03F3/45 , H03M1/12
CPC分类号： H03M1/12 , H03F1/0272 , H03F1/223 , H03F3/45192 , H03F3/45475 , H03F3/45659 , H03F2200/297 , H03F2203/45112 , H03F2203/45356 , H03F2203/45514 , H03M1/0612 , H03M1/08 , H03M1/164
摘要： An amplifier topology achieves enhances DC gain to improve linearity while maintaining a good signal to noise ratio. The amplifier includes an amplifier output stage that supplies an amplifier output signal. The amplifier also includes a sense amplifier that augments the output stage. The sense amplifier is coupled to the amplifier input to control current through the output stage in order to achieve reduced voltage variation at the amplifier input as a function of the amplifier output signal voltage as compared to a basic common source amplifier and thereby enhances DC gain of the amplifier.
摘要翻译：放大器拓扑实现增强直流增益，以提高线性度，同时保持良好的信噪比。放大器包括放大器输出级，其提供放大器输出信号。该放大器还包括增强输出级的读出放大器。读出放大器耦合到放大器输入以控制通过输出级的电流，以便与基本的公共源放大器相比，作为放大器输出信号电压的函数，在放大器输入端实现减小的电压变化，从而增强放大器。

43. 发明申请

US20160173041A1 HOT-SWAP CURRENT-SENSING SYSTEM 有权
标题翻译：热交换电流传感系统
公开(公告)号：US20160173041A1
公开(公告)日：2016-06-16
申请号：US14965588
申请日：2015-12-10
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： SUDHEER PRASAD
IPC分类号： H03F1/30 , H03F3/45 , H03F3/393
CPC分类号： H03F3/393 , H03F1/086 , H03F3/45475 , H03F3/45977 , H03F2200/252 , H03F2200/267 , H03F2200/271 , H03F2200/297 , H03F2200/471 , H03F2203/45151 , H03F2203/45212 , H03F2203/45264 , H03F2203/45288
摘要： One example includes a hot-swap control system. The system includes a sense resistor network provides a sense voltage in response to an output current. The system also includes a sense control circuit includes a chopper amplifier system arranged in a servo feedback arrangement to generate a monitoring voltage having an amplitude that is associated with the output current based on the sense voltage. A notch filter chopping stage filters out signal ripple in the chopper amplifier system across a unity-gain bandwidth of the chopper amplifier system, and a capacitive compensation network provides stability-compensation of the chopper amplifier system across the unity-gain bandwidth. A transconductance amplifier configured to compare the monitoring voltage with a predetermined reference voltage to generate a control voltage. The system further includes a power transistor configured to conduct the output current to an output based on the control voltage.
摘要翻译：一个例子包括热插拔控制系统。该系统包括检测电阻器网络，以响应于输出电流提供感测电压。该系统还包括感测控制电路，其包括布置在伺服反馈装置中的斩波放大器系统，以基于感测电压产生具有与输出电流相关联的幅度的监视电压。陷波滤波器斩波级跨越斩波放大器系统的单位增益带宽滤除斩波放大器系统中的信号纹波，并且电容补偿网络提供斩波放大器系统跨单位增益带宽的稳定补偿。一种跨导放大器，被配置为将监视电压与预定参考电压进行比较以产生控制电压。该系统还包括功率晶体管，其配置为基于控制电压将输出电流传导到输出。

44. 发明申请

US20150102858A1 DISTRIBUTED POLE-ZERO COMPENSATION FOR AN AMPLIFIER 有权
标题翻译：用于放大器的分布式零位补偿
公开(公告)号：US20150102858A1
公开(公告)日：2015-04-16
申请号：US14508755
申请日：2014-10-07
申请人： Texas Instruments Incorporated
发明人： Srinivas K. Pulijala , Steven G. Brantley
IPC分类号： H03F1/02 , H03F3/21
CPC分类号： H03F1/02 , H03F1/14 , H03F3/20 , H03F2200/135 , H03F2200/153 , H03F2200/171 , H03F2200/297 , H03F2200/408
摘要： An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.
摘要翻译：放大器包括放大器输入和放大器输出。补偿网络耦合到放大器输出。补偿网络包括至少一个调谐到放大器工作频率的RC网络。补偿网络提供至少一个零以补偿由耦合到放大器输出的负载引入的至少一个极点。

45. 发明申请

US20150070058A1 Logarithmic Detector Amplifier System for Use as High Sensitivity Selective Receiver Without Frequency Conversion 有权
公开(公告)号：US20150070058A1
公开(公告)日：2015-03-12
申请号：US14216945
申请日：2014-03-17
申请人： DockOn AG
发明人： Patrick Antoine Rada , Forrest James Brown , Alexandre Dupuy
IPC分类号： H03L7/093 , H04B1/10
CPC分类号： H03F3/193 , H03F1/38 , H03F1/56 , H03F3/195 , H03F3/72 , H03F2200/129 , H03F2200/147 , H03F2200/222 , H03F2200/237 , H03F2200/241 , H03F2200/243 , H03F2200/246 , H03F2200/261 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/309 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/402 , H03F2200/438 , H03F2200/451 , H03F2200/462 , H03L7/06 , H04B1/22
摘要： A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.

46. 发明授权

US08314764B2 Voltage amplifier and driving device of display device using the voltage amplifier 失效
标题翻译：使用电压放大器的显示装置的电压放大器和驱动装置
公开(公告)号：US08314764B2
公开(公告)日：2012-11-20
申请号：US12452419
申请日：2008-06-24
申请人： Byung-Doo Kim , Hee-Jong Park , Ju-Young No , Sang-Hoon Lee
发明人： Byung-Doo Kim , Hee-Jong Park , Ju-Young No , Sang-Hoon Lee
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G2330/021 , H03F1/34 , H03F3/3022 , H03F3/45183 , H03F3/45192 , H03F3/45475 , H03F2200/297 , H03F2203/30021 , H03F2203/45028 , H03F2203/45632
摘要： An amplifying circuit of a display device including a plurality of pixels includes an input unit, a bias unit, and an output unit. The input unit is coupled between a first power source for supplying a first voltage and a second power source for supplying a second voltage, receives a first input signal and a second input signal, and is controlled by the first and second input signals. The bias unit receives a bias voltage for operating the input unit, and includes a first node and a second node controllable by the input unit. The output unit applies an output voltage to a pixel by using a first output transistor turned on/off by a signal applied to the first node and a second output transistor turned on/off by a signal applied to the second node, and the first output transistor is a different type to the second output transistor. In this instance, the input unit includes a first input transistor having a first terminal coupled to a first power source and being turned on/off by a first input signal and a second input transistor of the same type as the first input transistor, having a first terminal coupled to the first power source, and being turned on/off by a second input signal. The bias unit includes a first transistor controllable by the on/off state of the first input transistor and a second transistor controllable by the on/off state of the second input transistor.
摘要翻译：包括多个像素的显示装置的放大电路包括输入单元，偏置单元和输出单元。输入单元耦合在用于提供第一电压的第一电源和用于提供第二电压的第二电源之间，接收第一输入信号和第二输入信号，并由第一和第二输入信号控制。偏置单元接收用于操作输入单元的偏置电压，并且包括可由输入单元控制的第一节点和第二节点。输出单元通过使用施加到第一节点的信号通过施加到第一节点的信号通过第一输出晶体管施加输出电压，并且通过施加到第二节点的信号将第二输出晶体管导通/截止，并且第一输出晶体管是与第二输出晶体管不同的类型。在这种情况下，输入单元包括第一输入晶体管，其具有耦合到第一电源并通过第一输入信号导通/截止的第一端子和与第一输入晶体管相同类型的第二输入晶体管，第一输入晶体管具有第一端子，耦合到第一电源，并由第二输入信号导通/截止。偏置单元包括可由第一输入晶体管的导通/截止状态控制的第一晶体管和可由第二输入晶体管的导通/截止状态控制的第二晶体管。

47. 发明授权

US07889004B1 Operational amplifiers with enhanced parameters 有权
标题翻译：具有增强参数的运算放大器
公开(公告)号：US07889004B1
公开(公告)日：2011-02-15
申请号：US12571038
申请日：2009-09-30
申请人： Franklin Marshall Murden, II , Scott Gregory Bardsley , Michael Elliott
发明人： Franklin Marshall Murden, II , Scott Gregory Bardsley , Michael Elliott
IPC分类号： H03F3/45
CPC分类号： H03F3/45206 , H03F1/086 , H03F3/45659 , H03F2200/297 , H03F2203/45354 , H03F2203/45512 , H03F2203/45544 , H03F2203/45631 , H03F2203/45638 , H03F2203/45702 , H03F2203/45706 , H03F2203/45722
摘要： Operational amplifier embodiments are provided to enhance amplifier parameters such as bandwidth, stability, and headroom. In an amplifier embodiment, transistor followers are arranged with first and second differential pairs to facilitate selective positioning of first and second transfer function poles to enhance bandwidth and resistors and inductors are arranged to facilitate selective positioning of complex third transfer function poles to enhance phase margin. In another amplifier embodiment, the transistor followers are arranged to reduce headroom limitations to thereby enhance the voltage swing of output signals.
摘要翻译：提供操作放大器实施例以增强放大器参数，例如带宽，稳定性和净空。在放大器实施例中，晶体管跟随器被布置成具有第一和第二差分对，以促进第一和第二传递函数极的选择性定位以增强带宽，并且电阻器和电感器被布置成便于复杂的第三传递函数极的选择性定位以增强相位裕度。在另一个放大器实施例中，晶体管跟随器布置成减小余量限制，从而增强输出信号的电压摆幅。

48. 发明授权

US07545221B1 Signal amplifying apparatus including I/O devices and core devices 有权
标题翻译：信号放大装置，包括I / O装置和核心装置
公开(公告)号：US07545221B1
公开(公告)日：2009-06-09
申请号：US11970525
申请日：2008-01-08
申请人： Chia-Hua Chou , Kang-Wei Hsueh
发明人： Chia-Hua Chou , Kang-Wei Hsueh
IPC分类号： H03F3/68
CPC分类号： H03F3/45183 , H03F3/45219 , H03F2200/153 , H03F2200/297 , H03F2203/45091 , H03F2203/45366 , H03F2203/45512 , H03F2203/45526
摘要： The present invention provides a signal amplifying apparatus, for converting a first input signal into a first output signal. The signal amplifying apparatus includes an input stage circuit for receiving the first input signal; a cascoded circuit coupled to the input stage circuit, including a plurality of first cascoded transistors, wherein equivalent oxide thicknesses of the first cascoded transistors are not the same; an output stage circuit has a first input port coupled to the cascoded circuit, and a first output port for outputting the first output signal; and a first capacitor has a first terminal connected to the first output port of the output stage circuit and a second terminal coupled to the cascoded circuit, wherein the second terminal is not connected to the first input port of the output stage circuit.
摘要翻译：本发明提供了一种用于将第一输入信号转换为第一输出信号的信号放大装置。信号放大装置包括：输入级电路，用于接收第一输入信号; 耦合到输入级电路的级联电路，包括多个第一级联光电晶体管，其中第一级联光电晶体管的等效氧化物厚度不相同; 输出级电路具有耦合到级联电路的第一输入端口和用于输出第一输出信号的第一输出端口; 并且第一电容器具有连接到输出级电路的第一输出端口的第一端子和耦合到级联电路的第二端子，其中第二端子不连接到输出级电路的第一输入端口。

49. 发明申请

US20090140810A1 Variable Gain Amplifier 有权
标题翻译：可变增益放大器
公开(公告)号：US20090140810A1
公开(公告)日：2009-06-04
申请号：US12326830
申请日：2008-12-02
申请人： Chang Sun Kim , Ki Jeon
发明人： Chang Sun Kim , Ki Jeon
IPC分类号： H03F3/45
CPC分类号： H03F3/45197 , A61B8/4483 , H03F3/45632 , H03F2200/297 , H03F2200/447 , H03F2200/66 , H03F2203/45356 , H03F2203/45526 , H03F2203/45641 , H03G1/0088
摘要： The present invention relates to a variable gain amplifier. The variable gain amplifier in an ultrasound includes an attenuator. The attenuator includes resistor strings each having a plurality of resistors connected in series to each other and a gain control unit. The gain control unit has tap inputs taken from a plurality of junctions between a first resistor string receiving a first input signal and a second resistor string receiving a second input signal. The gain control unit is configured to provide an attenuated differential input signal based on the tap inputs. The variable gain amplifier includes an amplifying unit having a feedback amplifying section configured to amplify the attenuated differential input signal to output a first amplified signal and a clipping amplifying section configured to amplify the first amplified signal to output a second amplified signal that falls within a predetermined voltage range.
摘要翻译：本发明涉及可变增益放大器。超声波中的可变增益放大器包括衰减器。衰减器包括各自具有彼此串联连接的多个电阻器的电阻串和增益控制单元。所述增益控制单元具有从接收第一输入信号的第一电阻器串和接收第二输入信号的第二电阻器串之间的多个接点获取的抽头输入。增益控制单元被配置为基于抽头输入提供衰减的差分输入信号。可变增益放大器包括具有反馈放大部分的放大单元，反馈放大部分被配置为放大衰减的差分输入信号以输出第一放大信号;以及限幅放大部分，被配置为放大第一放大信号，以输出落在预定的电压范围

50. 发明授权

US07471139B2 Voltage buffer for capacitive loads 有权
标题翻译：用于容性负载的电压缓冲器
公开(公告)号：US07471139B2
公开(公告)日：2008-12-30
申请号：US11620001
申请日：2007-01-04
申请人： Shahzad Khalid
发明人： Shahzad Khalid
IPC分类号： G05F1/10 , G05F3/02
CPC分类号： G11C27/005 , G11C27/028 , H03F1/342 , H03F3/45475 , H03F3/505 , H03F2200/297 , H03F2200/366 , H03F2200/453 , H03F2200/78 , H03F2203/5021 , H03F2203/5027
摘要： A voltage buffer for capacitive loads isolates the load from the feedback loop. Using a variation of a follower arrangement, a second transistor outside of the feedback loop introduced. The current to the load is supplied through the second transistor, which is connected to have the same control gate level as the transistor in the feedback loop and provide an output voltage based on the reference input voltage. The output voltage is dependent upon the input voltage, but the load is removed from the feedback loop. By removing the load from the feedback loop, the loop is stabilized with only a very small or no compensating capacitor, allowing the quiescent current of the buffer to be reduced and the settling time to be improved. One preferred use of the present invention is to drive the data storage elements of a non-volatile memory.
摘要翻译：用于电容负载的电压缓冲器将负载与反馈回路隔离。使用从动装置的变型，引入反馈环外的第二晶体管。通过第二晶体管提供到负载的电流，第二晶体管被连接以具有与反馈回路中的晶体管相同的控制栅极电平，并且基于参考输入电压提供输出电压。输出电压取决于输入电压，但负载从反馈回路中移除。通过从反馈回路中消除负载，仅通过非常小的补偿电容器或无补偿电容器使环路稳定，从而可以减小缓冲器的静态电流并提高稳定时间。本发明的一个优选的用途是驱动非易失性存储器的数据存储元件。

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