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41. 发明授权

US08952509B1 Stacked multi-chip bottom source semiconductor device and preparation method thereof 有权
标题翻译：堆叠多芯片底源半导体器件及其制备方法
公开(公告)号：US08952509B1
公开(公告)日：2015-02-10
申请号：US14031283
申请日：2013-09-19
申请人： Hamza Yilmaz , Yueh-Se Ho , Yan Xun Xue , Jun Lu , Xiaotian Zhang , Zhi Qiang Niu , Ming-Chen Lu , Liang Zhao , YuPing Gong , GuoFeng Lian
发明人： Hamza Yilmaz , Yueh-Se Ho , Yan Xun Xue , Jun Lu , Xiaotian Zhang , Zhi Qiang Niu , Ming-Chen Lu , Liang Zhao , YuPing Gong , GuoFeng Lian
IPC分类号： H01L25/07 , H01L23/495 , H01L25/00
CPC分类号： H01L23/49575 , H01L23/3107 , H01L23/49524 , H01L23/49551 , H01L23/49562 , H01L24/37 , H01L24/40 , H01L24/41 , H01L2224/37011 , H01L2224/371 , H01L2224/4007 , H01L2224/40095 , H01L2224/40245 , H01L2224/83801 , H01L2224/84801 , H01L2924/13091 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/00014
摘要： The present invention discloses a stacked dual MOSFET package structure and a preparation method thereof. The stacked dual MOSFET package structure comprises a lead frame unit having a die paddle, a first lead and a second lead; a first chip flipped and attached on a top surface of a main paddle of the die paddle; a second chip attached on a bottom surface of the main paddle; and a metal clip mounted on the back of the flipped first chip and electrically connecting an electrode at the back of the first chip to the first lead. A top surface of a metal bump arranged on each electrode at the front of the second chip, a bottom surface of the die pin of the die paddle, a bottom surface of a lead pin of the second lead, and a bottom surface of the first lead are located on the same plane.
摘要翻译：本发明公开了一种叠层双MOSFET封装结构及其制备方法。堆叠双MOSFET封装结构包括具有管芯焊盘，第一引线和第二引线的引线框架单元; 第一芯片翻转并附接在模板的主桨的顶表面上; 附接在主桨的底表面上的第二芯片; 以及安装在翻转的第一芯片的背面上并将第一芯片背面的电极电连接到第一引线的金属夹。布置在第二芯片的前面的每个电极上的金属凸块的顶表面，模板的模具销的底表面，第二引线的引脚的底表面和第一引脚的底表面导线位于同一平面上。

42. 发明授权

US08344519B2 Stacked-die package for battery power management 有权
标题翻译：堆叠式封装，用于电池电源管理
公开(公告)号：US08344519B2
公开(公告)日：2013-01-01
申请号：US13089065
申请日：2011-04-18
申请人： Jun Lu , Allen Chang , Xiaotian Zhang
发明人： Jun Lu , Allen Chang , Xiaotian Zhang
IPC分类号： H01L23/48
CPC分类号： H01L21/823487 , H01L23/4952 , H01L23/49524 , H01L23/49531 , H01L23/49562 , H01L23/49575 , H01L23/58 , H01L24/37 , H01L24/39 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/85 , H01L24/91 , H01L25/071 , H01L25/074 , H01L25/18 , H01L27/088 , H01L2224/05552 , H01L2224/0603 , H01L2224/32145 , H01L2224/32245 , H01L2224/37124 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48145 , H01L2224/48247 , H01L2224/48465 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/49112 , H01L2224/4917 , H01L2224/49171 , H01L2224/49431 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2224/85 , H01L2225/06562 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H02J7/0031 , H01L2224/78 , H01L2924/00 , H01L2924/00012 , H01L2224/45099
摘要： A battery protection package assembly is disclosed. The assembly includes a power control integrated circuit (IC) with pins for a supply voltage input (VCC) and a ground (VSS) on a first side of the power control IC. First and second common-drain metal oxide semiconductor field effect transistors (MOSFETs) are electrically coupled to the power control IC. The power control IC and the first and second common-drain metal oxide semiconductor field effect transistors (MOSFET) are co-packaged on a common die pad. The power control IC is vertically stacked on top of one or more of the first and second common-drain MOSFETs. Leads coupled to a supply voltage input (VCC) and a ground (VSS) of the power control IC are on a first side of the common die pad.
摘要翻译：公开了一种电池保护封装组件。该组件包括功率控制集成电路（IC），其具有用于功率控制IC的第一侧上的电源电压输入（VCC）和接地（VSS）的引脚。第一和第二共漏极金属氧化物半导体场效应晶体管（MOSFET）电耦合到功率控制IC。功率控制IC和第一和第二共漏极金属氧化物半导体场效应晶体管（MOSFET）共同封装在公共管芯焊盘上。功率控制IC垂直堆叠在第一和第二共漏极MOSFET中的一个或多个的顶部上。耦合到功率控制IC的电源电压输入（VCC）和接地（VSS）的引线位于公共管芯焊盘的第一侧上。

43. 发明授权

US08222088B2 Semiconductor package with adhesive material pre-printed on the lead frame and chip, and its manufacturing method 有权
标题翻译：半导体封装具有预先印在引线框和芯片上的粘合剂材料及其制造方法
公开(公告)号：US08222088B2
公开(公告)日：2012-07-17
申请号：US12799811
申请日：2010-04-30
申请人： Xiaotian Zhang , Jun Lu
发明人： Xiaotian Zhang , Jun Lu
IPC分类号： H01L21/60 , H01L21/78
CPC分类号： H01L24/37 , H01L23/3107 , H01L23/49513 , H01L23/4952 , H01L23/49562 , H01L24/05 , H01L24/06 , H01L24/27 , H01L24/29 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/83 , H01L24/84 , H01L2224/04042 , H01L2224/05 , H01L2224/0603 , H01L2224/2919 , H01L2224/32245 , H01L2224/371 , H01L2224/40245 , H01L2224/4103 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48247 , H01L2224/48599 , H01L2224/48699 , H01L2224/48799 , H01L2224/49111 , H01L2224/73221 , H01L2224/73265 , H01L2224/83192 , H01L2224/83855 , H01L2224/83856 , H01L2224/8585 , H01L2224/92 , H01L2224/92247 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2224/83 , H01L2224/84 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： This invention discloses a semiconductor package with adhesive material pre-printed on the lead frame and chip, and the manufacturing method. The adhesive material is applied onto the chip carrier and the pin of the lead frame and also on the front electrode of the semiconductor chip via pre-printing. The back of the semiconductor chip is adhered on the chip carrier, and the front electrode of the semiconductor chip and the pin are connected respectively with a metal connector. The size, shape and thickness of the adhesive material are applied according to different application requirements according to size and shapes of the contact zone of the semiconductor chip and the metal connector. Particularly, the adhesive zones are formed by pre-printing the adhesive material thus significantly enhance the quality and performance of semiconductor products, and improves the productivity.
摘要翻译：本发明公开了一种半导体封装，其具有预先印刷在引线框架和芯片上的粘合剂材料及其制造方法。粘合剂材料通过预打印被施加到芯片载体和引线框架的引脚以及半导体芯片的前电极上。半导体芯片的背面粘附在芯片载体上，并且半导体芯片的前电极和引脚分别与金属连接器连接。根据不同的应用要求，根据半导体芯片和金属连接器的接触区域的尺寸和形状来施加粘合材料的尺寸，形状和厚度。特别地，通过预先印刷粘合剂材料形成粘合剂区域，从而显着提高半导体产品的质量和性能，并提高生产率。

44. 发明授权

US08049315B2 Use of discrete conductive layer in semiconductor device to re-route bonding wires for semiconductor device package 有权
标题翻译：在半导体器件中使用离散导电层来重新布线用于半导体器件封装的接合线
公开(公告)号：US08049315B2
公开(公告)日：2011-11-01
申请号：US13007279
申请日：2011-01-14
申请人： Jun Lu , Anup Bhalla , Xiaobin Wang , Allen Chang , Kenny Man Sheng Hu , Xiaotian Zhang
发明人： Jun Lu , Anup Bhalla , Xiaobin Wang , Allen Chang , Kenny Man Sheng Hu , Xiaotian Zhang
IPC分类号： H01L23/495
CPC分类号： H01L21/823487 , H01L23/4952 , H01L23/49524 , H01L23/49531 , H01L23/49562 , H01L23/49575 , H01L23/58 , H01L24/37 , H01L24/39 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/85 , H01L24/91 , H01L25/071 , H01L25/074 , H01L25/18 , H01L27/088 , H01L2224/05552 , H01L2224/0603 , H01L2224/32145 , H01L2224/32245 , H01L2224/37124 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48145 , H01L2224/48247 , H01L2224/48465 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/49112 , H01L2224/4917 , H01L2224/49171 , H01L2224/49431 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2224/85 , H01L2225/06562 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H02J7/0031 , H01L2224/78 , H01L2924/00 , H01L2924/00012 , H01L2224/45099
摘要： A semiconductor package assembly may include a lead frame having a die bonding pad and plurality of leads coupled to the first die bonding pad. A vertical semiconductor device may be bonded to the die bonding pad. The device may have a conductive pad electrically connected to one lead through a first bond wire. An electrically isolated conductive trace may be formed from a layer of conductive material of the first semiconductor device. The conductive trace provides an electrically conductive path between the first bond wire and a second bond wire. The conductive path may either pass underneath a third bond wire thereby avoiding the third bond wire crossing another bond wire, or the conductive path may result in a reduced length for the first and second bond wires that is less than a predetermined maximum length.
摘要翻译：半导体封装组件可以包括引线框架，其具有管芯接合焊盘和耦合到第一管芯接合焊盘的多个引线。垂直半导体器件可以结合到芯片焊盘。该器件可以具有通过第一接合线电连接到一个引线的导电焊盘。电绝缘的导电迹线可以由第一半导体器件的导电材料层形成。导电迹线在第一接合线和第二接合线之间提供导电路径。导电路径可以通过第三接合线下方，从而避免第三接合线穿过另一接合线，或者导电路径可导致第一和第二接合线的长度小于预定最大长度。

45. 发明申请

US20110108998A1 USE OF DISCRETE CONDUCTIVE LAYER IN SEMICONDUCTOR DEVICE TO RE-ROUTE BONDING WIRES FOR SEMICONDUCTOR DEVICE PACKAGE 有权
标题翻译：在半导体器件中使用分离导电层以重新布线用于半导体器件封装
公开(公告)号：US20110108998A1
公开(公告)日：2011-05-12
申请号：US13007279
申请日：2011-01-14
申请人： Jun Lu , Anup Bhalla , Xiaobin Wang , Allen Chang , Man Sheng Hu , Xiaotian Zhang
发明人： Jun Lu , Anup Bhalla , Xiaobin Wang , Allen Chang , Man Sheng Hu , Xiaotian Zhang
IPC分类号： H01L23/52
CPC分类号： H01L21/823487 , H01L23/4952 , H01L23/49524 , H01L23/49531 , H01L23/49562 , H01L23/49575 , H01L23/58 , H01L24/37 , H01L24/39 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/85 , H01L24/91 , H01L25/071 , H01L25/074 , H01L25/18 , H01L27/088 , H01L2224/05552 , H01L2224/0603 , H01L2224/32145 , H01L2224/32245 , H01L2224/37124 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48145 , H01L2224/48247 , H01L2224/48465 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/49112 , H01L2224/4917 , H01L2224/49171 , H01L2224/49431 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2224/85 , H01L2225/06562 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H02J7/0031 , H01L2224/78 , H01L2924/00 , H01L2924/00012 , H01L2224/45099
摘要： A semiconductor package assembly may include a lead frame having a die bonding pad and plurality of leads coupled to the first die bonding pad. A vertical semiconductor device may be bonded to the die bonding pad. The device may have a conductive pad electrically connected to one lead through a first bond wire. An electrically isolated conductive trace may be formed from a layer of conductive material of the first semiconductor device. The conductive trace provides an electrically conductive path between the first bond wire and a second bond wire. The conductive path may either pass underneath a third bond wire thereby avoiding the third bond wire crossing another bond wire, or the conductive path may result in a reduced length for the first and second bond wires that is less than a predetermined maximum length.
摘要翻译：半导体封装组件可以包括引线框架，其具有管芯接合焊盘和耦合到第一管芯接合焊盘的多个引线。垂直半导体器件可以结合到芯片焊盘。该器件可以具有通过第一接合线电连接到一个引线的导电焊盘。电绝缘的导电迹线可以由第一半导体器件的导电材料层形成。导电迹线在第一接合线和第二接合线之间提供导电路径。导电路径可以通过第三接合线下方，从而避免第三接合线穿过另一接合线，或者导电路径可导致第一和第二接合线的长度小于预定最大长度。

46. 发明授权

US07884696B2 Lead frame-based discrete power inductor 有权
公开(公告)号：US07884696B2
公开(公告)日：2011-02-08
申请号：US12011489
申请日：2008-01-25
申请人： François Hébert , Tao Feng , Xiaotian Zhang , Jun Lu
发明人： François Hébert , Tao Feng , Xiaotian Zhang , Jun Lu
IPC分类号： H01F5/00
CPC分类号： H01F17/062
摘要： A lead frame-based discrete power inductor is disclosed. The power inductor includes top and bottom lead frames, the leads of which form a coil around a single closed-loop magnetic core. The coil includes interconnections between inner and outer contact sections of the top and bottom lead frames, the magnetic core being sandwiched between the top and bottom lead frames. Ones of the leads of the top and bottom lead frames have a generally non-linear, stepped configuration such that the leads of the top lead frame couple adjacent leads of the bottom lead frame about the magnetic core to form the coil.

47. 发明申请

US20150206868A1 FLIP CHIP SEMICONDUCTOR DEVICE 有权
标题翻译： FLIP芯片半导体器件
公开(公告)号：US20150206868A1
公开(公告)日：2015-07-23
申请号：US14158830
申请日：2014-01-19
申请人： Xiaotian Zhang , Hamaz Yilmaz , Jun Lu , Xiaoguang Zeng , Ming-Chen Lu
发明人： Xiaotian Zhang , Hamaz Yilmaz , Jun Lu , Xiaoguang Zeng , Ming-Chen Lu
IPC分类号： H01L25/00 , H01L25/07 , H01L23/495 , H01L21/78 , H01L25/16
CPC分类号： H01L25/50 , H01L23/49503 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L23/49575 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/92 , H01L25/072 , H01L25/165 , H01L2224/0401 , H01L2224/04034 , H01L2224/04042 , H01L2224/05552 , H01L2224/05554 , H01L2224/0603 , H01L2224/06135 , H01L2224/16245 , H01L2224/29139 , H01L2224/32245 , H01L2224/371 , H01L2224/40095 , H01L2224/40245 , H01L2224/4103 , H01L2224/48091 , H01L2224/48137 , H01L2224/48195 , H01L2224/48247 , H01L2224/48257 , H01L2224/49112 , H01L2224/49113 , H01L2224/49171 , H01L2224/73221 , H01L2224/73253 , H01L2224/73263 , H01L2224/73265 , H01L2224/83805 , H01L2224/84801 , H01L2224/8485 , H01L2224/92157 , H01L2224/92225 , H01L2224/92246 , H01L2224/92247 , H01L2924/00014 , H01L2924/12042 , H01L2924/13091 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30107 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/05599
摘要： A semiconductor device package comprises a lead frame having a die paddle comprising a first chip installation area and a second chip installation area, a recess area formed in the first chip installation area, and multiple metal pillars formed in the recess area, a notch divides the first chip installation area into a transverse base extending transversely and a longitudinal base extending longitudinally, and separates the recess area into a transverse recess part formed in the transverse base and a longitudinal recess part formed in longitudinal base; a portion of a transverse extending part connecting to an external pin extends into a portion inside of the notch.
摘要翻译：一种半导体器件封装，包括具有包括第一芯片安装区域和第二芯片安装区域的模板的引线框架，形成在第一芯片安装区域中的凹部区域和形成在凹部区域中的多个金属柱，凹口将第一芯片安装区域横向延伸的横向基部和纵向延伸的纵向基部，并且将凹部区域分离成形成在横向基部中的横向凹部和形成在纵向基部中的纵向凹部; 连接到外部销的横向延伸部分的一部分延伸到凹口内部的一部分。

48. 发明申请

US20150035129A1 STACKED MULTI - CHIP PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：堆叠多芯片包装结构及其制造方法
公开(公告)号：US20150035129A1
公开(公告)日：2015-02-05
申请号：US13955206
申请日：2013-07-31
申请人： Xiaotian Zhang , Hua Pan , Ming-Chen Lu , Jun Lu , Hamza Yilmaz
发明人： Xiaotian Zhang , Hua Pan , Ming-Chen Lu , Jun Lu , Hamza Yilmaz
IPC分类号： H01L23/495 , H01L23/00
CPC分类号： H01L25/50 , H01L21/304 , H01L21/56 , H01L21/78 , H01L22/14 , H01L23/3675 , H01L23/4334 , H01L23/492 , H01L23/49503 , H01L23/49524 , H01L23/49534 , H01L23/49562 , H01L23/49575 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/27 , H01L24/33 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/0652 , H01L25/07 , H01L2224/0401 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/0603 , H01L2224/118 , H01L2224/13022 , H01L2224/32245 , H01L2224/37013 , H01L2224/37147 , H01L2224/40095 , H01L2224/40137 , H01L2224/40145 , H01L2224/40245 , H01L2224/40247 , H01L2224/48091 , H01L2224/48106 , H01L2224/48145 , H01L2224/48177 , H01L2224/48247 , H01L2224/48465 , H01L2224/49111 , H01L2224/49113 , H01L2224/49171 , H01L2224/73263 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2224/83851 , H01L2224/84801 , H01L2224/85 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06572 , H01L2225/06589 , H01L2924/00014 , H01L2924/07802 , H01L2924/0781 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/45099
摘要： A stacked multi-chip packaging structure comprises a lead frame, a first semiconductor chip mounted on the lead frame, a second semiconductor chip flipped-chip mounted on the lead frame, a metal clip mounted on top of the first and second semiconductor chips and a third semiconductor chip stacked on the meal clip; bonding wires electrically connecting electrodes on the third semiconductor chip to the first and second semiconductor chips and the pins of the lead frame; plastic molding encapsulating the lead frame, the chips and the metal clip.
摘要翻译：堆叠多芯片封装结构包括引线框架，安装在引线框架上的第一半导体芯片，安装在引线框架上的第二半导体芯片翻转芯片，安装在第一和第二半导体芯片顶部的金属夹子和第三个半导体芯片堆叠在餐夹上; 将第三半导体芯片上的电极电连接到第一和第二半导体芯片和引线框架的引脚的接合线; 塑料成型封装引线框架，芯片和金属夹。

49. 发明授权

US08484318B2 Method, apparatus and system for upgrading through multicast 有权
标题翻译：通过组播升级的方法，设备和系统
公开(公告)号：US08484318B2
公开(公告)日：2013-07-09
申请号：US13052566
申请日：2011-03-21
申请人： Xiaotian Zhang , Junxia Xu
发明人： Xiaotian Zhang , Junxia Xu
IPC分类号： G06F15/16 , G06F15/173
CPC分类号： H04L12/1895 , H04L41/04 , H04L41/082
摘要： A method for upgrading a device through multicast is disclosed. The method includes: monitoring a common channel of a multicast server, where information about all subfiles of a current packaged mirror file is multicast in the common channel; obtaining information about a subfile required for upgrading the device from packets in the common channel, where the information includes an address of a subchannel that bears the subfile on the multicast server; and switching to the subchannel according to the address of the subchannel that bears the subfile required for upgrade, receiving the subfile multicast in the subchannel, and validating the subfile. Further, an apparatus and system for upgrading a device through multicast are disclosed. The technical solution under the present invention can upgrade both a single-system or single-module device and a multi-system or multi-module device through multicast, the time required for upgrading the devices is reduced, and the upgrade status of the devices can be tracked in real time.
摘要翻译：公开了一种通过组播升级设备的方法。该方法包括：监视多播服务器的公共信道，其中当前打包的镜像文件的所有子文件的信息在公共信道中进行多播; 获取关于从所述公共信道的数据包升级所述设备所需的子文件的信息，其中所述信息包括在所述多播服务器上承载所述子文件的子信道的地址; 根据承载升级所需子文件的子信道的地址切换到子信道，接收子信道中的子文件多播，并验证子文件。此外，公开了一种通过多播来升级设备的装置和系统。本发明的技术方案可以通过组播来升级单系统或单模块设备，多系统或多模块设备，降低设备升级所需的时间，设备的升级状态可以被实时追踪。

50. 发明申请

US20120322207A1 SEMICONDUCTOR PACKAGE WITH ADHESIVE MATERIAL PRE-PRINTED ON THE LEAD FRAME AND CHIP, AND ITS MANUFACTURING METHOD 有权
标题翻译：在铅框架和芯片上预先印刷的粘合材料的半导体封装及其制造方法
公开(公告)号：US20120322207A1
公开(公告)日：2012-12-20
申请号：US13545225
申请日：2012-07-10
申请人： Xiaotian Zhang , Jun Lu
发明人： Xiaotian Zhang , Jun Lu
IPC分类号： H01L21/60
CPC分类号： H01L24/37 , H01L23/3107 , H01L23/49513 , H01L23/4952 , H01L23/49562 , H01L24/05 , H01L24/06 , H01L24/27 , H01L24/29 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/83 , H01L24/84 , H01L2224/04042 , H01L2224/05 , H01L2224/0603 , H01L2224/2919 , H01L2224/32245 , H01L2224/371 , H01L2224/40245 , H01L2224/4103 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48247 , H01L2224/48599 , H01L2224/48699 , H01L2224/48799 , H01L2224/49111 , H01L2224/73221 , H01L2224/73265 , H01L2224/83192 , H01L2224/83855 , H01L2224/83856 , H01L2224/8585 , H01L2224/92 , H01L2224/92247 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2224/83 , H01L2224/84 , H01L2924/00 , H01L2924/3512 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： This invention discloses a semiconductor package with adhesive material pre-printed on the lead frame and chip, and the manufacturing method. The adhesive material is applied onto the chip carrier and the pin of the lead frame and also on the front electrode of the semiconductor chip via pre-printing. The back of the semiconductor chip is adhered on the chip carrier, and the front electrode of the semiconductor chip and the pin are connected respectively with a metal connector. The size, shape and thickness of the adhesive material are applied according to different application requirements according to size and shapes of the contact zone of the semiconductor chip and the metal connector. Particularly, the adhesive zones are formed by pre-printing the adhesive material thus significantly enhance the quality and performance of semiconductor products, and improves the productivity.
摘要翻译：本发明公开了一种半导体封装，其具有预先印刷在引线框架和芯片上的粘合剂材料及其制造方法。粘合剂材料通过预打印被施加到芯片载体和引线框架的引脚以及半导体芯片的前电极上。半导体芯片的背面粘附在芯片载体上，并且半导体芯片的前电极和引脚分别与金属连接器连接。根据不同的应用要求，根据半导体芯片和金属连接器的接触区域的尺寸和形状来施加粘合材料的尺寸，形状和厚度。特别地，通过预先印刷粘合剂材料形成粘合剂区域，从而显着提高半导体产品的质量和性能，并提高生产率。

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