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1. 发明授权

US09882602B2 Global navigation satellite system receiver with filter bypass mode for improved sensitivity 有权
公开(公告)号：US09882602B2
公开(公告)日：2018-01-30
申请号：US13172653
申请日：2011-06-29
申请人： Prasad Srinivasa Siva Gudem , Liang Zhao , I-Hsiang Lin , Zhijie Xiong , Bhushan Shanti Asuri , Aristotele Hadjichristos
发明人： Prasad Srinivasa Siva Gudem , Liang Zhao , I-Hsiang Lin , Zhijie Xiong , Bhushan Shanti Asuri , Aristotele Hadjichristos
IPC分类号： H04B1/3805 , H04B1/525
CPC分类号： H04B1/525 , H04B1/3805
摘要： A global navigation satellite system receiver with filter bypass mode for improved sensitivity is disclosed. In an aspect, an apparatus is provided that includes a non-bypass signal path coupled to a receiver, the non-bypass signal path comprising a filter. The apparatus also includes a bypass signal path coupled to the receiver, the bypass signal path configure to bypass the filter, and a switch to couple an antenna to the non-bypass signal path during time intervals when signals transmitted by an unrelated local transmitter are transmitted with a signal power that exceeds a selected threshold, and to couple the antenna to the bypass signal path during other time intervals.

2. 发明授权

US09696820B2 Position indication device and position indication method 有权
公开(公告)号：US09696820B2
公开(公告)日：2017-07-04
申请号：US14270720
申请日：2012-05-30
申请人： Liang Zhao
发明人： Liang Zhao
IPC分类号： G06F3/033 , G06F3/0354 , G06F3/044 , G06F3/041 , G06F3/046
CPC分类号： G06F3/03545 , G06F3/0418 , G06F3/044 , G06F3/046
摘要： The present invention relates to digital circuit processing and provides a position indication device and a position indication method. In order to improve positioning accuracy of the position indication device without degrading its sensitivity, a position indication device is provided. The device comprises: a voltage dividing circuit connected with a resonant circuit and a rectifying and filtering circuit. The voltage dividing circuit obtains a predetermined proportion of a signal output from the resonant circuit and outputs it to the rectifying and filtering circuit. The present invention is applicable to digital handwriting pens.

3. 发明申请

US20160155688A9 METHOD FOR PACKAGING A POWER DEVICE WITH BOTTOM SOURCE ELECTRODE 有权
公开(公告)号：US20160155688A9
公开(公告)日：2016-06-02
申请号：US14033140
申请日：2013-09-20
申请人： Yan Xun Xue , Yueh-Se Ho , Hamza Yilmaz , Jun Lu , Lei Shi , Liang Zhao , Ping Huang
发明人： Yan Xun Xue , Yueh-Se Ho , Hamza Yilmaz , Jun Lu , Lei Shi , Liang Zhao , Ping Huang
IPC分类号： H01L23/495
CPC分类号： H01L23/49537 , H01L23/49541 , H01L23/49548 , H01L23/49551 , H01L23/49562 , H01L23/49575 , H01L2224/16245 , H01L2924/13091 , H01L2924/00
摘要： A power semiconductor package has an ultra thin chip with front side molding to reduce substrate resistance; a lead frame unit with grooves located on both side leads provides precise positioning for connecting numerous bridge-shaped metal clips to the front side of the side leads. The bridge-shaped metal clips are provided with bridge structure and half or fully etched through holes for relieving superfluous solder during manufacturing process.

4. 发明申请

US20160024897A1 Well Screen Assembly with Extending Screen 审中-公开
标题翻译：具有扩展屏幕的屏幕组合
公开(公告)号：US20160024897A1
公开(公告)日：2016-01-28
申请号：US14776009
申请日：2013-04-01
申请人： Stephen Michael Greci , Matthew Franklin , James J. Kang , Aaron James Bonner , Luke William Holderman , Jean Marc Lopez , Liang Zhao , Michael Fripp
发明人： Stephen Michael Greci , Matthew Franklin , James J. Kang , Aaron James Bonner , Luke William Holderman , Jean Marc Lopez , Liang Zhao , Michael Fripp
IPC分类号： E21B43/10 , E21B43/08
CPC分类号： E21B43/108 , E21B43/08 , E21B43/103 , E21B43/105
摘要： A well screen assembly residing in a well bore has a base pipe and a filtration screen carried on the base pipe. The screen is radially extended with force from fluid while maintaining the base pipe radially unextended.
摘要翻译：位于井筒中的井筛组件具有基管和承载在基管上的过滤网。屏幕由流体的力径向延伸，同时保持基管径向未延伸。

5. 发明授权

US08973158B2 Trust level activation 有权
标题翻译：信任级激活
公开(公告)号：US08973158B2
公开(公告)日：2015-03-03
申请号：US13186474
申请日：2011-07-20
申请人： Saji Abraham , Hart Wilson , Tassaduq Basu , Sermet Iskin , Liang Zhao
发明人： Saji Abraham , Hart Wilson , Tassaduq Basu , Sermet Iskin , Liang Zhao
IPC分类号： H04L29/06 , G06F21/53
CPC分类号： G06F21/604 , G06F21/51 , G06F21/52 , G06F21/53 , G06F2221/2113
摘要： An isolation execution environment provides an application with limited resources to execute an application. The application may require access to secured resources associated with a particular trust level that are outside of the isolation execution environment. A trust activation engine determines the trust level associated with a request for a resource and operates differently based on the trust level. A broker process may be used to execute components providing access to resources having a partial trust level in an execution environment that is separate from the isolation execution environment.
摘要翻译：隔离执行环境为应用程序提供有限的资源来执行应用程序。应用程序可能需要访问与隔离执行环境之外的特定信任级别相关联的安全资源。信任激活引擎确定与资源请求相关联的信任级别，并基于信任级别进行不同的操作。代理进程可以用于执行提供对具有与隔离执行环境分离的执行环境中的部分信任级别的资源的访问的组件。

6. 发明申请

US20140242756A1 METHOD FOR PREPARING SEMICONDUCTOR DEVICES APPLIED IN FLIP CHIP TECHNOLOGY 有权
标题翻译：用于制备应用于芯片技术的半导体器件的方法
公开(公告)号：US20140242756A1
公开(公告)日：2014-08-28
申请号：US13775212
申请日：2013-02-24
申请人： Yan Xun Xue , Ping Huang , Hamza Yilmaz , Yueh-Se Ho , Lei Shi , Liang Zhao , Ping Li Wu , Lei Duan , Yuping Gong
发明人： Yan Xun Xue , Ping Huang , Hamza Yilmaz , Yueh-Se Ho , Lei Shi , Liang Zhao , Ping Li Wu , Lei Duan , Yuping Gong
IPC分类号： H01L21/78
CPC分类号： H01L21/78 , H01L21/561 , H01L23/3114 , H01L24/11 , H01L24/13 , H01L24/73 , H01L2224/1184 , H01L2224/13101 , H01L2224/13111 , H01L2224/13147 , H01L2224/29 , H01L2224/2919 , H01L2224/73104 , H01L2224/83191 , H01L2924/10156 , H01L2924/10157 , H01L2924/13091 , H01L2924/18301 , H01L2924/00 , H01L2924/00014 , H01L2924/014
摘要： A method for preparing semiconductor devices in a flip chip process comprises forming deep grooves surrounding each of the semiconductor chips; depositing a first plastic package material to form a first plastic package layer covering front surface of the semiconductor wafer and filling the deep grooves; depositing a metal layer at back surface of the semiconductor wafer after grinding; grinding an outermost portion of the metal layer thus forming a ring area located at back surface around edge of the semiconductor wafer not covered by the metal layer; cutting the first plastic package layer, the semiconductor wafer, the metal layer and the first plastic package material filled in the deep grooves along a straight line formed by two ends of each of the deep grooves filled with the first plastic package material; and picking up the semiconductor devices and mounting on a substrate without flipping the semiconductor devices.
摘要翻译：一种用于在倒装芯片工艺中制备半导体器件的方法包括形成围绕每个半导体芯片的深槽; 沉积第一塑料封装材料以形成覆盖半导体晶片的前表面并填充深槽的第一塑料封装层; 在研磨后在半导体晶片的背面沉积金属层; 研磨金属层的最外部分，从而形成位于未被金属层覆盖的半导体晶片的边缘周围的背面的环形区域; 沿着由填充有第一塑料包装材料的每个深槽的两端形成的直线切割填充在深槽中的第一塑料封装层，半导体晶片，金属层和第一塑料封装材料; 并且拾取半导体器件并安装在衬底上，而不会翻转半导体器件。

7. 发明申请

US20140191334A1 STACKED POWER SEMICONDUCTOR DEVICE USING DUAL LEAD FRAME 有权
标题翻译：堆叠功率半导体器件使用双引线框架
公开(公告)号：US20140191334A1
公开(公告)日：2014-07-10
申请号：US13734201
申请日：2013-01-04
申请人： Yan Xun Xue , Yueh-Se Ho , Lei Shi , Jun Lu , Liang Zhao
发明人： Yan Xun Xue , Yueh-Se Ho , Lei Shi , Jun Lu , Liang Zhao
IPC分类号： H01L23/495 , H01L27/088
CPC分类号： H01L23/49575 , H01L23/49524 , H01L23/49537 , H01L23/49562 , H01L24/34 , H01L24/37 , H01L24/40 , H01L24/41 , H01L27/088 , H01L2224/37011 , H01L2224/371 , H01L2224/4007 , H01L2224/40095 , H01L2224/40245 , H01L2224/48091 , H01L2224/48247 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/01322 , H01L2924/13091 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A stacked power semiconductor device includes vertical metal oxide semiconductor field-effect transistors and dual lead frames packaged with flip-chip technology. In the method of manufacturing the stacked power semiconductor device, a first semiconductor chip is flip chip mounted on the first lead frame. A mounting clips is connected to the electrode at back side of the first semiconductor chip. A second semiconductor chip is mounted on the second lead frame, which is then flipped and stacked on the mounting clip.
摘要翻译：叠层功率半导体器件包括垂直金属氧化物半导体场效应晶体管和采用倒装芯片技术封装的双引线框架。在制造堆叠式功率半导体器件的方法中，第一半导体芯片是安装在第一引线框上的倒装芯片。安装夹在第一半导体芯片的背面连接到电极。第二半导体芯片安装在第二引线框架上，然后翻转并堆叠在安装夹上。

8. 发明授权

US08752628B2 Fluid flow control using channels 失效
标题翻译：使用通道的流体流量控制
公开(公告)号：US08752628B2
公开(公告)日：2014-06-17
申请号：US13990243
申请日：2012-06-26
申请人： Liang Zhao , Jason D. Dykstra , Michael Linley Fripp
发明人： Liang Zhao , Jason D. Dykstra , Michael Linley Fripp
IPC分类号： E21B34/06 , F15C1/16
CPC分类号： E21B34/06 , B01D17/0217 , E21B43/12 , E21B43/14 , Y10T137/2093 , Y10T137/2115
摘要： A fluid flow control device disposable in a bore can include channels that can direct fluid flow based on one or more properties of the fluid more robustly. The channels may include a side channel between two other channels. The side channel can allow fluid flow to affect fluid flowing in one of the channels. Devices according to some aspects can differentiate between fluids having close, but different, properties and direct the fluid accordingly. Examples of fluid properties based on which the device can direct fluid include fluid density, fluid velocity, fluid viscosity, and Reynolds number of the fluid flow.
摘要翻译：一次性在孔中的流体流量控制装置可以包括能够更鲁棒地基于流体的一种或多种性质来引导流体流动的通道。信道可以包括两个其它信道之间的侧信道。侧通道可以允许流体流动影响在一个通道中流动的流体。根据一些方面的装置可以区分具有接近但不同的性质并且相应地引导流体的流体。液体特性的例子基于该装置可以引导流体包括流体密度，流体速度，流体粘度和流体流的雷诺数。

9. 发明授权

US08743613B2 Timing control in synchronous memory data transfer 有权
标题翻译：同步存储器数据传输中的时序控制
公开(公告)号：US08743613B2
公开(公告)日：2014-06-03
申请号：US13607810
申请日：2012-09-10
申请人： Kailai Wang , Liang Zhao
发明人： Kailai Wang , Liang Zhao
IPC分类号： G11C16/06 , G11C7/10
CPC分类号： G11C16/06 , G11C7/1066 , G11C7/1078 , G11C7/1093
摘要： A solid-state memory device has a memory interface that includes a timing signal port for receiving a timing signal, a data transfer port, a data transfer module for transferring blocks of data signals between the data transfer port and the memory module, and a selectable delay module for providing a selected delay between transitions in the data signals DQ and transitions in the timing signals DQS. The memory interface also has a delay controller for setting the selected delay, for detecting a variation in a delay produced by the selectable delay module relative to a reference delay, for controlling a pause in transfer of a block of the data signals DQ, and for adjusting the selected delay during the pause.
摘要翻译：固态存储器件具有存储器接口，其包括用于接收定时信号的定时信号端口，数据传输端口，用于在数据传输端口和存储器模块之间传送数据信号块的数据传输模块，以及可选择的延迟模块，用于在数据信号DQ的转换和定时信号DQS中的转换之间提供选定的延迟。存储器接口还具有延迟控制器，用于设置所选择的延迟，用于检测由可选择的延迟模块相对于参考延迟产生的延迟的变化，用于控制数据信号DQ的块的传送中的暂停，并且为在暂停期间调整所选择的延迟。

10. 发明授权

US08576768B2 Hybrid multi-band receiver 失效
标题翻译：混合多频段接收机
公开(公告)号：US08576768B2
公开(公告)日：2013-11-05
申请号：US12425285
申请日：2009-04-16
申请人： Liang Zhao , Roger Brockenbrough , Michael Kohlmann , Cormac S. Conroy , Anup Savla
发明人： Liang Zhao , Roger Brockenbrough , Michael Kohlmann , Cormac S. Conroy , Anup Savla
IPC分类号： H04B7/185 , H04B1/40
CPC分类号： H04B1/0075 , H04B1/0007 , H04B1/005 , H04B1/0064
摘要： The subject matter disclosed herein relates to a system and method for processing wireless signals received from one or more communications systems. In a particular implementation, one or more signals received from one or more communication systems such as a GNSS may be processed in two or more separate wireless signal receiver paths and combined in baseband to share one analog-to-digital converter.
摘要翻译：本文公开的主题涉及用于处理从一个或多个通信系统接收的无线信号的系统和方法。在特定实现中，从一个或多个通信系统（诸如GNSS）接收到的一个或多个信号可以在两个或更多个分离的无线信号接收机路径中进行处理，并在基带中组合以共享一个模 - 数转换器。

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