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41. 发明授权

US08848305B2 Systems and methods for hard decision based ITI cancellation 有权
标题翻译：基于ITI取消决策的系统和方法
公开(公告)号：US08848305B2
公开(公告)日：2014-09-30
申请号：US13618317
申请日：2012-09-14
申请人： Jun Xiao , Erich F. Haratsch , Fan Zhang
发明人： Jun Xiao , Erich F. Haratsch , Fan Zhang
IPC分类号： G11B5/09
CPC分类号： G11B20/10009 , G11B5/012 , G11B5/09 , G11B20/10046 , G11B20/1037 , G11B2020/185 , G11B2220/2516
摘要： Embodiments of the present inventions are related to systems and methods for data processing, and more particularly to systems and methods for reducing inter-track interference in relation to processing data retrieved from a storage medium.
摘要翻译：本发明的实施例涉及用于数据处理的系统和方法，更具体地涉及用于减少与从存储介质检索的处理数据相关的轨道间干扰的系统和方法。

42. 发明授权

US08830612B2 Hardware-based inter-track interference mitigation in magnetic recording systems with read channel storage of cancelation data 有权
标题翻译：磁记录系统中基于硬件的轨道间干扰减轻，具有取消数据的读取通道存储
公开(公告)号：US08830612B2
公开(公告)日：2014-09-09
申请号：US13460204
申请日：2012-04-30
申请人： Kurt J. Worrell , Erich F. Haratsch
发明人： Kurt J. Worrell , Erich F. Haratsch
IPC分类号： G11B5/09 , G11B5/012 , G11B19/04
CPC分类号： G11B5/09 , G11B5/012 , G11B19/045
摘要： Hardware-based methods and apparatus are provided for inter-track interference mitigation in magnetic recording systems. Inter-track interference (ITI) cancellation data is stored in a memory of a read channel of a magnetic recording system. The memory can be in a write data path or a read data path of the read channel. The inter-track interference cancellation data is optionally provided to an inter-track interference mitigation circuit using at least a portion of a write data path, for example, based on a control signal. The storage of the inter-track interference cancellation data can be in response to a second control signal.
摘要翻译：提供基于硬件的方法和装置用于磁记录系统中的轨道间干扰减轻。轨道间干扰（ITI）抵消数据被存储在磁记录系统的读通道的存储器中。存储器可以在读取通道的写入数据路径或读取数据路径中。可以例如基于控制信号，使用写数据路径的至少一部分，将轨道间干扰消除数据任选地提供给轨道间干扰减轻电路。轨道间干扰消除数据的存储可以响应于第二控制信号。

43. 发明申请

US20140052893A1 FILE DELETION FOR NON-VOLATILE MEMORY 审中-公开
标题翻译：非易失性存储器的文件删除
公开(公告)号：US20140052893A1
公开(公告)日：2014-02-20
申请号：US13585933
申请日：2012-08-15
申请人： Fan Zhang , Zongwang Li , Ming Jin , Erich F. Haratsch
发明人： Fan Zhang , Zongwang Li , Ming Jin , Erich F. Haratsch
IPC分类号： G06F12/00
CPC分类号： G06F12/0246
摘要： A device includes non-volatile memory and a controller. The controller receives a write request including data and a logical address associated with a file. The controller stores the data at a data storage segment having a physical address and associates the physical address with the logical address and a file identifier for the file. The controller receives a second write request including data and the logical address associated with the file. The controller stores the data at a second data storage segment having a second physical address and associates the second physical address with the logical address and the file identifier. When a file delete request for the file is received, the controller identifies the first physical address and the second physical address using the file identifier and erases the information stored at the first data storage segment and the second data storage segment based upon the file identification.
摘要翻译：设备包括非易失性存储器和控制器。控制器接收包括数据和与文件相关联的逻辑地址的写入请求。控制器将数据存储在具有物理地址的数据存储段处，并将物理地址与逻辑地址和文件的文件标识符相关联。控制器接收包括数据和与文件相关联的逻辑地址的第二写入请求。控制器将数据存储在具有第二物理地址的第二数据存储段，并将第二物理地址与逻辑地址和文件标识符相关联。当接收到文件的文件删除请求时，控制器使用文件标识符识别第一物理地址和第二物理地址，并且基于文件标识擦除存储在第一数据存储段和第二数据存储段的信息。

44. 发明授权

US08635516B2 Method and apparatus for joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations 有权
标题翻译：用于在多个符号持续时间内传输的多维码的联合均衡和解码的方法和装置
公开(公告)号：US08635516B2
公开(公告)日：2014-01-21
申请号：US13302707
申请日：2011-11-22
申请人： Kameran Azadet , Erich F. Haratsch
发明人： Kameran Azadet , Erich F. Haratsch
IPC分类号： H03M13/03
CPC分类号： H04L25/03006 , H03M13/256 , H03M13/39 , H03M13/3961 , H03M13/4107 , H03M13/6331 , H04L25/03305
摘要： A method and apparatus are disclosed for performing joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations. An RSSE scheme is disclosed that cancels the intrasymbol interference caused by other symbol components within the same multidimensional code symbol. The disclosed RSSE technique for multidimensional codes applies where the number of trellis code dimensions exceeds the number of channels. The disclosed RSSE decoder computes the intersymbol interference caused by previously decoded multidimensional code symbols and subtracts the intersymbol interference from the received signal. In addition, a branch metrics unit compensates for the intrasymbol interference caused by other symbol components within the same multidimensional code symbol.
摘要翻译：公开了一种用于执行在多个符号持续时间上发送的多维码的联合均衡和解码的方法和装置。公开了一种RSSE方案，其消除由同一多维码符号内的其他符号分量引起的内部符号干扰。所披露的用于多维码的RSSE技术适用于网格码数量超过信道数量的地方。所公开的RSSE解码器计算由先前解码的多维码符号引起的符号间干扰，并从接收信号中减去符号间干扰。此外，分支度量单元补偿由相同的多维码符号内的其他符号分量引起的内部符号干扰。

45. 发明授权

US08429500B2 Methods and apparatus for computing a probability value of a received value in communication or storage systems 有权
标题翻译：用于计算通信或存储系统中的接收值的概率值的方法和装置
公开(公告)号：US08429500B2
公开(公告)日：2013-04-23
申请号：US12751960
申请日：2010-03-31
申请人： Erich F. Haratsch , Nenad Miladinovic , Andrei Vityaev
发明人： Erich F. Haratsch , Nenad Miladinovic , Andrei Vityaev
IPC分类号： G11C29/00
CPC分类号： H03M13/612 , H03M13/1102 , H03M13/2957 , H03M13/3905 , H03M13/41 , H03M13/4138 , H04L1/005
摘要： Methods and apparatus are provided for computing a probability value of a received value in communication or storage systems. A probability value for a received value in a communication system or a memory device is computed by obtaining at least one received value; identifying a segment of a function corresponding to the received value, wherein the function is defined over a plurality of segments, wherein each of the segments has an associated set of parameters; and calculating the probability value using the set of parameters associated with the identified segment. A probability value for a received value in a communication system or a memory device can also be computed by calculating the probability value for the received value using a first distribution, wherein the first distribution is predefined and wherein a mapped version of the first distribution approximates a distribution of the received values and wherein the calculating step is implemented by a processor, a controller, a read channel, a signal processing unit or a decoder.
摘要翻译：提供了用于计算通信或存储系统中的接收值的概率值的方法和装置。通过获得至少一个接收值来计算通信系统或存储设备中的接收值的概率值; 识别对应于所接收的值的功能的片段，其中所述功能在多个片段上被定义，其中所述片段中的每个片段具有相关联的参数组; 以及使用与所识别的段相关联的参数集来计算概率值。也可以通过使用第一分布计算接收值的概率值来计算通信系统或存储器件中的接收值的概率值，其中第一分布是预定义的，并且其中第一分布的映射版本近似于分配接收值，其中计算步骤由处理器，控制器，读通道，信号处理单元或解码器来实现。

46. 发明申请

US20130083417A1 Hardware-Based Methods And Apparatus For Inter-Track Interference Mitigation In Magnetic Recording Systems 有权
标题翻译：基于硬件的方法和装置用于磁记录系统中的轨道间干扰减轻
公开(公告)号：US20130083417A1
公开(公告)日：2013-04-04
申请号：US13250246
申请日：2011-09-30
申请人： Kurt J. Worrell , Erich F. Haratsch , Changyou Xu , Jefferson E. Singleton , Kripa Venkatachalam , David G. Springberg
发明人： Kurt J. Worrell , Erich F. Haratsch , Changyou Xu , Jefferson E. Singleton , Kripa Venkatachalam , David G. Springberg
IPC分类号： G11B5/09
CPC分类号： G11B5/09 , G11B5/012 , G11B19/045
摘要： Hardware-based methods and apparatus are provided for inter-track interference mitigation in magnetic recording systems. Inter-track interference (ITI) is mitigated in a magnetic recording system by obtaining ITI cancellation data; and providing the ITI cancellation data to an ITI mitigation circuit using a write data path in the magnetic recording system. The write data path can optionally operate substantially simultaneously with the read data path performing the read operation. The ITI cancellation data comprises, for example, user data and/or media data.
摘要翻译：提供基于硬件的方法和装置用于磁记录系统中的轨道间干扰减轻。通过获取ITI取消数据，在磁记录系统中减轻了轨道间干扰（ITI）。以及使用磁记录系统中的写数据路径将ITI消除数据提供给ITI缓解电路。写入数据路径可以可选地与执行读取操作的读取数据路径同时操作。 ITI取消数据例如包括用户数据和/或媒体数据。

47. 发明申请

US20130054663A1 Determining Coefficients For Digital Low Pass Filter Given Cutoff And Boost Values For Corresponding Analog Version 有权
标题翻译：确定数字低通滤波器的系数给定相应模拟版本的截止和升压值
公开(公告)号：US20130054663A1
公开(公告)日：2013-02-28
申请号：US13215810
申请日：2011-08-23
申请人： Nayak Ratnakar Aravind , Erich F. Haratsch
发明人： Nayak Ratnakar Aravind , Erich F. Haratsch
IPC分类号： G06F17/10
CPC分类号： H03H17/0294 , G11B20/10018 , G11B20/10027 , G11B20/10046 , G11B2220/2508 , H03H17/04 , H03H17/0685
摘要： Methods and apparatus are provided for determining coefficients for a digital low pass filter, given cutoff and boost values for a corresponding analog version of the digital low pass filter. Coefficients are determined for a digital low pass filter by obtaining cutoff and boost values for a corresponding analog version of the digital low pass filter; and determining the coefficients for the digital low pass filter based on the obtained cutoff and boost values. The coefficients can be determined, for example, by generating a transfer function, H(s), for the corresponding analog version using the obtained cutoff and boost values: transforming the transfer function, H(s), to a frequency domain characterization, H(z), using one or more bilinear transforms to obtain a plurality of coefficients for an infinite impulse response (IIR) filter; generating the IIR filter using the plurality of coefficients for the IIR filter; and applying an impulse to the IIR filter to obtain the one or more coefficients for the digital low pass filter. In another variation, the coefficients are pre-computed and obtained from a look-up table.
摘要翻译：提供了用于确定用于数字低通滤波器的相应模拟版本的数字低通滤波器的给定截止值和升压值的系数的方法和装置。通过获得数字低通滤波器的相应模拟版本的截止值和升压值，为数字低通滤波器确定系数; 以及基于所获得的截止和升压值来确定数字低通滤波器的系数。可以例如通过使用获得的截止值和升压值为相应模拟版本生成传递函数H（s）来确定系数：将传递函数H（s）转换为频域表征，H （z），使用一个或多个双线性变换来获得用于无限脉冲响应（IIR）滤波器的多个系数; 使用所述IIR滤波器的所述多个系数产生所述IIR滤波器; 并向IIR滤波器施加脉冲以获得用于数字低通滤波器的一个或多个系数。在另一个变体中，系数被预先计算并从查找表中获得。

48. 发明授权

US07702989B2 Systems and methods for generating erasure flags 有权
标题翻译：用于生成擦除标志的系统和方法
公开(公告)号：US07702989B2
公开(公告)日：2010-04-20
申请号：US11535540
申请日：2006-09-27
申请人： Nils Graef , Erich F. Haratsch
发明人： Nils Graef , Erich F. Haratsch
IPC分类号： H03M13/00 , G06F11/00 , G11C29/00
CPC分类号： G11C7/1006 , G11C7/1051 , G11C7/1063 , G11C2029/0411
摘要： Various systems and methods for generating error indications are disclosed herein. In some cases, the error indication is used as an erasure pointer in a memory access system. As one particular example, a system for generating an erasure pointer is disclosed that includes accumulating a number of error values into an overall error value, and comparing the overall error value to an error threshold. When the overall error value exceeds the error threshold, an erasure pointer is generated. In one particular case, the error values are derived from a look up table using thermometer codes generated by an analog to digital converter. In other cases, the error values are derived from comparing a soft output with a reliability threshold.
摘要翻译：本文公开了用于产生误差指示的各种系统和方法。在某些情况下，错误指示用作存储器访问系统中的擦除指针。作为一个具体示例，公开了一种用于生成擦除指针的系统，其包括将多个错误值累积到总体错误值中，并将整体误差值与错误阈值进行比较。当总体错误值超过错误阈值时，产生擦除指针。在一个特定情况下，使用由模数转换器产生的温度计代码从查找表中导出误差值。在其他情况下，误差值是通过将软输出与可靠性阈值进行比较得出的。

49. 发明申请

US20090187813A1 Methods and Apparatus for Reduced Complexity Soft-Output Viterbi Detection 失效
标题翻译：降低复杂度软输出维特比检测的方法和装置
公开(公告)号：US20090187813A1
公开(公告)日：2009-07-23
申请号：US12017547
申请日：2008-01-22
申请人： Erich F. Haratsch
发明人： Erich F. Haratsch
IPC分类号： H03M13/41 , G06F11/08
CPC分类号： H03M13/4107 , H03M13/6569 , H03M13/6577 , H03M13/6588
摘要： Methods and apparatus are provided for reduced complexity Soft-Output Viterbi detection. A Soft-Output Viterbi algorithm processes a signal by determining branch metrics using a branch metrics unit; determining survivor paths for sequence detection using a first add-compare select unit; and determining survivor paths for generating one or more bit reliability values using a second add-compare select unit, wherein the first and second add-compare select units process the branch metrics determined by the branch metrics unit. The first and second add-compare select units can optionally process branch metrics having a different number of bits. A sequence detector is provided that comprises a branch metrics unit for determining branch metrics having a first precision; a programmable precision conversion unit for converting the branch metrics having the first precision to branch metrics having a desired precision; and an add-compare select unit for computing path metrics based on the desired precision branch metrics. The Soft-Output Viterbi processor optionally processes a trellis having a reduced number of states relative to a trellis processed by the sequence detector.
摘要翻译：提供了降低复杂性的软输出维特比检测方法和装置。软输出维特比算法通过使用分支度量单位确定分支度量来处理信号; 使用第一加法比较选择单元确定用于序列检测的幸存路径; 以及确定用于使用第二加法比较选择单元生成一个或多个比特可靠性值的幸存路径，其中所述第一和第二加法比较选择单元处理由所述分支度量单元确定的分支度量。第一和第二加法比较选择单元可以可选地处理具有不同位数的分支度量。提供了一种序列检测器，其包括用于确定具有第一精度的分支度量的分支度量单元; 用于将具有第一精度的分支度量转换成具有期望精度的分支度量的可编程精度转换单元; 以及用于基于期望的精度分支度量来计算路径度量的加法比较选择单元。软输出维特比处理器可选地处理具有相对于由序列检测器处理的网格的状态数量减少的网格。

50. 发明申请

US20090185643A1 Methods and Apparatus for Map Detection with Reduced Complexity 有权
标题翻译：降低复杂度的地图检测方法与装置
公开(公告)号：US20090185643A1
公开(公告)日：2009-07-23
申请号：US12017765
申请日：2008-01-22
申请人： Kelly K. Fitzpatrick , Erich F. Haratsch
发明人： Kelly K. Fitzpatrick , Erich F. Haratsch
IPC分类号： H04L27/06
CPC分类号： G11B5/09 , H03M13/3905 , H03M13/395 , H03M13/6343 , H03M13/6502 , H04L1/0055 , H04L1/0066
摘要： Methods and apparatus are provided for high-speed, low-power, high-performance channel detection. A soft output channel detector is provided that operates at a rate of 1/N and detects N bits per 1/N-rate clock cycle. The channel detector comprises a plurality, D, of MAP detectors operating in parallel, wherein each of the MAP detectors generates N/D log-likelihood ratio values per 1/N-rate clock cycle and wherein at least one of the plurality of MAP detectors constrains each of the bits. The log-likelihood ratio values can be merged to form an output sequence. A single MAP detector is also provided that comprises a forward detector for calculating forward state metrics; a backward detector for calculating backward state metrics; and a current branch detector for calculating a current branch metric, wherein at least two of the forward detector, the backward detector and the current branch detector employ different trellis structures.
摘要翻译：提供了高速，低功耗，高性能通道检测的方法和装置。提供了以1 / N的速率操作的软输出通道检测器，并且每1 / N速率时钟周期检测N位。信道检测器包括并行操作的多个MAP检测器，其中每个MAP检测器每1 / N速率时钟周期产生N / D对数似然比值，并且其中多个MAP检测器中的至少一个限制每个位。对数似然比值可以合并形成输出序列。还提供单个MAP检测器，其包括用于计算前向状态度量的前向检测器; 用于计算后向状态度量的反向检测器; 以及用于计算当前分支量度的当前分支检测器，其中所述正向检测器，所述后向检测器和所述当前支路检测器中的至少两个采用不同的格状结构。

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