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1. 发明授权

US08848305B2 Systems and methods for hard decision based ITI cancellation 有权
标题翻译：基于ITI取消决策的系统和方法
公开(公告)号：US08848305B2
公开(公告)日：2014-09-30
申请号：US13618317
申请日：2012-09-14
申请人： Jun Xiao , Erich F. Haratsch , Fan Zhang
发明人： Jun Xiao , Erich F. Haratsch , Fan Zhang
IPC分类号： G11B5/09
CPC分类号： G11B20/10009 , G11B5/012 , G11B5/09 , G11B20/10046 , G11B20/1037 , G11B2020/185 , G11B2220/2516
摘要： Embodiments of the present inventions are related to systems and methods for data processing, and more particularly to systems and methods for reducing inter-track interference in relation to processing data retrieved from a storage medium.
摘要翻译：本发明的实施例涉及用于数据处理的系统和方法，更具体地涉及用于减少与从存储介质检索的处理数据相关的轨道间干扰的系统和方法。

2. 发明申请

US20140078608A1 Systems and Methods for Hard Decision Based ITI Cancellation 有权
标题翻译：基于硬判决的ITI取消系统与方法
公开(公告)号：US20140078608A1
公开(公告)日：2014-03-20
申请号：US13618317
申请日：2012-09-14
申请人： Jun Xiao , Erich F. Haratsch , Fan Zhang
发明人： Jun Xiao , Erich F. Haratsch , Fan Zhang
IPC分类号： G11B5/09
CPC分类号： G11B20/10009 , G11B5/012 , G11B5/09 , G11B20/10046 , G11B20/1037 , G11B2020/185 , G11B2220/2516
摘要： Embodiments of the present inventions are related to systems and methods for data processing, and more particularly to systems and methods for reducing inter-track interference in relation to processing data retrieved from a storage medium.
摘要翻译：本发明的实施例涉及用于数据处理的系统和方法，更具体地涉及用于减少与从存储介质检索的处理数据相关的轨道间干扰的系统和方法。

3. 发明申请

US20140052893A1 FILE DELETION FOR NON-VOLATILE MEMORY 审中-公开
标题翻译：非易失性存储器的文件删除
公开(公告)号：US20140052893A1
公开(公告)日：2014-02-20
申请号：US13585933
申请日：2012-08-15
申请人： Fan Zhang , Zongwang Li , Ming Jin , Erich F. Haratsch
发明人： Fan Zhang , Zongwang Li , Ming Jin , Erich F. Haratsch
IPC分类号： G06F12/00
CPC分类号： G06F12/0246
摘要： A device includes non-volatile memory and a controller. The controller receives a write request including data and a logical address associated with a file. The controller stores the data at a data storage segment having a physical address and associates the physical address with the logical address and a file identifier for the file. The controller receives a second write request including data and the logical address associated with the file. The controller stores the data at a second data storage segment having a second physical address and associates the second physical address with the logical address and the file identifier. When a file delete request for the file is received, the controller identifies the first physical address and the second physical address using the file identifier and erases the information stored at the first data storage segment and the second data storage segment based upon the file identification.
摘要翻译：设备包括非易失性存储器和控制器。控制器接收包括数据和与文件相关联的逻辑地址的写入请求。控制器将数据存储在具有物理地址的数据存储段处，并将物理地址与逻辑地址和文件的文件标识符相关联。控制器接收包括数据和与文件相关联的逻辑地址的第二写入请求。控制器将数据存储在具有第二物理地址的第二数据存储段，并将第二物理地址与逻辑地址和文件标识符相关联。当接收到文件的文件删除请求时，控制器使用文件标识符识别第一物理地址和第二物理地址，并且基于文件标识擦除存储在第一数据存储段和第二数据存储段的信息。

4. 发明授权

US08711620B2 Memory device having collaborative filtering to reduce noise 失效
标题翻译：具有协同过滤以减少噪声的存储器件
公开(公告)号：US08711620B2
公开(公告)日：2014-04-29
申请号：US13588043
申请日：2012-08-17
申请人： Fan Zhang , AbdelHakim S. Alhussien , Zongwang Li , Erich F. Haratsch
发明人： Fan Zhang , AbdelHakim S. Alhussien , Zongwang Li , Erich F. Haratsch
IPC分类号： G11C11/34 , G11C16/04 , G11C16/06
CPC分类号： G11C7/02 , G11C7/1006 , G11C16/26 , G11C2029/5002
摘要： An apparatus is described that is configured to modify a signal to at least substantially remove a noise portion from the signal. In one or more implementations, the apparatus is a collaborative filtering module that is configured to communicatively couple to a memory array having a plurality of memory cell blocks. The memory array is configured to furnish a signal representative of data stored within the plurality of memory cell blocks. The collaborative filtering module is configured to determine a noise distribution associated with the plurality of memory cell blocks and generate a noise prediction, which is based upon the noise distribution, when a read operation for the plurality of memory cell blocks is issued. The collaborative filtering module is also configured to modify the signal utilizing the noise prediction to at least substantially remove noise from the signal.
摘要翻译：描述了被配置为修改信号以至少从信号中去除噪声部分的装置。在一个或多个实现中，该设备是协作过滤模块，其被配置为通信地耦合到具有多个存储器单元块的存储器阵列。存储器阵列被配置为提供表示存储在多个存储单元块内的数据的信号。协作过滤模块被配置为当发出多个存储单元块的读取操作时，确定与多个存储器单元块相关联的噪声分布，并产生基于噪声分布的噪声预测。协同过滤模块还被配置为使用噪声预测来修改信号以至少基本上从信号中去除噪声。

5. 发明申请

US20140050023A1 MEMORY DEVICE HAVING COLLABORATIVE FILTERING TO REDUCE NOISE 失效
标题翻译：具有协同过滤功能的存储设备可以减少噪音
公开(公告)号：US20140050023A1
公开(公告)日：2014-02-20
申请号：US13588043
申请日：2012-08-17
申请人： Fan Zhang , AbdelHakim S. Alhussien , Zongwang Li , Erich F. Haratsch
发明人： Fan Zhang , AbdelHakim S. Alhussien , Zongwang Li , Erich F. Haratsch
IPC分类号： G11C7/02 , G11C16/26 , G11C16/04
CPC分类号： G11C7/02 , G11C7/1006 , G11C16/26 , G11C2029/5002
摘要： An apparatus is described that is configured to modify a signal to at least substantially remove a noise portion from the signal. In one or more implementations, the apparatus is a collaborative filtering module that is configured to communicatively couple to a memory array having a plurality of memory cell blocks. The memory array is configured to furnish a signal representative of data stored within the plurality of memory cell blocks. The collaborative filtering module is configured to determine a noise distribution associated with the plurality of memory cell blocks and generate a noise prediction, which is based upon the noise distribution, when a read operation for the plurality of memory cell blocks is issued. The collaborative filtering module is also configured to modify the signal utilizing the noise prediction to at least substantially remove noise from the signal.
摘要翻译：描述了被配置为修改信号以至少从信号中去除噪声部分的装置。在一个或多个实现中，该设备是协作过滤模块，其被配置为通信地耦合到具有多个存储器单元块的存储器阵列。存储器阵列被配置为提供表示存储在多个存储单元块内的数据的信号。协作过滤模块被配置为当发出多个存储单元块的读取操作时，确定与多个存储器单元块相关联的噪声分布，并产生基于噪声分布的噪声预测。协同过滤模块还被配置为使用噪声预测来修改信号以至少基本上从信号中去除噪声。

6. 发明授权

US08949702B2 Systems and methods for detector side trapping set mitigation 有权
标题翻译：检测器侧捕集装置减轻系统和方法
公开(公告)号：US08949702B2
公开(公告)日：2015-02-03
申请号：US13619907
申请日：2012-09-14
申请人： Fan Zhang , Jun Xiao , Ming Jin
发明人： Fan Zhang , Jun Xiao , Ming Jin
IPC分类号： G06F11/07
CPC分类号： H03M13/1142 , G06F11/1076 , G11B20/1833 , G11B2020/185 , H03M13/2957 , H03M13/6325 , H03M13/6343 , H03M13/658
摘要： Embodiments of the inventions are related to systems and methods for data processing, and more particularly to systems and methods for mitigating trapping sets in a data processing system.
摘要翻译：本发明的实施例涉及用于数据处理的系统和方法，更具体地涉及用于减轻数据处理系统中的陷阱集合的系统和方法。

7. 发明申请

US20140032454A1 Systems and Methods for Data Processing Using Soft Data Shaping 有权
标题翻译：使用软数据整形的数据处理系统和方法
公开(公告)号：US20140032454A1
公开(公告)日：2014-01-30
申请号：US13561230
申请日：2012-07-30
申请人： Fan Zhang , Jun Xiao , Ming Jin , Haitao Xia
发明人： Fan Zhang , Jun Xiao , Ming Jin , Haitao Xia
IPC分类号： G06N3/12
CPC分类号： G06N3/126 , G06N3/12
摘要： The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for manipulating soft data in a data processing system.
摘要翻译：本发明涉及用于数据处理的系统和方法，更具体地涉及用于在数据处理系统中操纵软数据的系统和方法。

8. 发明授权

US08868475B2 Systems and methods for data processing using soft data shaping 有权
标题翻译：使用软数据整形进行数据处理的系统和方法
公开(公告)号：US08868475B2
公开(公告)日：2014-10-21
申请号：US13561230
申请日：2012-07-30
申请人： Fan Zhang , Jun Xiao , Ming Jin , Haitao Xia
发明人： Fan Zhang , Jun Xiao , Ming Jin , Haitao Xia
IPC分类号： G06N3/12
CPC分类号： G06N3/126 , G06N3/12
摘要： The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for manipulating soft data in a data processing system.
摘要翻译：本发明涉及用于数据处理的系统和方法，更具体地涉及用于在数据处理系统中操纵软数据的系统和方法。

9. 发明申请

US20140082461A1 Systems and Methods for Detector Side Trapping Set Mitigation 有权
标题翻译：检测器侧捕集装置的系统和方法
公开(公告)号：US20140082461A1
公开(公告)日：2014-03-20
申请号：US13619907
申请日：2012-09-14
申请人： Fan Zhang , Jun Xiao , Ming Jin
发明人： Fan Zhang , Jun Xiao , Ming Jin
IPC分类号： G06F11/07
CPC分类号： H03M13/1142 , G06F11/1076 , G11B20/1833 , G11B2020/185 , H03M13/2957 , H03M13/6325 , H03M13/6343 , H03M13/658
摘要： Embodiments of the inventions are related to systems and methods for data processing, and more particularly to systems and methods for mitigating trapping sets in a data processing system.
摘要翻译：本发明的实施例涉及用于数据处理的系统和方法，更具体地涉及用于减轻数据处理系统中的陷阱集合的系统和方法。

10. 发明公开

US20240037394A1 SYSTEM AND METHOD FOR NEURAL NETWORK MULTIPLE TASK ADAPTATION 审中-公开
公开(公告)号：US20240037394A1
公开(公告)日：2024-02-01
申请号：US18360140
申请日：2023-07-27
申请人： Deliang Fan , Fan Zhang , Li Yang
发明人： Deliang Fan , Fan Zhang , Li Yang
IPC分类号： G06N3/08 , G06N3/04 , G06N3/063
CPC分类号： G06N3/08 , G06N3/04 , G06N3/063
摘要： A neural network accelerator architecture for multiple task adaptation comprises a volatile memory comprising a plurality of subarrays, each subarray comprising M rows and N columns of volatile memory cells; a source line driver connected to a plurality of N source lines, each source line corresponding to a column in the subarray; a binary mask buffer memory having size at least N bits, each bit corresponding to a column in the subarray, where a 0 corresponds to turning off the column for a convolution operation and a 1 corresponds to turning on the column for the convolution operation; and a controller configured to selectively drive each of the N source lines with a corresponding value from the mask buffer; wherein each column in the subarray is configured to store a convolution kernel.

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