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    • 41. 发明授权
    • Connector
    • 连接器
    • US07014505B1
    • 2006-03-21
    • US11075482
    • 2005-03-09
    • Tsutomu TanakaTsuyoshi Mase
    • Tsutomu TanakaTsuyoshi Mase
    • H01R12/00
    • H01R13/4362
    • A terminal fitting (30) has a connecting portion (31) and a stabilizer (41) projects from an outer surface of the connecting portion (31). The stabilizer (41) is received in an insertion groove (18) in an inner wall of a cavity (12) for guiding the terminal fitting (30) into the cavity (12). A lock (11) is provided at the inner wall of the cavity (12) and has a locking section (27) engageable with an engaging surface (40A) of a protrusion (40) and a front edge (39A) of a locking hole (39) provided in the connecting portion (31). An escaping recess (28) is formed in a part of the lock (11) behind the locking section (27) and overlaps the locking section (27) with respect to a width direction. The escaping groove (28) communicates with the insertion groove (18) and receives the stabilizer (41).
    • 端子接头(30)具有连接部分(31),并且稳定器(41)从连接部分(31)的外表面突出。 稳定器(41)被容纳在空腔(12)的内壁中的插入槽(18)中,用于将端子接头(30)引导到空腔(12)中。 锁定件(11)设置在空腔(12)的内壁处并且具有可与突出部(40)的接合表面(40A)和与凸缘(40)的前边缘(39A)接合的锁定部分(27) 设置在连接部分(31)中的锁定孔(39)。 在锁定部分(27)后面的锁定部分(11)的一部分上形成有一个逸出的凹槽(28),并且相对于宽度方向与锁定部分(27)重叠。 逸出槽(28)与插入槽(18)连通并接收稳定器(41)。
    • 48. 发明授权
    • Nonvolatile semiconductor memory and automatic erasing/writing method thereof
    • 非易失性半导体存储器及其自动擦除/写入方法
    • US06459640B1
    • 2002-10-01
    • US09931243
    • 2001-08-17
    • Kunio TaniTomohisa IbaTetsu TashiroKatsunobu HongoTsutomu TanakaMikio KamiyaToshihiro SezakiHiroyuki Kimura
    • Kunio TaniTomohisa IbaTetsu TashiroKatsunobu HongoTsutomu TanakaMikio KamiyaToshihiro SezakiHiroyuki Kimura
    • G11C700
    • G11C29/846G11C16/0416G11C16/10G11C16/22
    • A nonvolatile semiconductor memory includes a memory block composed of a memory array having a plurality of memory cells arranged in a matrix form, each of the memory cells being composed of a nonvolatile transistor; a memory decoder necessary for erasing/writing/reading data of the nonvolatile transistor in the memory array; a charge pump necessary for erasing/writing/reading the data of the nonvolatile transistor in the memory array; a register having each of a plurality of control signals for controlling the memory decoder and the charge pump allocated to register 1 bit; and an updating device for updating a content of the register by a data processor coupled to the register. By using this updating device to update the content of the register, the memory decoder and the charge pump are controlled, the data of the memory block is erased, and data is written in/read from the nonvolatile transistor. Thus a selecting device other than a laser can be applied for suppressing the increase of an LSI circuit size in the same chip as that for a dedicated control circuit, verifying the disconnected state of a FUSE circuit in the memory, and trimming the FUSE circuit.
    • 非易失性半导体存储器包括由具有以矩阵形式布置的多个存储单元的存储器阵列组成的存储块,每个存储单元由非易失性晶体管构成; 用于擦除/写入/读取存储器阵列中的非易失性晶体管的数据所需的存储器解码器; 用于擦除/写入/读取存储器阵列中的非易失性晶体管的数据所需的电荷泵; 具有用于控制分配给寄存器1位的存储器解码器和电荷泵的多个控制信号中的每一个的寄存器; 以及更新装置,用于通过耦合到所述寄存器的数据处理器来更新所述寄存器的内容。 通过使用该更新装置来更新寄存器的内容,对存储器解码器和电荷泵进行控制,擦除存储块的数据,并且从非易失性晶体管写入/读取数据。 因此,可以应用激光以外的选择装置来抑制与专用控制电路相同的芯片中的LSI电路尺寸的增加,验证存储器中的FUSE电路的断开状态以及修整FUSE电路。
    • 49. 发明授权
    • Dilute remote plasma clean
    • 稀释远程等离子体清洁
    • US06329297B1
    • 2001-12-11
    • US09553694
    • 2000-04-21
    • Kenneth E. BalishThomas NowakTsutomu TanakaMark Beals
    • Kenneth E. BalishThomas NowakTsutomu TanakaMark Beals
    • H01L2100
    • H01J37/3244H01J2237/335Y10S156/916
    • A method and apparatus for enhancing the etch characteristics of a plasma formed in a remote plasma generator. A plasma formed in a remote plasma generator (27) is flown through a tube (62) to a plenum (60) where it is diluted to form a plasma mixture before flowing the plasma mixture into a processing chamber (15). The plasma mixture is used to clean deposits from the interior surfaces of the processing chamber, or can be used to perform an etch step on a process wafer within the processing chamber. In one embodiment, a plasma formed from NF3 is diluted with N2 to etch residue from the surfaces of a processing chamber used to deposit silicon oxide glass. Diluting the plasma increased the etching rate and made the etching rate more uniform across the diameter of the processing chamber.
    • 一种用于增强在远程等离子体发生器中形成的等离子体的蚀刻特性的方法和装置。 形成在远程等离子体发生器(27)中的等离子体通过管(62)流到增压室(60),在其中稀释以形成等离子体混合物,然后将等离子体混合物流入处理室(15)。 等离子体混合物用于从处理室的内表面清洁沉积物,或者可以用于在处理室内的处理晶片上进行蚀刻步骤。 在一个实施方案中,用N 2稀释由NF 3形成的等离子体,以从用于沉积氧化硅玻璃的处理室的表面蚀刻残留物。 稀释等离子体增加了蚀刻速率,并且使蚀刻速率在处理室的直径上更均匀。