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    • 43. 发明授权
    • Method to improve dielectric quality in high-k metal gate technology
    • 提高高k金属栅极技术介质质量的方法
    • US08324090B2
    • 2012-12-04
    • US12338787
    • 2008-12-18
    • Yuri MasuokaPeng-Fu HsuHuan-Tsung HuangKuo-Tai HuangYong-Tian HouCarlos H. Diaz
    • Yuri MasuokaPeng-Fu HsuHuan-Tsung HuangKuo-Tai HuangYong-Tian HouCarlos H. Diaz
    • H01L21/4763H01L25/11H01L29/78
    • H01L29/4925H01L21/28061H01L21/28185H01L21/28194H01L21/823842H01L29/513H01L29/517
    • The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first active region and a second active region, providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a first capping layer and a second capping layer over the high-k dielectric layer, the first capping layer overlying the first region and the second capping layer overlying the second region, forming a layer containing silicon (Si) over the first and second capping layers, forming a metal layer over the layer containing Si, and forming a first gate stack over the first region and a second gate stack over the second active region. The first gate stack includes the high-k dielectric layer, the first capping layer, the layer containing Si, and the metal layer and the second gate stack includes the high-k dielectric layer, the second capping layer, the layer containing Si, and the metal layer.
    • 本公开提供了制造半导体器件的方法。 该方法包括提供具有第一有源区和第二有源区的半导体衬底,提供具有第一区域和第二区域的半导体衬底,在半导体衬底上形成高k电介质层,形成第一覆盖层和 第二覆盖层覆盖在高k电介质层上,覆盖第一区域的第一覆盖层和覆盖第二区域的第二封盖层,在第一和第二覆盖层上形成含有硅(Si)的层,形成金属层 所述层包含Si,并且在所述第一区域上形成第一栅极堆叠,并且在所述第二有源区域上形成第二栅极堆叠。 第一栅极堆叠包括高k电介质层,第一覆盖层,含有Si的层,金属层和第二栅极堆叠包括高k电介质层,第二覆盖层,含有Si的层和 金属层。
    • 47. 发明授权
    • High-k dielectric metal gate device structure and method for forming the same
    • 高k电介质金属栅极器件结构及其形成方法
    • US07625791B2
    • 2009-12-01
    • US11926830
    • 2007-10-29
    • Joshua TsengKang-Cheng LinJi-Yi YangKuo-Tai HuangRyan Chia-Jen Chen
    • Joshua TsengKang-Cheng LinJi-Yi YangKuo-Tai HuangRyan Chia-Jen Chen
    • H01L21/8238
    • H01L21/823857H01L21/823842
    • A metal gate/high-k dielectric semiconductor device provides an NMOS gate structure and a PMOS gate structure formed on a semiconductor substrate. The NMOS gate structure includes a high-k gate dielectric treated with a dopant impurity such as La and the high-k gate dielectric material of the PMOS gate structure is deficient of this dopant impurity and further includes a work function tuning layer over the high-k gate dielectric. A process for simultaneously forming the NMOS and PMOS gate structures includes forming the high-k gate dielectric material, and the work function tuning layer thereover, then selectively removing the work function tuning layer from the NMOS region and carrying out a plasma treatment to selectively dope the high-k gate dielectric material in the NMOS region with a dopant impurity while the high-k gate dielectric in the PMOS region is substantially free of the dopant impurity.
    • 金属栅极/高k电介质半导体器件提供形成在半导体衬底上的NMOS栅极结构和PMOS栅极结构。 NMOS栅极结构包括用诸如La的掺杂剂杂质处理的高k栅极电介质,并且PMOS栅极结构的高k栅极电介质材料缺乏该掺杂杂质,并且还包括高功率调制层, k栅极电介质。 用于同时形成NMOS和PMOS栅极结构的工艺包括在其上形成高k栅极介电材料和功函数调谐层,然后从NMOS区选择性地去除功函数调谐层,并进行等离子体处理以选择性地掺杂 具有掺杂剂杂质的NMOS区域中的高k栅极电介质材料,而PMOS区域中的高k栅极电介质基本上不含掺杂剂杂质。
    • 48. 发明授权
    • Method of fabricating gate structure
    • 栅极结构的制作方法
    • US07435640B2
    • 2008-10-14
    • US11164025
    • 2005-11-08
    • Yun-Ren WangYing-Wei YenShu-Yen ChanKuo-Tai Huang
    • Yun-Ren WangYing-Wei YenShu-Yen ChanKuo-Tai Huang
    • H01L21/8238
    • H01L21/28202H01L21/28088H01L21/76822H01L29/4966H01L29/517H01L29/518
    • A method of fabricating a gate structure is provided. First, a sacrificial oxide layer is formed on a substrate. A nitridation treatment process is performed to redistribute the nitrogen atoms in the sacrificial layer and the substrate and produce a concentration profile such that the concentration of nitrogen progressively increases and then decreases toward the substrate with the maximum concentration of nitrogen in the sacrificial oxide layer. Next, the sacrificial oxide layer is removed. A re-oxidation process is performed to produce an interface layer on the surface of the substrate. A high K (dielectric constant) gate dielectric layer, a barrier layer and a metal layer are sequentially formed on the substrate. The metal layer, the barrier layer, the high K gate dielectric layer and the interface layer are defined to form a stacked gate structure.
    • 提供一种制造栅极结构的方法。 首先,在基板上形成牺牲氧化物层。 进行氮化处理工艺以重新分配牺牲层和衬底中的氮原子,并产生浓度分布,使得氮的浓度逐渐增加,然后在牺牲氧化物层中具有氮的最大浓度朝向衬底减小。 接下来,除去牺牲氧化物层。 进行再氧化处理以在衬底的表面上产生界面层。 在基板上依次形成高K(介电常数)栅介质层,阻挡层和金属层。 限定金属层,势垒层,高K栅极介电层和界面层以形成层叠栅极结构。
    • 49. 发明申请
    • GATE STRUCTURE
    • 门结构
    • US20080157231A1
    • 2008-07-03
    • US12046433
    • 2008-03-11
    • Yun-Ren WangYing-Wei YenShu-Yen ChanKuo-Tai Huang
    • Yun-Ren WangYing-Wei YenShu-Yen ChanKuo-Tai Huang
    • H01L29/94
    • H01L21/28202H01L21/28088H01L21/76822H01L29/4966H01L29/517H01L29/518
    • A method of fabricating a gate structure is provided. First, a sacrificial oxide layer is formed on a substrate. A nitridation treatment process is performed to redistribute the nitrogen atoms in the sacrificial layer and the substrate and produce a concentration profile such that the concentration of nitrogen progressively increases and then decreases toward the substrate with the maximum concentration of nitrogen in the sacrificial oxide layer. Next, the sacrificial oxide layer is removed. A re-oxidation process is performed to produce an interface layer on the surface of the substrate. A high K (dielectric constant) gate dielectric layer, a barrier layer and a metal layer are sequentially formed on the substrate. The metal layer, the barrier layer, the high K gate dielectric layer and the interface layer are defined to form a stacked gate structure.
    • 提供一种制造栅极结构的方法。 首先,在基板上形成牺牲氧化物层。 进行氮化处理工艺以重新分配牺牲层和衬底中的氮原子,并产生浓度分布,使得氮的浓度逐渐增加,然后在牺牲氧化物层中具有氮的最大浓度朝向衬底减小。 接下来,除去牺牲氧化物层。 进行再氧化处理以在衬底的表面上产生界面层。 在基板上依次形成高K(介电常数)栅介质层,阻挡层和金属层。 限定金属层,势垒层,高K栅极介电层和界面层以形成层叠栅极结构。
    • 50. 发明授权
    • Method for preventing a by-product ion moving from a spacer
    • 防止副产物离子从间隔物移动的方法
    • US06455389B1
    • 2002-09-24
    • US09872261
    • 2001-06-01
    • Kuo-Tai HuangChao-Sheng LinLi-Wei Cheng
    • Kuo-Tai HuangChao-Sheng LinLi-Wei Cheng
    • H01L21336
    • H01L29/6659H01L29/4983H01L29/6656
    • This invention relates to a method that prevents by-productions from moving from a spacer. In particular by using an offset liner, a liner with a treated surface and a spacer that is formed by using the atomic layer deposition method or the rapid thermal chemical vapor deposition method. The present invention uses a liner, whose surface is treated, and a spacer, which is formed by using the atomic layer deposition method or the rapid thermal chemical vapor deposition method. This prevents by-product ions from moving from the spacer to other regions by using actions in diffusion and drift to affect the voltage stability of the semiconductor device after the current is connected. This defect will further affect qualities of the semiconductor device.
    • 本发明涉及防止副产物从间隔物移动的方法。 特别是通过使用偏移衬垫,具有经处理的表面的衬垫和通过使用原子层沉积法或快速热化学气相沉积法形成的间隔物。 本发明使用表面被处理的衬垫和使用原子层沉积法或快速热化学气相沉积法形成的间隔物。 通过使用扩散和漂移中的动作来影响电流连接后的半导体器件的电压稳定性,防止副产物离子从间隔物移动到其它区域。 该缺陷将进一步影响半导体器件的质量。