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41. 发明申请

US20090189214A1 SEMICONDUCTOR DEVICE AND FABRICATION METHOD FOR THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090189214A1
公开(公告)日：2009-07-30
申请号：US12360488
申请日：2009-01-27
申请人： Nobuyoshi Takahashi , Ichirou Matsuo
发明人： Nobuyoshi Takahashi , Ichirou Matsuo
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L27/11568
摘要： The semiconductor device includes: a plurality of bit lines formed in stripes in a semiconductor substrate of a first conductivity type, each of the bit lines being a diffusion layer of an impurity of a second conductivity type; a plurality of gate insulation films s formed on regions of the semiconductor substrate between the bit lines; a plurality of word lines formed on the semiconductor substrate via the gate insulating films, the word lines extending in a direction intersecting with the bit lines; and a plurality of bit line isolation diffusion layers formed in regions of the semiconductor substrate between the word lines, each of the bit line isolation diffusion layers being a diffusion layer of an impurity of the first conductivity type. The bit line isolation diffusion layer includes a diffusion suppressor for suppressing diffusion of an impurity.
摘要翻译：半导体器件包括：在第一导电类型的半导体衬底中以条纹形成的多个位线，每个位线是第二导电类型的杂质的扩散层; 在所述位线之间形成在所述半导体衬底的区域上的多个栅绝缘膜; 经由所述栅极绝缘膜形成在所述半导体衬底上的多个字线，所述字线在与所述位线相交的方向上延伸; 以及在所述字线之间的所述半导体衬底的区域中形成的多个位线隔离扩散层，所述位线隔离扩散层中的每一个为所述第一导电类型的杂质的扩散层。位线隔离扩散层包括用于抑制杂质扩散的扩散抑制器。

42. 发明授权

US07439577B2 Semiconductor memory and method for manufacturing the same 有权
标题翻译：半导体存储器及其制造方法
公开(公告)号：US07439577B2
公开(公告)日：2008-10-21
申请号：US11495780
申请日：2006-07-31
申请人： Takahiko Hashidzume , Nobuyoshi Takahashi , Koji Yoshida , Keita Takahashi , Kiyoshi Kurihara , Yoshiya Moriyama
发明人： Takahiko Hashidzume , Nobuyoshi Takahashi , Koji Yoshida , Keita Takahashi , Kiyoshi Kurihara , Yoshiya Moriyama
IPC分类号： H01L29/792
CPC分类号： H01L27/115 , H01L27/11568
摘要： A semiconductor memory is provided with memory cells including bit lines made of a diffusion layer formed in a semiconductor substrate, charge-trapping gate insulating films formed between the bit lines and word lines formed on the gate insulating films. An interlayer insulating film is formed over the memory cells and bit line contact plugs are formed in the interlayer insulating film to be connected to the bit lines. Further, a light blocking film is formed on at least part of the interlayer insulating film covering the memory cells and part of the light blocking film formed on the interlayer insulating film extends from the surface to the inside of the interlayer insulating film in the neighborhood of the bit line contact plugs.
摘要翻译：半导体存储器设置有存储单元，存储单元包括由在半导体衬底中形成的扩散层构成的位线，形成在位线和形成在栅极绝缘膜上的字线之间的电荷俘获栅极绝缘膜。在存储单元之上形成层间绝缘膜，并且在层间绝缘膜中形成位线接触插塞以连接到位线。此外，在覆盖存储单元的层间绝缘膜的至少一部分上形成遮光膜，并且形成在层间绝缘膜上的遮光膜的一部分从层间绝缘膜的表面延伸到附近的层间绝缘膜的内部位线接触插头。

43. 发明申请

US20070108509A1 Semiconductor memory and method for manufacturing the same 有权
标题翻译：半导体存储器及其制造方法
公开(公告)号：US20070108509A1
公开(公告)日：2007-05-17
申请号：US11495780
申请日：2006-07-31
申请人： Takahiko Hashidzume , Nobuyoshi Takahashi , Koji Yoshida , Keita Takahashi , Kiyoshi Kurihara , Yoshiya Moriyama
发明人： Takahiko Hashidzume , Nobuyoshi Takahashi , Koji Yoshida , Keita Takahashi , Kiyoshi Kurihara , Yoshiya Moriyama
IPC分类号： H01L29/792
CPC分类号： H01L27/115 , H01L27/11568
摘要： A semiconductor memory is provided with memory cells including bit lines made of a diffusion layer formed in a semiconductor substrate, charge-trapping gate insulating films formed between the bit lines and word lines formed on the gate insulating films. An interlayer insulating film is formed over the memory cells and bit line contact plugs are formed in the interlayer insulating film to be connected to the bit lines. Further, a light blocking film is formed on at least part of the interlayer insulating film covering the memory cells and part of the light blocking film formed on the interlayer insulating film extends from the surface to the inside of the interlayer insulating film in the neighborhood of the bit line contact plugs.
摘要翻译：半导体存储器设置有存储单元，存储单元包括由在半导体衬底中形成的扩散层构成的位线，形成在位线和形成在栅极绝缘膜上的字线之间的电荷俘获栅极绝缘膜。在存储单元之上形成层间绝缘膜，并且在层间绝缘膜中形成位线接触插塞以连接到位线。此外，在覆盖存储单元的层间绝缘膜的至少一部分上形成遮光膜，并且形成在层间绝缘膜上的遮光膜的一部分从层间绝缘膜的表面延伸到附近的层间绝缘膜的内部位线接触插头。

44. 发明申请

US20060022243A1 Semiconductor memory device and method for fabricating the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20060022243A1
公开(公告)日：2006-02-02
申请号：US11151542
申请日：2005-06-14
申请人： Takahiko Hashidzume , Fumihiko Noro , Nobuyoshi Takahashi
发明人： Takahiko Hashidzume , Fumihiko Noro , Nobuyoshi Takahashi
IPC分类号： H01L29/94
CPC分类号： H01L27/115 , H01L27/11519 , H01L27/11568
摘要： A semiconductor memory device has a memory region which is formed on a semiconductor substrate and in which a plurality of memory cells each including a memory transistor are arranged as a matrix using a plurality of impurity diffusion layers (bit lines) and a plurality of gate electrodes (word lines) intersecting each other. The gate electrode of each of the memory transistors has an upper surface thereof formed into a protruding portion which is higher in level at the middle portion than at the edge portions. A silicide layer is formed on the upper surface of the protruding portion of the gate electrode of each of the memory transistors.
摘要翻译：半导体存储器件具有形成在半导体衬底上的存储区域，其中使用多个杂质扩散层（位线）和多个栅电极将包括存储晶体管的多个存储单元布置为矩阵（字线）相交。每个存储晶体管的栅极电极的上表面形成为在中间部分高于边缘部分的高度的突出部分。在每个存储晶体管的栅电极的突出部分的上表面上形成硅化物层。

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