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41. 发明申请

US20090279201A1 JOINT SPECIFICATION OF SERVO FORMAT AND SERVO READER PARAMETERS FOR TAPE DRIVE SYSTEMS 有权
标题翻译：伺服驱动系统的伺服格式和伺服读取器参数的联合规范
公开(公告)号：US20090279201A1
公开(公告)日：2009-11-12
申请号：US12117899
申请日：2008-05-09
申请人： Giovanni Cherubini , Roy D. Cideciyan , Laurent A. Dellmann , Evangelos S. Eleftheriou , Mark A. Lantz
发明人： Giovanni Cherubini , Roy D. Cideciyan , Laurent A. Dellmann , Evangelos S. Eleftheriou , Mark A. Lantz
IPC分类号： G11B5/584
CPC分类号： G11B5/584
摘要： A servo pattern, including stripes arranged in servo bursts for use in position error signal (PES) generation, is provided in which a stripe width is narrower than 1.7 μm and in which the stripes are oriented at an azimuth angle which in absolute value is equal to or larger than 6 degrees.
摘要翻译：提供了一种伺服图案，其中包括布置在用于位置误差信号（PES）生成的伺服脉冲串中的条带，其中条纹宽度小于1.7μm，并且其中条纹以绝对值相等的方位角定向至或大于6度。

42. 发明授权

US07574646B2 Data storage systems 失效
标题翻译：数据存储系统
公开(公告)号：US07574646B2
公开(公告)日：2009-08-11
申请号：US11286582
申请日：2005-11-25
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Thomas Mittelholzer
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Thomas Mittelholzer
IPC分类号： H03M13/00
CPC分类号： G11B20/1833
摘要： A method for decoding data in a data storage system includes generating an output bit stream; generating a first error corrected bit stream in dependence on the output bit stream; generating a second error corrected bit stream in dependence on the first error corrected bit stream; generating a checksum in dependence of the second error corrected bit stream; and, in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave: supplying data indicative of locations of correct bits in the second error corrected bit stream; and, regenerating the first error corrected bit stream in dependence on the pinning data.
摘要翻译：一种用于在数据存储系统中解码数据的方法包括：生成输出比特流; 根据输出比特流产生第一纠错比特流; 根据第一纠错比特流产生第二纠错比特流; 根据第二纠错比特流产生校验和; 并且在所述校验和指示所述第二纠错比特流中的错误并且所述第二纠错比特流包括至少一个正确交错的情况下：提供指示所述第二纠错比特流中的正确比特的位置的数据; 以及根据钉扎数据再生第一纠错比特流。

43. 发明申请

US20080284624A1 HIGH-RATE RLL ENCODING 失效
标题翻译：高速RLL编码
公开(公告)号：US20080284624A1
公开(公告)日：2008-11-20
申请号：US11749711
申请日：2007-05-16
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
IPC分类号： H03M7/00
CPC分类号： H03M5/145 , G11B20/1426 , G11B2020/1446 , G11B2020/1473 , G11B2220/90 , G11B2220/956
摘要： An unencoded m-bit data input sequence is divided into a block of n bits and a block of m−n bits. The block of n bits is divided into a first set of n+1 encoded bits, wherein at least one of P1 subblocks of the first set satisfies a G, M and I constraints. The first set of n+1 encoded bits is mapped into a second set of n+1 encoded bits wherein at least one of P2 subblocks of the second set gives rise to at least Q1 transitions after 1/(1+D2) preceding. A second set of n+1 encoded bits is divided into P3 encoded subblocks and the P3 encoded subblocks are interleaved among (m−n)/s unencoded symbols so as to form a (m+1)-bit output sequence codeword which is then stored on a data storage medium.
摘要翻译：未编码的m位数据输入序列被分成n位块和m-n位块。 n位的块被划分为第一组n + 1个编码比特，其中第一组的P1个子块中的至少一个满足G，M和I约束。第一组n + 1个编码比特被映射到n + 1编码比特的第二组，其中第二组的P2个子块中的至少一个在1 /（1 + D 2）之后产生至少Q1个转换）。第二组n + 1编码比特被分成P3编码子块，并且P3编码子块在（mn）/ s个未编码符号之间进行交织，以形成第（m + 1）比特的输出序列码字，然后存储在数据存储介质。

44. 发明授权

US07421640B2 Method and apparatus for providing error correction capability to longitudinal position data 有权
标题翻译：向纵向位置数据提供纠错能力的方法和装置
公开(公告)号：US07421640B2
公开(公告)日：2008-09-02
申请号：US11205713
申请日：2005-08-17
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Glen A. Jaquette , Paul J. Seger
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Glen A. Jaquette , Paul J. Seger
IPC分类号： G11C29/00
CPC分类号： G11B20/1201 , G11B20/18 , G11B20/1866 , G11B20/20 , G11B2020/1282 , G11B2020/1284 , G11B2220/90
摘要： A method and apparatus for providing error correction capability to longitudinal position data are disclosed. Initially, data are encoded via a set of even LPOS words and a set of odd LPOS words. The encoded data are then decoded by generating a set of syndrome bits for each of the LPOS words. A determination is then made as to whether or not there is an error within one of the LPOS words based on its corresponding syndrome bits.
摘要翻译：公开了一种向纵向位置数据提供纠错能力的方法和装置。最初，通过一组偶数LPOS字和一组奇数LPOS字对数据进行编码。然后，通过为每个LPOS字生成一组校正子位来解码编码数据。然后，基于其对应的校正子位确定是否存在LPOS字之一内的错误。

45. 发明授权

US07064687B1 Techniques for modulating data using short block encoders 失效
标题翻译：使用短块编码器调制数据的技术
公开(公告)号：US07064687B1
公开(公告)日：2006-06-20
申请号：US11048273
申请日：2005-01-31
申请人： Mario Blaum , Roy D. Cideciyan , Evangelos S. Eleftheriou , Richard Leo Galbraith , Ksenija Lakovic , Thomas Mittelholzer , Travis Oenning , Bruce A. Wilson
发明人： Mario Blaum , Roy D. Cideciyan , Evangelos S. Eleftheriou , Richard Leo Galbraith , Ksenija Lakovic , Thomas Mittelholzer , Travis Oenning , Bruce A. Wilson
IPC分类号： H03M7/00
CPC分类号： H03M13/53 , G11B20/10009 , G11B20/1426 , G11B20/1809 , H03M5/145
摘要： Techniques are provided for applying modulation constraints to data streams using a short block encoder. A short block encoder encodes a subset of the bits in a data stream. Then, the even and odd interleaves in a data stream are separated into two data paths. A first modulation encoder encodes the even interleave according to a first modulation constraint. A second modulation encoder encodes the odd interleave according to a second modulation constraint, which in general coincides with the modulation constraint for even interleave.
摘要翻译：提供了使用短块编码器将调制限制应用于数据流的技术。短块编码器编码数据流中的比特的子集。然后，数据流中的偶数和奇数交织被分成两个数据路径。第一调制编码器根据第一调制约束编码偶数交织。第二调制编码器根据第二调制约束对奇数交织进行编码，其通常与用于偶数交织的调制约束一致。

46. 发明授权

US06460150B1 Noise-predictive post-processing for PRML data channel 有权
标题翻译： PRML数据通道的噪声预测后处理
公开(公告)号：US06460150B1
公开(公告)日：2002-10-01
申请号：US09517352
申请日：2000-03-02
申请人： Roy D. Cideciyan , Jonathan Coker , Evangelos S. Eleftheriou , Richard Leo Galbraith
发明人： Roy D. Cideciyan , Jonathan Coker , Evangelos S. Eleftheriou , Richard Leo Galbraith
IPC分类号： H03M1300
CPC分类号： H03M13/6331 , G11B20/10009 , H03M13/2707 , H03M13/41 , H03M13/6343
摘要： A method for use in connection with any kind of detector that receives an input signal via a partial-response channel and which provides a detector output signal and a merge-bit signal. According to the present scheme, the colored noise of the input signal is whitened in order to provide a filtered signal. The filtered signal is filtered to provide a first output signal using a first matched filter and a second output signal using a second matched filter. The merge-bit signal is used to adjust the first matched filter to match a first most likely error event and to adjust the second matched filter to match a second most likely error event. It is then determined whether said first likely error event or said second likely error event is the most likely error event, and the actual errors of detector output signal are corrected using said most likely error event.
摘要翻译：一种与通过部分响应信道接收输入信号并提供检测器输出信号和合并位信号的任何种类的检测器结合使用的方法。根据本方案，为了提供滤波信号，输入信号的着色噪声变白。滤波的信号被滤波以使用第二匹配滤波器使用第一匹配滤波器和第二输出信号提供第一输出信号。合并位信号用于调整第一匹配滤波器以匹配第一最可能的错误事件并且调整第二匹配滤波器以匹配第二最可能的错误事件。然后确定所述第一可能错误事件或所述第二可能错误事件是否是最可能的错误事件，并且使用所述最可能的错误事件来校正检测器输出信号的实际误差。

47. 发明授权

US07286595B2 Apparatus using a lengthened equalization target filter with a matched filter metric in a viterbi detector 失效
标题翻译：在维特比检测器中使用具有匹配滤波器度量的延长均衡目标滤波器的装置
公开(公告)号：US07286595B2
公开(公告)日：2007-10-23
申请号：US10683645
申请日：2003-10-10
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos Eleftheriou , Richard L. Galbraith , Thomas Mittelholzer , Travis R. Oenning
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos Eleftheriou , Richard L. Galbraith , Thomas Mittelholzer , Travis R. Oenning
IPC分类号： H03K9/00
CPC分类号： G11B20/10046 , G11B20/10009 , G11B20/10055 , G11B20/10296
摘要： An apparatus that uses a lengthened equalization target filter with a matched filter metric in a Viterbi detector is disclosed. The equalization target includes a base partial response component, i.e., (1−D2), a fractional coefficient polynomial component to whiten the noise, i.e., (1+p1D+p2D2), and a time-reversed replica of the noise-whitening component. Thus, the time-reversed replica of the noise-whitening component comes from what was formerly a matched filter component.
摘要翻译：公开了一种在维特比检测器中使用具有匹配滤波器度量的延长均衡目标滤波器的装置。均衡目标包括基本部分响应分量，即（1-D 2），用于使噪声变白的分数系数多项式分量，即（1 + p < D + p 2 D 2 O 2）和噪声增白部件的时间反转复制品。因此，噪声增白部件的时间反转复制品来自以前的匹配滤波器部件。

48. 发明授权

US07173784B2 Apparatus for providing data dependent detection in a data read channel 失效
标题翻译：用于在数据读取通道中提供数据相关检测的装置
公开(公告)号：US07173784B2
公开(公告)日：2007-02-06
申请号：US10683646
申请日：2003-10-10
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos Eleftheriou , Richard L. Galbraith , Thomas Mittelholzer , Travis R. Oenning
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos Eleftheriou , Richard L. Galbraith , Thomas Mittelholzer , Travis R. Oenning
IPC分类号： G11B5/09 , H03M13/03 , H03D1/00
CPC分类号： G11B20/10296 , G11B20/10009 , G11B20/24
摘要： An apparatus for providing data dependent detection in a data read channel is disclosed. Parameters in a read channel are dynamically adjusted according to data dependent noise. For example, a comparison in an add-compare-select (ACS) unit of a Viterbi decoder may be adjusted or offset terms in error event filters may be biased to choose a Viterbi sequence with more transitions or to compensate for polarity dependent noise.
摘要翻译：公开了一种用于在数据读取通道中提供数据相关检测的装置。读通道中的参数根据数据相关噪声进行动态调整。例如，可以调整维特比解码器的加法比较选择（ACS）单元中的比较，或者错误事件滤波器中的偏移项可能被偏置以选择具有更多跃迁的维特比序列或补偿极性相关噪声。

49. 发明授权

US07164371B2 Method and apparatus for data coding for high density recording channels exhibiting low frequency contents 失效
标题翻译：用于数据编码用于显示低频内容的高密度记录通道的方法和装置
公开(公告)号：US07164371B2
公开(公告)日：2007-01-16
申请号：US10903978
申请日：2004-07-30
申请人： Yuan Xing Lee , Ismail Demirkan , Richard L. Galbraith , Evangelos Eleftheriou , Roy D. Cideciyan
发明人： Yuan Xing Lee , Ismail Demirkan , Richard L. Galbraith , Evangelos Eleftheriou , Roy D. Cideciyan
IPC分类号： H03M5/00
CPC分类号： G11B20/1426 , G11B2020/1457 , H03M5/145
摘要： A method and apparatus for data coding for high-density recording channels exhibiting low frequency contents is disclosed. Coding is used that satisfies both Running Digital Sum (RDS) and Maximum Transition Run (MTR) properties, which are desirable for achieving high-density recording for recording channels exhibiting low frequency components such as perpendicular magnetic recording channel.
摘要翻译：公开了一种用于对显示低频内容的高密度记录通道进行数据编码的方法和装置。使用满足运行数字和（RDS）和最大转移运行（MTR）性质的编码，这是实现用于记录显示低频分量的通道的高密度记录所希望的，例如垂直磁记录通道。

50. 发明授权

US09558782B2 Partial reverse concatenation for data storage devices using composite codes 有权
标题翻译：使用复合代码的数据存储设备的部分反向级联
公开(公告)号：US09558782B2
公开(公告)日：2017-01-31
申请号：US13483015
申请日：2012-05-29
申请人： Roy D. Cideciyan , Robert A. Hutchins , Thomas Mittelholzer , Sedat Oelcer
发明人： Roy D. Cideciyan , Robert A. Hutchins , Thomas Mittelholzer , Sedat Oelcer
IPC分类号： H03M13/00 , G11B20/14 , G11B20/18 , H03M13/29 , H03M13/11 , H03M13/15
CPC分类号： H03M13/2906 , G06F3/0619 , G06F3/064 , G06F3/0674 , G06F3/0677 , G06F3/0682 , G06F11/1076 , G11B20/1426 , G11B20/18 , G11B20/1833 , G11B2020/1836 , G11B2020/1853 , G11B2220/2516 , G11B2220/2537 , G11B2220/956 , H03M13/1102 , H03M13/1515 , H03M13/2909 , H03M13/6325 , H03M13/6343
摘要： In one embodiment, a data storage system includes a write channel for writing data to a storage medium, the write channel configured to utilize a partial reverse concatenated modulation code. The write channel includes logic adapted for encoding data sets using a C2 encoding scheme, logic adapted for adding a header to each subunit of the data sets, logic adapted for encoding the headers of the data sets with a first modulation encoding scheme, logic adapted for encoding data portions of the data sets with a second modulation encoding scheme, logic adapted for encoding portions of the one or more C2-encoded data sets using a C1 encoding scheme, logic adapted for combining the C1-encoded portions with the modulation-encoded headers of the C2-encoded data sets using a multiplexer, and logic adapted for writing the one or more combined C1 - and C2-encoded data sets to data tracks.
摘要翻译：在一个实施例中，数据存储系统包括用于向存储介质写入数据的写通道，该写通道被配置为利用部分反向级联调制码。所述写通道包括适于使用C2编码方案对数据集进行编码的逻辑，适用于将数据组的每个子单元加上标题的逻辑，适用于利用第一调制编码方案对所述数据组的报头进行编码的逻辑，使用第二调制编码方案对数据集的数据部分进行编码，适用于使用C1编码方案对一个或多个C2编码数据集的部分进行编码的逻辑，适用于将C1编码部分与调制编码报头使用多路复用器的C2编码数据集，以及适于将一个或多个组合的C1和C2编码数据集写入数据轨道的逻辑。

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