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1. 发明申请

US20090279201A1 JOINT SPECIFICATION OF SERVO FORMAT AND SERVO READER PARAMETERS FOR TAPE DRIVE SYSTEMS 有权
标题翻译：伺服驱动系统的伺服格式和伺服读取器参数的联合规范
公开(公告)号：US20090279201A1
公开(公告)日：2009-11-12
申请号：US12117899
申请日：2008-05-09
申请人： Giovanni Cherubini , Roy D. Cideciyan , Laurent A. Dellmann , Evangelos S. Eleftheriou , Mark A. Lantz
发明人： Giovanni Cherubini , Roy D. Cideciyan , Laurent A. Dellmann , Evangelos S. Eleftheriou , Mark A. Lantz
IPC分类号： G11B5/584
CPC分类号： G11B5/584
摘要： A servo pattern, including stripes arranged in servo bursts for use in position error signal (PES) generation, is provided in which a stripe width is narrower than 1.7 μm and in which the stripes are oriented at an azimuth angle which in absolute value is equal to or larger than 6 degrees.
摘要翻译：提供了一种伺服图案，其中包括布置在用于位置误差信号（PES）生成的伺服脉冲串中的条带，其中条纹宽度小于1.7μm，并且其中条纹以绝对值相等的方位角定向至或大于6度。

2. 发明授权

US07881008B2 Joint specification of servo format and servo reader parameters for tape drive systems 有权
标题翻译：磁带驱动系统的伺服格式和伺服读取器参数的联合规范
公开(公告)号：US07881008B2
公开(公告)日：2011-02-01
申请号：US12117899
申请日：2008-05-09
申请人： Giovanni Cherubini , Roy D. Cideciyan , Laurent A. Dellmann , Evangelos S. Eleftheriou , Mark A. Lantz
发明人： Giovanni Cherubini , Roy D. Cideciyan , Laurent A. Dellmann , Evangelos S. Eleftheriou , Mark A. Lantz
IPC分类号： G11B5/584
CPC分类号： G11B5/584
摘要： A servo pattern, including stripes arranged in servo bursts for use in position error signal (PES) generation, is provided in which a stripe width is narrower than 1.7 μm and in which the stripes are oriented at an azimuth angle which in absolute value is equal to or larger than 6 degrees.
摘要翻译：提供了一种伺服模式，包括布置在用于位置误差信号（PES）生成的伺服脉冲串中的条带，其中条纹宽度窄于1.7μm，并且条纹以绝对值相等的方位角定向至或大于6度。

3. 发明授权

US07864487B2 Head design for writing servo patterns on magnetic tape 有权
标题翻译：在磁带上写入伺服模式的头设计
公开(公告)号：US07864487B2
公开(公告)日：2011-01-04
申请号：US12118251
申请日：2008-05-09
申请人： Giovanni Cherubini , Roy D. Cideciyan , Evangelos S. Eleftheriou , Jens Jelitto , Mark A. Lantz
发明人： Giovanni Cherubini , Roy D. Cideciyan , Evangelos S. Eleftheriou , Jens Jelitto , Mark A. Lantz
IPC分类号： G11B5/584 , G11B5/265
CPC分类号： G11B5/584
摘要： A servo write head is provided and is configured to simultaneously write at least two servo patterns in respective servo bands on linear magnetic tape. Centerlines of the servo patterns are substantially uniformly spaced in the lateral direction. In addition, the servo patterns of all adjacent respective servo bands are displaced relative to each other in a longitudinal direction by an amount that is related to a length of a servo frame and a type of the servo patterns.
摘要翻译：提供了伺服写入头，并被配置为在线性磁带上的相应伺服带中同时写入至少两个伺服模式。伺服图案的中心线在横向方向上基本上均匀间隔开。此外，所有相邻的各个伺服带的伺服模式在纵向方向上相对于伺服帧的长度和伺服模式的类型相关的量而移位。

4. 发明申请

US20090279202A1 HEAD DESIGN FOR WRITING SERVO PATTERNS ON MAGNETIC TAPE 有权
标题翻译：用于在磁带上书写伺服模式的头设计
公开(公告)号：US20090279202A1
公开(公告)日：2009-11-12
申请号：US12118251
申请日：2008-05-09
申请人： Giovanni Cherubini , Roy D. Cideciyan , Evangelos S. Eleftheriou , Jens Jelitto , Mark A. Lantz
发明人： Giovanni Cherubini , Roy D. Cideciyan , Evangelos S. Eleftheriou , Jens Jelitto , Mark A. Lantz
IPC分类号： G11B5/584
CPC分类号： G11B5/584
摘要： A servo write head is provided and is configured to simultaneously write at least two servo patterns in respective servo bands on linear magnetic tape. Centerlines of the servo patterns are substantially uniformly spaced in the lateral direction. In addition, the servo patterns of all adjacent respective servo bands are displaced relative to each other in a longitudinal direction by an amount that is related to a length of a servo frame and a type of the servo patterns.
摘要翻译：提供了伺服写入头，并被配置为在线性磁带上的相应伺服带中同时写入至少两个伺服模式。伺服图案的中心线在横向方向上基本上均匀间隔开。此外，所有相邻的各个伺服带的伺服模式在纵向方向上相对于伺服帧的长度和伺服模式的类型相关的量而移位。

5. 发明授权

US08930798B2 Data encoding in solid state storage devices 有权
标题翻译：固态存储设备中的数据编码
公开(公告)号：US08930798B2
公开(公告)日：2015-01-06
申请号：US13582768
申请日：2011-03-23
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Thomas Mittelholzer
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Thomas Mittelholzer
IPC分类号： H03M13/00 , H03M13/29 , H03M13/15 , G06F11/10
CPC分类号： H03M13/2906 , G06F11/1072 , H03M13/152 , H03M13/2942
摘要： Methods and apparatus are provided for encoding input data for recording in s-level storage of a solid state storage device, where s f 2. Input data words are encoded in groups of M input data words in accordance with first and second BCH codes to produce, for each group, a set of M first codewords of the first BCH code. The set of M first codewords is produced such that at least one predetermined linear combination of the M first codewords produces a second codeword of the second BCH code, this second BCH code being a sub-code of the first BCH code. The sets of M first codewords are then recorded in the s-level storage. If each of the first and second codewords comprises N q-ary symbols where q=pk, k is a positive integer and p is a prime number, the q-ary code alphabet can be matched to the s-ary storage by ensuring that q and s are uth and vth powers respectively of a common base r, where u and v are positive integers and k f u, whereby p(k/u)v=s.
摘要翻译：提供了用于编码用于在固态存储设备的s级存储中记录的输入数据的方法和装置，其中sf 2.根据第一和第二BCH码，输入数据字以M个输入数据字的组进行编码，对于每个组，第一BCH码的一组M个第一码字。产生M个第一码字集合，使得M个第一码字的至少一个预定线性组合产生第二BCH码的第二码字，该第二BCH码是第一BCH码的子码。然后将M组第一码字集合记录在s级存储器中。如果第一和第二码字中的每一个包括N q个符号，其中q = pk，k是正整数，p是质数，则可以通过确保q- 和s分别是公共基础r的uth和vth权力，其中u和v是正整数和kfu，由此p（k / u）v = s。

6. 发明授权

US08904261B2 Data management in solid state storage devices 有权
标题翻译：固态存储设备中的数据管理
公开(公告)号：US08904261B2
公开(公告)日：2014-12-02
申请号：US13516053
申请日：2010-12-16
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadis
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadis
IPC分类号： G11C29/00 , H03M13/05 , G06F11/10
CPC分类号： G06F11/108 , G06F11/1008 , G06F11/1068 , H03M13/05
摘要： A mechanism is provided for controlling a solid state storage device in which the solid state storage comprises erasable blocks each comprising a plurality of data write locations. Input data is stored in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of the solid state storage. The input data is error correction encoded such that each group contains an error correction code for the input data in that group. Metadata, indicating the location of input data in the solid state storage, is maintained in memory. An indication of validity of data stored in each data write location is also maintained. Prior to erasing a block, valid input data is recovered from the each said group containing write locations in that block. The recovered data is then re-stored as new input data.
摘要翻译：提供了一种用于控制固态存储装置的机构，其中固态存储器包括每个包括多个数据写入位置的可擦除块。输入数据被存储在连续的数据写入位置组中，每个组包括在固态存储器的多个逻辑分区中的每一个中的一组可擦除块中的写入位置。输入数据被纠错编码，使得每个组包含用于该组中的输入数据的纠错码。指示固态存储器中的输入数据的位置的元数据被保存在存储器中。还保持了存储在每个数据写入位置中的数据的有效性的指示。在擦除块之前，从包含该块中的写入位置的每个所述组恢复有效的输入数据。然后将恢复的数据重新存储为新的输入数据。

7. 发明授权

US08276045B2 ECC interleaving for multi-track recording on magnetic tape 有权
标题翻译：用于磁带上多轨记录的ECC交错
公开(公告)号：US08276045B2
公开(公告)日：2012-09-25
申请号：US12351738
申请日：2009-01-09
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Hisato Matsuo , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Hisato Matsuo , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
IPC分类号： G11C29/00
CPC分类号： H03M13/2909 , G11B20/1202 , G11B20/1833 , G11B20/1866 , G11B2020/1836 , G11B2020/1853 , G11B2220/93 , H03M13/15 , H03M13/1515
摘要： Conventional C2 coding and interleaving for multi-track data tape in LTO-3/4 do not support recording data onto a number of concurrent tracks which is not a power of two. Higher-rate longer C2 codes, which do not degrade error rate performance, are provided. An adjustable format and interleaving scheme accommodates future tape drives in which the number of concurrent tracks is not necessarily a power of two. A data set is segmented into a plurality of unencoded subdata sets and parity bytes are generated for each row and column. The parameters of the C2 code include N2 as the least common multiple of the number of possible tracks to which codeword objects are to be written. COs are formed from N2 C1 codewords, mapped onto a logical data track according to information within headers of the CO and modulation encoded into synchronized COs which are written to the tape.
摘要翻译： LTO-3/4中的多轨数据磁带的常规C2编码和交织不支持将数据记录到不是2的幂的多个并发磁道上。提供了更高速率的更长的C2代码，这不会降低错误率性能。可调格式和交错方案适应将来的磁带驱动器，其中并发轨道的数量不一定是二的幂。将数据集分割为多个未编码的子数据集，并为每行和列生成奇偶校验字节。 C2码的参数包括N2作为要写入码字对象的可能轨道数的最小公倍数。 CO由N 2 C1码字形成，根据被写入到磁带的编码到同步的CO中的CO和报头中的信息映射到逻辑数据轨道。

8. 发明申请

US20110131472A1 SOLID-STATE STORAGE SYSTEM WITH PARALLEL ACCESS OF MULTIPLE FLASH/PCM DEVICES 有权
标题翻译：具有并行访问多个闪存/ PCM设备的固态存储系统
公开(公告)号：US20110131472A1
公开(公告)日：2011-06-02
申请号：US12627364
申请日：2009-11-30
申请人： Theodore A. Antonakopoulos , Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadis
发明人： Theodore A. Antonakopoulos , Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadis
IPC分类号： H03M13/05 , G06F11/10 , H03M13/27
CPC分类号： G06F11/1028 , G11C29/765
摘要： Systems and methods are provided that confront the problem of failed storage integrated circuits (ICs) in a solid state drive (SSD) by using a fault-tolerant architecture along with one error correction code (ECC) mechanism for random/burst error corrections and an L-fold interleaving mechanism. The systems and methods described herein keep the SSD operational when one or more integrated circuits fail and allow the recovery of previously stored data from failed integrated circuits and allow random/burst errors to be corrected in other operational integrated circuits. These systems and methods replace the failed integrated circuits with fully functional/operational integrated circuits treated herein as spare integrated circuits. Furthermore, these systems and methods improve I/O performance in terms of maximum achievable read/write data rate.
摘要翻译：提供了通过使用容错架构以及用于随机/突发错误校正的一个纠错码（ECC）机制来解决固态驱动器（SSD）中的故障存储集成电路（IC）的问题的系统和方法，以及 L折叠交织机制。当一个或多个集成电路出现故障并且允许从故障集成电路恢复先前存储的数据并且允许在其他操作集成电路中校正随机/突发错误时，本文描述的系统和方法保持SSD的可操作性。这些系统和方法用作为备用集成电路处理的全功能/可操作集成电路来代替故障集成电路。此外，这些系统和方法在最大可实现的读/写数据速率方面提高了I / O性能。

9. 发明授权

US07876516B2 Rewrite-efficient ECC/interleaving for multi-track recording on magnetic tape 有权
标题翻译：在磁带上进行多轨录音的高效ECC /交错
公开(公告)号：US07876516B2
公开(公告)日：2011-01-25
申请号：US12351747
申请日：2009-01-09
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Hisato Matsuo , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Hisato Matsuo , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
IPC分类号： G11B5/09 , G11B20/14
CPC分类号： G11B20/1833 , G11B20/1201 , G11B20/1866 , G11B2020/1287 , G11B2020/1289 , G11B2020/1446 , G11B2020/1836 , G11B2220/93 , H03M13/27 , H03M13/271
摘要： For writing data to multi-track tape, a received data set is received and segmented into unencoded subdata sets, each comprising an array having K2 rows and K1 columns. For each unencoded subdata set, N1-K1 C1-parity bytes are generated for each row and N2-K2 C2-parity bytes are generated for each column. The C1 and C2 parity bytes are appended to the ends of the row and column, respectively, to form encoded C1 and C2 codewords, respectively. All of the C1 codewords per data set are endowed with a specific codeword header to form a plurality of partial codeword objects (PCOs). Each PCO is mapped onto a logical data track according to information within the header. On each logical data track, adjacent PCOs are merged to form COs which are modulation encoded and mapped into synchronized COs. Then T synchronized COs are written simultaneously to the data tape where T is the number of concurrent active tracks on the data tape.
摘要翻译：为了将数据写入多轨磁带，接收到的数据集并被分割成未编码的子数据集，每个子集包括具有K2行和K1列的阵列。对于每个未编码的子数据集，为每行生成N1-K1 C1-奇偶校验字节，并为每列生成N2-K2 C2-奇偶校验字节。 C1和C2奇偶校验字节分别附加到行和列的末端，分别形成编码的C1和C2码字。每个数据集的所有C1码字都具有特定的码字头以形成多个部分码字对象（PCO）。每个PCO根据标题内的信息被映射到逻辑数据轨道上。在每个逻辑数据轨道上，相邻的PCO被合并以形成被调制编码并被映射到同步的CO中的CO。然后将T同步的CO同时写入数据磁带，其中T是数据磁带上的并发活动磁道的数量。

10. 发明授权

US07694205B2 Method and apparatus for providing a read channel having combined parity and non-parity post processing 有权
标题翻译：用于提供具有组合奇偶校验和非奇偶校验后处理的读通道的方法和装置
公开(公告)号：US07694205B2
公开(公告)日：2010-04-06
申请号：US11067851
申请日：2005-02-28
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning
IPC分类号： G11C29/00 , H03M13/00
CPC分类号： H03M13/45 , G11B20/10009 , G11B20/10055 , G11B20/1833 , G11B2020/1863 , H03M13/098 , H03M13/6343
摘要： A method and apparatus for providing a read channel having combined parity and non-parity post processing is disclosed. A post-processor combines parity and non-parity post processing to make both parity and non-parity corrections so that error events that cannot be detected by parity may be corrected. Non-parity detectable error events are only kept for consideration if their likelihood is above a set threshold.
摘要翻译：公开了一种用于提供具有组合奇偶校验和非奇偶校验后处理的读通道的方法和装置。后处理器组合奇偶校验和非奇偶校验后处理以进行奇偶校验和非奇偶校正，从而校正不能被奇偶校验检测到的错误事件。只有当它们的可能性高于设定的阈值时，才能保持非奇偶校验可检测误差事件。

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