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1. 发明授权

US07071851B1 Techniques for implementing non-uniform constraints in modulation encoded data 失效
标题翻译：在调制编码数据中实现非均匀约束的技术
公开(公告)号：US07071851B1
公开(公告)日：2006-07-04
申请号：US11048597
申请日：2005-01-31
申请人： Mario Blaum , Roy D. Cideciyan , Evangelos S. Eleftheriou , Richard Leo Galbraith , Ksenija Lakovic , Thomas Mittelholzer , Travis Oenning , Bruce A. Wilson
发明人： Mario Blaum , Roy D. Cideciyan , Evangelos S. Eleftheriou , Richard Leo Galbraith , Ksenija Lakovic , Thomas Mittelholzer , Travis Oenning , Bruce A. Wilson
IPC分类号： H03M7/00
CPC分类号： H03M5/145 , G11B20/1426
摘要： Non-uniform modulation encoding techniques are provided to prevent data from containing bit patterns that are prone to errors during read back. Modulation encoding is performed on a data stream to remove error prone bit patterns. Unconstrained data, such as error check parity, that is inserted into the modulated data stream may contain error prone bit patterns. Stricter modulation constraints are enforced on bits that are next to the unconstrained data, than on the remaining bits. By enforcing stricter modulation constraints on these bits, an entire data bit stream can have a desired modulation constraint.
摘要翻译：提供非均匀调制编码技术以防止数据包含在回读期间容易出错的位模式。对数据流执行调制编码以消除容易出错的位模式。插入调制数据流的无约束数据（如错误校验奇偶校验）可能包含易错位模式。对于与无约束数据相邻的位，对其余位执行更严格的调制约束。通过对这些位执行更严格的调制约束，整个数据比特流可以具有期望的调制限制。

2. 发明授权

US07064687B1 Techniques for modulating data using short block encoders 失效
标题翻译：使用短块编码器调制数据的技术
公开(公告)号：US07064687B1
公开(公告)日：2006-06-20
申请号：US11048273
申请日：2005-01-31
申请人： Mario Blaum , Roy D. Cideciyan , Evangelos S. Eleftheriou , Richard Leo Galbraith , Ksenija Lakovic , Thomas Mittelholzer , Travis Oenning , Bruce A. Wilson
发明人： Mario Blaum , Roy D. Cideciyan , Evangelos S. Eleftheriou , Richard Leo Galbraith , Ksenija Lakovic , Thomas Mittelholzer , Travis Oenning , Bruce A. Wilson
IPC分类号： H03M7/00
CPC分类号： H03M13/53 , G11B20/10009 , G11B20/1426 , G11B20/1809 , H03M5/145
摘要： Techniques are provided for applying modulation constraints to data streams using a short block encoder. A short block encoder encodes a subset of the bits in a data stream. Then, the even and odd interleaves in a data stream are separated into two data paths. A first modulation encoder encodes the even interleave according to a first modulation constraint. A second modulation encoder encodes the odd interleave according to a second modulation constraint, which in general coincides with the modulation constraint for even interleave.
摘要翻译：提供了使用短块编码器将调制限制应用于数据流的技术。短块编码器编码数据流中的比特的子集。然后，数据流中的偶数和奇数交织被分成两个数据路径。第一调制编码器根据第一调制约束编码偶数交织。第二调制编码器根据第二调制约束对奇数交织进行编码，其通常与用于偶数交织的调制约束一致。

3. 发明授权

US07030789B1 Techniques for applying modulation constraints to data using periodically changing symbol mappings 有权
标题翻译：使用周期性变化的符号映射对数据应用调制约束的技术
公开(公告)号：US07030789B1
公开(公告)日：2006-04-18
申请号：US11002970
申请日：2004-12-01
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Richard Leo Galbraith , Thomas Mittelholzer , Travis Oenning
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Richard Leo Galbraith , Thomas Mittelholzer , Travis Oenning
IPC分类号： H03M7/02
CPC分类号： H03M7/04 , G06F11/08 , G11B20/1426 , G11B2020/1473 , H03M5/145 , H03M7/06 , H03M13/31
摘要： Techniques are provided for applying modulation constraints to data by using periodically changing symbol mappings to replace certain prohibited error prone data patterns. Initially, user data in a first base is mapped to integers of a second base using a base conversion technique. The integers in the second base correspond to symbols. Subsequently, periodically changing symbol mappings are performed during which prohibited symbols generated during base conversion are mapped to permitted symbols. The periodically changing symbol mappings occur in multiple phases, and the prohibited symbols are different in each phase. The resulting data is processed by a precoder in some embodiments.
摘要翻译：提供了通过使用周期性变化的符号映射来替代某些禁止的易错数据模式来向数据应用调制约束的技术。最初，使用基本转换技术将第一基站中的用户数据映射到第二基站的整数。第二个碱基中的整数对应于符号。随后，执行周期性地改变的符号映射，其中在基本转换期间产生的禁止符号被映射到允许的符号。周期性变化的符号映射发生在多个阶段，禁止符号在每个阶段都不同。在一些实施例中，所生成的数据由预编码器处理。

4. 发明授权

US06460150B1 Noise-predictive post-processing for PRML data channel 有权
标题翻译： PRML数据通道的噪声预测后处理
公开(公告)号：US06460150B1
公开(公告)日：2002-10-01
申请号：US09517352
申请日：2000-03-02
申请人： Roy D. Cideciyan , Jonathan Coker , Evangelos S. Eleftheriou , Richard Leo Galbraith
发明人： Roy D. Cideciyan , Jonathan Coker , Evangelos S. Eleftheriou , Richard Leo Galbraith
IPC分类号： H03M1300
CPC分类号： H03M13/6331 , G11B20/10009 , H03M13/2707 , H03M13/41 , H03M13/6343
摘要： A method for use in connection with any kind of detector that receives an input signal via a partial-response channel and which provides a detector output signal and a merge-bit signal. According to the present scheme, the colored noise of the input signal is whitened in order to provide a filtered signal. The filtered signal is filtered to provide a first output signal using a first matched filter and a second output signal using a second matched filter. The merge-bit signal is used to adjust the first matched filter to match a first most likely error event and to adjust the second matched filter to match a second most likely error event. It is then determined whether said first likely error event or said second likely error event is the most likely error event, and the actual errors of detector output signal are corrected using said most likely error event.
摘要翻译：一种与通过部分响应信道接收输入信号并提供检测器输出信号和合并位信号的任何种类的检测器结合使用的方法。根据本方案，为了提供滤波信号，输入信号的着色噪声变白。滤波的信号被滤波以使用第二匹配滤波器使用第一匹配滤波器和第二输出信号提供第一输出信号。合并位信号用于调整第一匹配滤波器以匹配第一最可能的错误事件并且调整第二匹配滤波器以匹配第二最可能的错误事件。然后确定所述第一可能错误事件或所述第二可能错误事件是否是最可能的错误事件，并且使用所述最可能的错误事件来校正检测器输出信号的实际误差。

5. 发明申请

US20090027242A1 HIGH-RATE RLL ENCODING 有权
标题翻译：高速RLL编码
公开(公告)号：US20090027242A1
公开(公告)日：2009-01-29
申请号：US12185095
申请日：2008-08-03
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
IPC分类号： H03M7/00
CPC分类号： H03M5/145 , G11B20/1426 , G11B2020/1446 , G11B2020/1473 , G11B2220/90 , G11B2220/956
摘要： An unencoded m-bit data input sequence is divided into a block of n bits and a block of m-n bits. The block of n bits is divided into a first set of n+1 encoded bits, wherein at least one of P1 subblocks of the first set satisfies a G, M and I constraints. The first set of n+1 encoded bits is mapped into a second set of n+1 encoded bits wherein at least one of P2 subblocks of the second set gives rise to at least Q1 transitions after 1/(1+D2) precoding. A second set of n+1 encoded bits is divided into P3 encoded subblocks and the P3 encoded subblocks are interleaved among (m−n)/s unencoded symbols so as to form a (m+1)-bit output sequence codeword which is then stored on a data storage medium.
摘要翻译：未编码的m位数据输入序列被分成n位块和m-n位块。 n位的块被划分为第一组n + 1个编码比特，其中第一组的P1个子块中的至少一个满足G，M和I约束。第一组n + 1个编码比特被映射到n + 1编码比特的第二组，其中第二组的P2子块中的至少一个在1 /（1 + D2）预编码之后产生至少Q1个转换。第二组n + 1编码比特被分成P3编码子块，并且P3编码子块在（mn）/ s个未编码符号之间进行交织，以形成第（m + 1）比特的输出序列码字，然后存储在数据存储介质。

6. 发明授权

US06901119B2 Method and apparatus for implementing soft-input/soft-output iterative detectors/decoders 失效
标题翻译：用于实现软输入/软输出迭代检测器/解码器的方法和装置
公开(公告)号：US06901119B2
公开(公告)日：2005-05-31
申请号：US09792325
申请日：2001-02-22
申请人： Roy Daron Cideciyan , Jonathan Darrel Coker , Ajay Dholakia , Evangelos S. Eleftheriou , Richard Leo Galbraith , Thomas Mittelholzer , David James Stanek
发明人： Roy Daron Cideciyan , Jonathan Darrel Coker , Ajay Dholakia , Evangelos S. Eleftheriou , Richard Leo Galbraith , Thomas Mittelholzer , David James Stanek
IPC分类号： G11B20/10 , G11B20/18 , H03M13/11 , H03M13/41 , H03M13/45 , H04L27/06 , H03D1/00
CPC分类号： H03M13/3905 , G11B20/10046 , G11B20/10055 , G11B20/10212 , G11B20/10287 , G11B20/10296 , G11B20/18 , H03M13/1102 , H03M13/2957 , H03M13/3961 , H03M13/4107 , H03M13/45 , H03M13/6331 , H03M13/6343 , H03M13/6502
摘要： A method and apparatus are provided for implementing soft-input soft-output iterative detectors/decoders. Soft-input information is added directly to incoming channel samples. Input signals comprising the received incoming channel samples with the added soft-input information are detected using a detector trellis. Branch metric terms are transformed to shift all time varying terms with the added soft-input information and some constant terms after an add compare select (ACS) unit. The shifted time varying terms with the added soft-input information and the shifted constant terms are added directly to state metric terms. The soft-input information is added directly to incoming channel samples and the computation of branch metrics is not affected. This allows optimization of a dual-max detector and soft-input soft-output Viterbi detector architectures to minimize hardware complexity and power consumption.
摘要翻译：提供了一种用于实现软输入软输出迭代检测器/解码器的方法和装置。软输入信息直接添加到输入信道样本。使用检测器网格来检测包括所接收的输入信道样本与附加的软输入信息的输入信号。转换分支度量项，以在添加的比较选择（ACS）单元之后用所添加的软输入信息和一些常数项来移位所有时变项。随着添加的软输入信息和移位常数项的移位的时变项直接添加到状态度量项。软输入信息直接添加到输入信道样本，并且分支度量的计算不受影响。这允许优化双最大检测器和软输入软输出维特比检测器架构，以最小化硬件复杂性和功耗。

7. 发明授权

US08930798B2 Data encoding in solid state storage devices 有权
标题翻译：固态存储设备中的数据编码
公开(公告)号：US08930798B2
公开(公告)日：2015-01-06
申请号：US13582768
申请日：2011-03-23
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Thomas Mittelholzer
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Thomas Mittelholzer
IPC分类号： H03M13/00 , H03M13/29 , H03M13/15 , G06F11/10
CPC分类号： H03M13/2906 , G06F11/1072 , H03M13/152 , H03M13/2942
摘要： Methods and apparatus are provided for encoding input data for recording in s-level storage of a solid state storage device, where s f 2. Input data words are encoded in groups of M input data words in accordance with first and second BCH codes to produce, for each group, a set of M first codewords of the first BCH code. The set of M first codewords is produced such that at least one predetermined linear combination of the M first codewords produces a second codeword of the second BCH code, this second BCH code being a sub-code of the first BCH code. The sets of M first codewords are then recorded in the s-level storage. If each of the first and second codewords comprises N q-ary symbols where q=pk, k is a positive integer and p is a prime number, the q-ary code alphabet can be matched to the s-ary storage by ensuring that q and s are uth and vth powers respectively of a common base r, where u and v are positive integers and k f u, whereby p(k/u)v=s.
摘要翻译：提供了用于编码用于在固态存储设备的s级存储中记录的输入数据的方法和装置，其中sf 2.根据第一和第二BCH码，输入数据字以M个输入数据字的组进行编码，对于每个组，第一BCH码的一组M个第一码字。产生M个第一码字集合，使得M个第一码字的至少一个预定线性组合产生第二BCH码的第二码字，该第二BCH码是第一BCH码的子码。然后将M组第一码字集合记录在s级存储器中。如果第一和第二码字中的每一个包括N q个符号，其中q = pk，k是正整数，p是质数，则可以通过确保q- 和s分别是公共基础r的uth和vth权力，其中u和v是正整数和kfu，由此p（k / u）v = s。

8. 发明授权

US08276045B2 ECC interleaving for multi-track recording on magnetic tape 有权
标题翻译：用于磁带上多轨记录的ECC交错
公开(公告)号：US08276045B2
公开(公告)日：2012-09-25
申请号：US12351738
申请日：2009-01-09
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Hisato Matsuo , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Hisato Matsuo , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
IPC分类号： G11C29/00
CPC分类号： H03M13/2909 , G11B20/1202 , G11B20/1833 , G11B20/1866 , G11B2020/1836 , G11B2020/1853 , G11B2220/93 , H03M13/15 , H03M13/1515
摘要： Conventional C2 coding and interleaving for multi-track data tape in LTO-3/4 do not support recording data onto a number of concurrent tracks which is not a power of two. Higher-rate longer C2 codes, which do not degrade error rate performance, are provided. An adjustable format and interleaving scheme accommodates future tape drives in which the number of concurrent tracks is not necessarily a power of two. A data set is segmented into a plurality of unencoded subdata sets and parity bytes are generated for each row and column. The parameters of the C2 code include N2 as the least common multiple of the number of possible tracks to which codeword objects are to be written. COs are formed from N2 C1 codewords, mapped onto a logical data track according to information within headers of the CO and modulation encoded into synchronized COs which are written to the tape.
摘要翻译： LTO-3/4中的多轨数据磁带的常规C2编码和交织不支持将数据记录到不是2的幂的多个并发磁道上。提供了更高速率的更长的C2代码，这不会降低错误率性能。可调格式和交错方案适应将来的磁带驱动器，其中并发轨道的数量不一定是二的幂。将数据集分割为多个未编码的子数据集，并为每行和列生成奇偶校验字节。 C2码的参数包括N2作为要写入码字对象的可能轨道数的最小公倍数。 CO由N 2 C1码字形成，根据被写入到磁带的编码到同步的CO中的CO和报头中的信息映射到逻辑数据轨道。

9. 发明授权

US07876516B2 Rewrite-efficient ECC/interleaving for multi-track recording on magnetic tape 有权
标题翻译：在磁带上进行多轨录音的高效ECC /交错
公开(公告)号：US07876516B2
公开(公告)日：2011-01-25
申请号：US12351747
申请日：2009-01-09
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Hisato Matsuo , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Hisato Matsuo , Thomas Mittelholzer , Paul J. Seger , Keisuke Tanaka
IPC分类号： G11B5/09 , G11B20/14
CPC分类号： G11B20/1833 , G11B20/1201 , G11B20/1866 , G11B2020/1287 , G11B2020/1289 , G11B2020/1446 , G11B2020/1836 , G11B2220/93 , H03M13/27 , H03M13/271
摘要： For writing data to multi-track tape, a received data set is received and segmented into unencoded subdata sets, each comprising an array having K2 rows and K1 columns. For each unencoded subdata set, N1-K1 C1-parity bytes are generated for each row and N2-K2 C2-parity bytes are generated for each column. The C1 and C2 parity bytes are appended to the ends of the row and column, respectively, to form encoded C1 and C2 codewords, respectively. All of the C1 codewords per data set are endowed with a specific codeword header to form a plurality of partial codeword objects (PCOs). Each PCO is mapped onto a logical data track according to information within the header. On each logical data track, adjacent PCOs are merged to form COs which are modulation encoded and mapped into synchronized COs. Then T synchronized COs are written simultaneously to the data tape where T is the number of concurrent active tracks on the data tape.
摘要翻译：为了将数据写入多轨磁带，接收到的数据集并被分割成未编码的子数据集，每个子集包括具有K2行和K1列的阵列。对于每个未编码的子数据集，为每行生成N1-K1 C1-奇偶校验字节，并为每列生成N2-K2 C2-奇偶校验字节。 C1和C2奇偶校验字节分别附加到行和列的末端，分别形成编码的C1和C2码字。每个数据集的所有C1码字都具有特定的码字头以形成多个部分码字对象（PCO）。每个PCO根据标题内的信息被映射到逻辑数据轨道上。在每个逻辑数据轨道上，相邻的PCO被合并以形成被调制编码并被映射到同步的CO中的CO。然后将T同步的CO同时写入数据磁带，其中T是数据磁带上的并发活动磁道的数量。

10. 发明授权

US07694205B2 Method and apparatus for providing a read channel having combined parity and non-parity post processing 有权
标题翻译：用于提供具有组合奇偶校验和非奇偶校验后处理的读通道的方法和装置
公开(公告)号：US07694205B2
公开(公告)日：2010-04-06
申请号：US11067851
申请日：2005-02-28
申请人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning
发明人： Roy D. Cideciyan , Ajay Dholakia , Evangelos S. Eleftheriou , Richard L. Galbraith , Weldon M. Hanson , Thomas Mittelholzer , Travis R. Oenning
IPC分类号： G11C29/00 , H03M13/00
CPC分类号： H03M13/45 , G11B20/10009 , G11B20/10055 , G11B20/1833 , G11B2020/1863 , H03M13/098 , H03M13/6343
摘要： A method and apparatus for providing a read channel having combined parity and non-parity post processing is disclosed. A post-processor combines parity and non-parity post processing to make both parity and non-parity corrections so that error events that cannot be detected by parity may be corrected. Non-parity detectable error events are only kept for consideration if their likelihood is above a set threshold.
摘要翻译：公开了一种用于提供具有组合奇偶校验和非奇偶校验后处理的读通道的方法和装置。后处理器组合奇偶校验和非奇偶校验后处理以进行奇偶校验和非奇偶校正，从而校正不能被奇偶校验检测到的错误事件。只有当它们的可能性高于设定的阈值时，才能保持非奇偶校验可检测误差事件。

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