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31. 发明授权

US06431185B1 Apparatus and method for cleaning a semiconductor substrate 失效
标题翻译：用于清洁半导体衬底的装置和方法
公开(公告)号：US06431185B1
公开(公告)日：2002-08-13
申请号：US09401864
申请日：1999-09-22
申请人： Hiroshi Tomita , Soichi Nadahara , Motoyuki Sato
发明人： Hiroshi Tomita , Soichi Nadahara , Motoyuki Sato
IPC分类号： B08B600
CPC分类号： H01L21/67051 , B08B3/02 , B08B2203/0288 , Y10S134/902
摘要： There is proposed an apparatus and method for cleaning a semiconductor substrate, which make it possible to minimize the adhesion of mist in a cleaning tank at the occasion of cleaning a semiconductor substrate, to realize a high removal effect of residual polishing particles, and to enable to obtain a clean surface. In view of preventing a mist generated by the jet of high pressure water from re-adhering to the substrate during the cleaning of a semiconductor substrate, a cover member is disposed at a mist-generating region so as to prevent the splash of the mist. Additionally, a cavity is caused to generate by contacting a high pressure water with a still water, and high-frequency generated by the generation of the cavity is utilized for removing the residual polishing particles. Alternatively, the ejection of high pressure water against the surface of the substrate is performed in a liquid phase such as ultrapure water, thereby preventing the generation of mist.
摘要翻译：提出了一种用于清洁半导体衬底的装置和方法，这使得可以在清洁半导体衬底的情况下最小化清洗槽中的雾的粘附性，以实现残留的抛光颗粒的高的去除效果，并且使得能够以获得干净的表面。考虑到在清洁半导体衬底期间防止高压水射流产生的雾再次粘附到衬底上，在雾化产生区域处设置一个盖构件，以防止雾沫的飞溅。此外，通过使高压水与静止水接触而产生空腔，并且通过产生空腔产生的高频被用于去除残留的抛光颗粒。或者，将高压水喷射到基板的表面，以超纯水等液相进行，从而防止产生雾。

32. 发明申请

US20120074504A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120074504A1
公开(公告)日：2012-03-29
申请号：US13289111
申请日：2011-11-04
申请人： Motoyuki Sato , Takeshi Watanabe
发明人： Motoyuki Sato , Takeshi Watanabe
IPC分类号： H01L27/092
CPC分类号： H01L21/823857 , H01L21/823842 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： A semiconductor device fabrication method includes forming a first gate electrode via a first gate insulating film on a P-type semiconductor region formed in a surface portion of a semiconductor substrate; forming a second gate electrode via a second gate insulating film on an N-type semiconductor region formed in the surface portion of the semiconductor substrate; forming a first insulating film; forming a second insulating film; forming a mask having a pattern corresponding to the P-type semiconductor region; etching away the second insulating film by using the mask; removing the mask; and forming a first gate electrode sidewall insulating film and forming a second gate electrode sidewall insulating film.
摘要翻译：半导体器件制造方法包括：在形成于半导体衬底的表面部分的P型半导体区域上经由第一栅极绝缘膜形成第一栅电极; 通过形成在所述半导体衬底的表面部分中的N型半导体区域上的第二栅极绝缘膜形成第二栅电极; 形成第一绝缘膜; 形成第二绝缘膜; 形成具有对应于所述P型半导体区域的图案的掩模; 通过使用掩模蚀刻掉第二绝缘膜; 去除面膜; 以及形成第一栅电极侧壁绝缘膜并形成第二栅电极侧壁绝缘膜。

33. 发明授权

US08076193B2 CMOS device fabrication method with PMOS interface insulating film formed concurrently with sidewall insulating film 失效
标题翻译：具有与侧壁绝缘膜同时形成的PMOS接口绝缘膜的CMOS器件制造方法
公开(公告)号：US08076193B2
公开(公告)日：2011-12-13
申请号：US11377686
申请日：2006-03-17
申请人： Motoyuki Sato , Takeshi Watanabe
发明人： Motoyuki Sato , Takeshi Watanabe
IPC分类号： H01L21/283 , H01L21/336
CPC分类号： H01L21/823857 , H01L21/823842 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： According to one aspect of the invention, there is provided a semiconductor device fabrication method comprising: forming a first gate electrode via a first gate insulating film on a P-type semiconductor region formed in a surface portion of a semiconductor substrate, and forming a second gate electrode via a second gate insulating film on an N-type semiconductor region formed in the surface portion of the semiconductor substrate; forming a first insulating film on side surfaces of the first gate electrode and the first gate insulating film, and forming a second insulating film on side surfaces of the second gate electrode and the second gate insulating film; forming a mask having a pattern corresponding to the P-type semiconductor region; etching away the second insulating film by using the mask; removing the mask; and forming a first gate electrode sidewall insulating film on the side surfaces of the first insulating film, and forming a second gate electrode sidewall insulating film on the side surfaces of the second gate electrode and the second gate insulating film, thereby forming an interface insulating film in an interface between the second gate electrode and the second gate insulating film.
摘要翻译：根据本发明的一个方面，提供一种半导体器件制造方法，包括：在形成在半导体衬底的表面部分中的P型半导体区域上经由第一栅极绝缘膜形成第一栅电极，并形成第二栅电极在半导体衬底的表面部分中形成的N型半导体区域上的第二栅极绝缘膜; 在第一栅极电极和第一栅极绝缘膜的侧表面上形成第一绝缘膜，并在第二栅极电极和第二栅极绝缘膜的侧表面上形成第二绝缘膜; 形成具有对应于所述P型半导体区域的图案的掩模; 通过使用掩模蚀刻掉第二绝缘膜; 去除面膜; 以及在所述第一绝缘膜的侧表面上形成第一栅电极侧壁绝缘膜，并在所述第二栅电极和所述第二栅极绝缘膜的侧表面上形成第二栅电极侧壁绝缘膜，从而形成界面绝缘膜在第二栅极电极和第二栅极绝缘膜之间的界面中。

34. 发明申请

US20100173487A1 Semiconductor apparatus and method of manufacturing the semiconductor apparatus 有权
公开(公告)号：US20100173487A1
公开(公告)日：2010-07-08
申请号：US12654559
申请日：2009-12-23
申请人： Akio Kaneko , Kazuhiro Eguchi , Seiji Inumiya , Katsuyuki Sekine , Motoyuki Sato
发明人： Akio Kaneko , Kazuhiro Eguchi , Seiji Inumiya , Katsuyuki Sekine , Motoyuki Sato
IPC分类号： H01L21/28
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28211 , H01L27/115 , H01L27/1203 , H01L29/513 , H01L29/517 , H01L29/665 , H01L29/66825 , H01L29/78
摘要： A semiconductor apparatus wherein a device formed on a semiconductor substrate comprises a gate insulating film including a high dielectric constant film formed on the substrate and an anti-reaction film formed on the high dielectric constant film, and a gate electrode formed on the anti-reaction film, the high dielectric constant film comprises a film containing at least one of Hf and Zr, and Si and O, or a film containing at least one of Hf and Zr, and Si, O and N, the anti-reaction film comprises an SiO2 film, a film containing SiO2 as a main component and at least one of Hf and Zr, a film containing SiO2 as a main component and N, a film containing SiO2 as a main component, Hf and N, a film containing SiO2 as a main component, Zr and N, or a film containing SiO2 as a main component, Hf, Zr and N.

35. 发明申请

US20100159686A1 Semiconductor device and method of manufacturing the same 有权
公开(公告)号：US20100159686A1
公开(公告)日：2010-06-24
申请号：US12659250
申请日：2010-03-02
申请人： Akio Kaneko , Seiji Inumiya , Katsuyuki Sekine , Kazuhiro Eguchi , Motoyuki Sato
发明人： Akio Kaneko , Seiji Inumiya , Katsuyuki Sekine , Kazuhiro Eguchi , Motoyuki Sato
IPC分类号： H01L21/28
CPC分类号： H01L21/28194 , H01L21/28079 , H01L21/823842 , H01L21/823857 , H01L29/495 , H01L29/513 , H01L29/517 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device according to the present invention comprises a semiconductor substrate, a gate insulating film which is composed of a material whose main component is a tetravalent metal oxide, a mixture of a tetravalent metal oxide and SiO2, or a mixture of a tetravalent metal oxide and SiON and which containing B when it is in an nMOS structure on the semiconductor substrate or containing at least one of P and As when it is in a pMOS structure on the semiconductor substrate, and a gate electrode made of a metal having a work function of 4 eV to 5.5 eV.

36. 发明授权

US07652341B2 Semiconductor apparatus having a semicondutor element with a high dielectric constant film 有权
标题翻译：具有具有高介电常数膜的半导体元件的半导体装置
公开(公告)号：US07652341B2
公开(公告)日：2010-01-26
申请号：US11889278
申请日：2007-08-10
申请人： Akio Kaneko , Kazuhiro Eguchi , Seiji Inumiya , Katsuyuki Sekine , Motoyuki Sato
发明人： Akio Kaneko , Kazuhiro Eguchi , Seiji Inumiya , Katsuyuki Sekine , Motoyuki Sato
IPC分类号： H01L29/78
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28211 , H01L27/115 , H01L27/1203 , H01L29/513 , H01L29/517 , H01L29/665 , H01L29/66825 , H01L29/78
摘要： A semiconductor apparatus wherein a device formed on a semiconductor substrate comprises a gate insulating film including a high dielectric constant film formed on the substrate and an anti-reaction film formed on the high dielectric constant film, and a gate electrode formed on the anti-reaction film, the high dielectric constant film comprises a film containing at least one of Hf and Zr, and Si and O, or a film containing at least one of Hf and Zr, and Si, O and N, the anti-reaction film comprises an SiO2 film, a film containing SiO2 as a main component and at least one of Hf and Zr, a film containing SiO2 as a main component and N, a film containing SiO2 as a main component, Hf and N, a film containing SiO2 as a main component, Zr and N, or a film containing SiO2 as a main component, Hf, Zr and N.
摘要翻译：一种半导体装置，其中形成在半导体衬底上的器件包括栅极绝缘膜，该栅极绝缘膜包括形成在基底上的高介电常数膜和形成在高介电常数膜上的抗反应膜，以及形成在抗反应上的栅电极高介电常数膜包括含有Hf和Zr中的至少一种以及Si和O的膜，或包含Hf和Zr中的至少一种以及Si，O和N的膜，所述抗反应膜包括 SiO 2膜，含有SiO 2作为主要成分的膜和Hf和Zr中的至少一种，以SiO 2为主要成分的膜和N，以SiO 2为主要成分的膜，Hf和N，含有SiO 2作为主成分Zr和N，或以SiO2为主要成分的膜，Hf，Zr和N.

37. 发明申请

US20090032883A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20090032883A1
公开(公告)日：2009-02-05
申请号：US12183138
申请日：2008-07-31
申请人： Koji WATANABE , Motoyuki Sato
发明人： Koji WATANABE , Motoyuki Sato
IPC分类号： H01L27/092 , H01L29/78
CPC分类号： H01L21/823835 , H01L21/28097 , H01L21/28202 , H01L21/823842 , H01L29/4975 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： Disclosed is a semiconductor device which comprises one or more metal-insulator-semiconductor field effect transistors (MISFETs), each including: a gate insulating film composed of a silicon oxide film, a first hafnium-containing nitrided silicate film, and a second hafnium-containing nitrided silicate film which are sequentially deposited on a substrate; and a gate structure having an electrode consisting of a metal silicide deposited on the gate insulating film. The first hafnium-containing nitrided silicate film has a hafnium concentration in a range from 5 to 10% and has a nitrogen concentration in a range from 5 to 10%. The second hafnium-containing nitrided silicate film has a hafnium concentration in a range from 50 to 60% and has a nitrogen concentration in a range from 20 to 45%. The gate insulating film has a thickness in a range from 1.8 to 3.0 nm.
摘要翻译：公开了一种半导体器件，其包括一个或多个金属 - 绝缘体 - 半导体场效应晶体管（MISFET），每个包括：由氧化硅膜，第一含铪氮化硅酸盐膜和第二铪 - 含氮化硅酸盐膜依次沉积在基材上; 以及具有由沉积在栅极绝缘膜上的金属硅化物组成的电极的栅极结构。第一含铪的氮化硅酸盐膜的铪浓度为5〜10％，氮浓度为5〜10％。第二含铪的氮化硅酸盐膜的铪浓度为50〜60％，氮浓度为20〜45％。栅极绝缘膜的厚度为1.8〜3.0nm。

38. 发明授权

US07265427B2 Semiconductor apparatus and method of manufacturing the semiconductor apparatus 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07265427B2
公开(公告)日：2007-09-04
申请号：US10927115
申请日：2004-08-27
申请人： Akio Kaneko , Kazuhiro Eguchi , Seiji Inumiya , Katsuyuki Sekine , Motoyuki Sato
发明人： Akio Kaneko , Kazuhiro Eguchi , Seiji Inumiya , Katsuyuki Sekine , Motoyuki Sato
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28211 , H01L27/115 , H01L27/1203 , H01L29/513 , H01L29/517 , H01L29/665 , H01L29/66825 , H01L29/78
摘要： A semiconductor apparatus wherein a device formed on a semiconductor substrate comprises a gate insulating film including a high dielectric constant film formed on the substrate and an anti-reaction film formed on the high dielectric constant film, and a gate electrode formed on the anti-reaction film, the high dielectric constant film comprises a film containing at least one of Hf and Zr, and Si and O, or a film containing at least one of Hf and Zr, and Si, O and N, the anti-reaction film comprises an SiO2 film, a film containing SiO2 as a main component and at least one of Hf and Zr, a film containing SiO2 as a main component and N, a film containing SiO2 as a main component, Hf and N, a film containing SiO2 as a main component, Zr and N, or a film containing SiO2 as a main component, Hf, Zr and N.
摘要翻译：一种半导体装置，其中形成在半导体衬底上的器件包括栅极绝缘膜，该栅极绝缘膜包括形成在基底上的高介电常数膜和形成在高介电常数膜上的抗反应膜，以及形成在抗反应上的栅电极高介电常数膜包括含有Hf和Zr中的至少一种以及Si和O的膜，或包含Hf和Zr中的至少一种以及Si，O和N的膜，所述抗反应膜包括 SiO 2膜，含有SiO 2作为主要成分的膜和Hf和Zr中的至少一种的膜，含有SiO 2的膜作为主要成分为N，以SiO 2为主要成分的膜，Hf和N，以SiO 2为主要成分的膜，Zr和N，或膜含有SiO 2作为主要成分的Hf，Zr和N.

39. 发明授权

US07220681B2 Semiconductor device and method of fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07220681B2
公开(公告)日：2007-05-22
申请号：US11049671
申请日：2005-02-04
申请人： Katsuyuki Sekine , Akio Kaneko , Motoyuki Sato , Seiji Inumiya , Kazuhiro Eguchi
发明人： Katsuyuki Sekine , Akio Kaneko , Motoyuki Sato , Seiji Inumiya , Kazuhiro Eguchi
IPC分类号： H01L21/31
CPC分类号： C23C16/401 , C23C16/56 , H01L21/02329 , H01L21/3145
摘要： A semiconductor device including a gate insulating film selectively formed on a predetermined region of a semiconductor substrate; a gate electrode formed on said gate insulating film; and a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode; wherein a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5×1022 atoms/cm3.
摘要翻译：一种半导体器件，包括选择性地形成在半导体衬底的预定区域上的栅极绝缘膜; 形成在所述栅极绝缘膜上的栅电极; 以及在所述半导体衬底的表面部分中形成在位于所述栅电极下方的沟道区的两侧上的源极区和漏极区; 其中所述栅极绝缘膜与所述栅电极接触的界面中的碳浓度不大于5×10 22原子/ cm 3。

40. 发明申请

US20060094255A1 Semiconductor device and method of fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060094255A1
公开(公告)日：2006-05-04
申请号：US11049671
申请日：2005-02-04
申请人： Katsuyuki Sekine , Akio Kaneko , Motoyuki Sato , Seiji Inumiya , Kazuhiro Eguchi
发明人： Katsuyuki Sekine , Akio Kaneko , Motoyuki Sato , Seiji Inumiya , Kazuhiro Eguchi
IPC分类号： H01L21/31
CPC分类号： C23C16/401 , C23C16/56 , H01L21/02329 , H01L21/3145
摘要： According to the present invention, there is provided a semiconductor device comprising: a gate insulating film selectively formed on a predetermined region of a semiconductor substrate; a gate electrode formed on said gate insulating film; and a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode, wherein a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5×1022 atoms/cm3.
摘要翻译：根据本发明，提供了一种半导体器件，包括：选择性地形成在半导体衬底的预定区域上的栅极绝缘膜; 形成在所述栅极绝缘膜上的栅电极; 以及在所述半导体衬底的表面部分中形成在位于所述栅极电极下方的沟道区域的两侧上的源极区和漏极区，其中所述栅极绝缘膜与所述栅电极接触的界面中的碳浓度不大于5×10 22个原子/ cm 3。

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