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31. 发明申请

US20130092894A1 MEMORY CELLS AND MEMORY CELL ARRAYS 有权
标题翻译：记忆细胞和记忆细胞阵列
公开(公告)号：US20130092894A1
公开(公告)日：2013-04-18
申请号：US13275168
申请日：2011-10-17
申请人： Scott E. Sills , Gurtej S. Sandhu , Sanh D. Tang , John Smythe
发明人： Scott E. Sills , Gurtej S. Sandhu , Sanh D. Tang , John Smythe
IPC分类号： H01L47/00
CPC分类号： H01L45/1226 , H01L27/2409 , H01L27/2427 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/085 , H01L45/124 , H01L45/1266 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/145 , H01L45/146 , H01L45/148
摘要： Some embodiments include memory cells. The memory cells may have a first electrode, and a trench-shaped programmable material structure over the first electrode. The trench-shape defines an opening. The programmable material may be configured to reversibly retain a conductive bridge. The memory cell may have an ion source material directly against the programmable material, and may have a second electrode within the opening defined by the trench-shaped programmable material. Some embodiments include arrays of memory cells. The arrays may have first electrically conductive lines, and trench-shaped programmable material structures over the first lines. The trench-shaped structures may define openings within them. Ion source material may be directly against the programmable material, and second electrically conductive lines may be over the ion source material and within the openings defined by the trench-shaped structures.
摘要翻译：一些实施例包括存储器单元。存储单元可以具有第一电极和在第一电极上方的沟槽状可编程材料结构。沟槽形状限定开口。可编程材料可以被配置为可逆地保持导电桥。存储单元可以具有直接抵靠可编程材料的离子源材料，并且可以在由沟槽状可编程材料限定的开口内具有第二电极。一些实施例包括存储器单元阵列。阵列可以具有第一导电线，以及在第一线上的沟槽状可编程材料结构。沟槽状结构可以在其内限定开口。离子源材料可以直接抵靠可编程材料，并且第二导电线可以在离子源材料之上并且在由沟槽状结构限定的开口内。

32. 发明授权

US08409915B2 Methods of forming memory cells 有权
标题翻译：形成记忆细胞的方法
公开(公告)号：US08409915B2
公开(公告)日：2013-04-02
申请号：US12886283
申请日：2010-09-20
申请人： John Smythe , Gurtej S. Sandhu
发明人： John Smythe , Gurtej S. Sandhu
IPC分类号： H01L21/00
CPC分类号： H01L45/145 , H01L27/2409 , H01L27/2472 , H01L27/2481
摘要： Some embodiments include methods of forming memory cells utilizing various arrangements of conductive lines, electrodes and programmable material; with the programmable material containing high k dielectric material directly against multivalent metal oxide. Some embodiments include arrays of memory cells, with the memory cells including programmable material containing high k dielectric material directly against multivalent metal oxide.
摘要翻译：一些实施例包括利用导电线，电极和可编程材料的各种布置形成存储单元的方法; 其中可编程材料含有高k电介质材料直接抵抗多价金属氧化物。一些实施例包括存储器单元的阵列，其中存储单元包括直接对抗多价金属氧化物的含有高k电介质材料的可编程材料。

33. 发明申请

US20110315944A1 RESISTIVE MEMORY AND METHODS OF PROCESSING RESISTIVE MEMORY 有权
公开(公告)号：US20110315944A1
公开(公告)日：2011-12-29
申请号：US13226950
申请日：2011-09-07
申请人： Gurtej S. Sandhu , John Smythe
发明人： Gurtej S. Sandhu , John Smythe
IPC分类号： H01L45/00 , H01L21/8239
CPC分类号： H01L45/04 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/1273 , H01L45/14 , H01L45/143 , H01L45/146 , H01L45/147 , H01L45/16 , H01L45/1658
摘要： Resistive memory and methods of processing resistive memory are described herein. One or more method embodiments of processing resistive memory include conformally forming a cell material in an opening in an interlayer dielectric such that a seam is formed in the cell material, forming a conductive pathway by modifying the seam, and forming an electrode on the cell material and the seam.

34. 发明授权

US08048755B2 Resistive memory and methods of processing resistive memory 有权
标题翻译：电阻记忆和处理电阻记忆的方法
公开(公告)号：US08048755B2
公开(公告)日：2011-11-01
申请号：US12701885
申请日：2010-02-08
申请人： Gurtej S. Sandhu , John Smythe
发明人： Gurtej S. Sandhu , John Smythe
IPC分类号： H01L21/20 , H01L29/00 , G11C11/00
CPC分类号： H01L45/04 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/1273 , H01L45/14 , H01L45/143 , H01L45/146 , H01L45/147 , H01L45/16 , H01L45/1658
摘要： Resistive memory and methods of processing resistive memory are described herein. One or more method embodiments of processing resistive memory include conformally forming a cell material in an opening in an interlayer dielectric such that a seam is formed in the cell material, forming a conductive pathway by modifying the seam, and forming an electrode on the cell material and the seam.
摘要翻译：本文描述了电阻存储器和处理电阻性存储器的方法。处理电阻性存储器的一个或多个方法实施例包括在层间电介质的开口中共形形成电池材料，使得在电池材料中形成接缝，通过改变接缝形成导电通路，并在电池材料上形成电极和接缝。

35. 发明授权

US07927975B2 Semiconductor material manufacture 有权
标题翻译：半导体材料制造
公开(公告)号：US07927975B2
公开(公告)日：2011-04-19
申请号：US12365734
申请日：2009-02-04
申请人： Nishant Sinha , Gurtej S. Sandhu , John Smythe
发明人： Nishant Sinha , Gurtej S. Sandhu , John Smythe
IPC分类号： H01L21/00
CPC分类号： H01L21/76254
摘要： Electronic apparatus, systems, and methods include a semiconductor layer bonded to a bulk region of a wafer or a substrate, in which the semiconductor layer can be bonded to the bulk region using electromagnetic radiation. Additional apparatus, systems, and methods are disclosed.
摘要翻译：电子设备，系统和方法包括结合到晶片或基板的主体区域的半导体层，其中半导体层可以使用电磁辐射结合到主体区域。公开了附加装置，系统和方法。

36. 发明申请

US20100219501A1 TRENCH ISOLATION IMPLANTATION 有权
标题翻译：扩张隔离植被
公开(公告)号：US20100219501A1
公开(公告)日：2010-09-02
申请号：US12758488
申请日：2010-04-12
申请人： Gurtej S. Sandhu , John Smythe
发明人： Gurtej S. Sandhu , John Smythe
IPC分类号： H01L21/762 , H01L29/06
CPC分类号： H01L21/76237 , G11C11/401 , H01L27/10844 , H01L27/11517
摘要： Embodiments of the disclosure include a shallow trench isolation structure having a dielectric material with energetic species implanted to a predetermined depth of the dielectric material. Embodiments further include methods of fabricating the trench structures with the implant of energetic species to the predetermined depth. In various embodiments the implant of energetic species is used to densify the dielectric material to provide a uniform wet etch rate across the surface of the dielectric material. Embodiments also include memory devices, integrated circuits, and electronic systems that include shallow trench isolation structures having the dielectric material with the high flux of energetic species implanted to the predetermined depth of the dielectric material.
摘要翻译：本公开的实施例包括浅沟槽隔离结构，其具有将能量物质注入电介质材料的预定深度的电介质材料。实施例还包括使能量物质的植入物到预定深度制造沟槽结构的方法。在各种实施例中，能量物质的注入用于致密化电介质材料，以提供穿过电介质材料表面的均匀的湿蚀刻速率。实施例还包括存储器件，集成电路和电子系统，其包括浅沟槽隔离结构，其具有植入到介电材料的预定深度的高能量物质的高通量的电介质材料。

37. 发明授权

US08674336B2 Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays 有权
标题翻译：非易失性电阻氧化物存储单元，非易失性电阻氧化物存储器阵列以及形成非易失性电阻氧化物存储器单元和存储器阵列的方法
公开(公告)号：US08674336B2
公开(公告)日：2014-03-18
申请号：US13231667
申请日：2011-09-13
申请人： John Smythe , Bhaskar Srinivasan , Gurtej S. Sandhu
发明人： John Smythe , Bhaskar Srinivasan , Gurtej S. Sandhu
IPC分类号： H01L45/00
CPC分类号： H01L45/04 , G11C11/56 , G11C13/00 , H01L27/2463 , H01L45/1233 , H01L45/146 , H01L45/147 , H01L45/1666
摘要： A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Insulative material is deposited over the first electrode. An opening is formed into the insulative material over the first electrode. The opening includes sidewalls and a base. The opening sidewalls and base are lined with a multi-resistive state layer comprising multi-resistive state metal oxide-comprising material which less than fills the opening. A second conductive electrode of the memory cell is formed within the opening laterally inward of the multi-resistive state layer lining the sidewalls and elevationally over the multi-resistive state layer lining the base. Other aspects and implementations are contemplated.
摘要翻译：一种形成非易失性电阻氧化物存储单元的方法包括形成存储单元的第一导电电极作为衬底的一部分。绝缘材料沉积在第一电极上。在第一电极上形成绝缘材料的开口。开口包括侧壁和底座。开口侧壁和基底衬有包含少于填充开口的多电阻态金属氧化物材料的多电阻状态层。存储单元的第二导电电极形成在多个电阻状态层的横向内侧的开口的内部，该电阻层衬在侧壁上并且在衬底基底上的多电阻状态层上。考虑了其他方面和实现。

38. 发明授权

US08304353B2 Silicon dioxide deposition methods using at least ozone and TEOS as deposition precursors 有权
标题翻译：至少使用臭氧和TEOS作为沉积前体的二氧化硅沉积方法
公开(公告)号：US08304353B2
公开(公告)日：2012-11-06
申请号：US13247088
申请日：2011-09-28
申请人： John Smythe , Gurtej S. Sandhu
发明人： John Smythe , Gurtej S. Sandhu
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/31612 , H01L21/02164 , H01L21/02304 , H01L21/02312 , H01L21/02315 , H01L21/3105
摘要： Embodiments disclosed herein pertain to silicon dioxide deposition methods using at least ozone and tetraethylorthosilicate (TEOS) as deposition precursors. In one embodiment, a silicon dioxide deposition method using at least ozone and TEOS as deposition precursors includes flowing precursors comprising ozone and TEOS to a substrate under subatmospheric pressure conditions effective to deposit silicon dioxide-comprising material having an outer surface onto the substrate. The outer surface is treated effective to one of add hydroxyl to or remove hydroxyl from the outer surface in comparison to any hydroxyl presence on the outer surface prior to said treating. After the treating, precursors comprising ozone and TEOS are flowed to the substrate under subatmospheric pressure conditions effective to deposit silicon dioxide-comprising material onto the treated outer surface of the substrate. Other embodiments are contemplated.
摘要翻译：本文公开的实施方案涉及至少使用臭氧和原硅酸四乙酯（TEOS）作为沉积前体的二氧化硅沉积方法。在一个实施方案中，使用至少臭氧和TEOS作为沉积前体的二氧化硅沉积方法包括在低于大气压的压力条件下将包含臭氧和TEOS的前体流入基底，以有效地将具有外表面的含二氧化硅的材料沉积到基底上。与所述处理之前的外表面上的任何羟基存在相比，外表面被有效地对从外表面添加羟基或除去羟基之一进行处理。在处理之后，包含臭氧和TEOS的前体在有效将含二氧化硅的材料沉积到经处理的基底的外表面上的低于大气压的压力条件下流到基底。预期其他实施例。

39. 发明授权

US08034315B2 Methods of forming devices comprising carbon nanotubes 有权
标题翻译：形成包含碳纳米管的器件的方法
公开(公告)号：US08034315B2
公开(公告)日：2011-10-11
申请号：US12235244
申请日：2008-09-22
申请人： Nishant Sinha , Gurtej S. Sandhu , Eugene Marsh , Neil Greeley , John Smythe
发明人： Nishant Sinha , Gurtej S. Sandhu , Eugene Marsh , Neil Greeley , John Smythe
IPC分类号： H01L29/72
CPC分类号： H01L51/0591 , B82Y10/00 , G11C13/025 , G11C2213/19 , H01L45/04 , H01L45/1226 , H01L45/1233 , H01L45/149 , H01L45/1608 , H01L45/1675 , H01L45/1683 , H01L51/0048 , Y10S977/712 , Y10S977/721 , Y10S977/745 , Y10S977/748 , Y10S977/764 , Y10S977/765 , Y10S977/781
摘要： Some embodiments include devices that contain bundles of CNTs. An undulating topography extends over the CNTs and within spaces between the CNTs. A global maximum lateral width is defined as the greatest lateral width of any of the spaces. A material is directly over the CNTs, with the material being a plurality of particles that have minimum cross-sectional equatorial widths exceeding the global maximum lateral width. Some embodiments include methods in which a plurality of crossed carbon nanotubes are formed over a semiconductor substrate. The CNTs form an undulating upper topography extending across the CNTs and within spaces between the CNTs. A global maximum lateral width is defined as the greatest lateral width of any of the spaces. A material is deposited over the CNTs, with the material being deposited as particles that have minimum cross-sectional equatorial widths exceeding the global maximum lateral width.
摘要翻译：一些实施方案包括含有CNT束的装置。起伏的形貌在碳纳米管之间和CNT之间的空间内延伸。全局最大横向宽度被定义为任何空间的最大横向宽度。材料直接在碳纳米管之上，其中材料是具有超过全局最大横向宽度的最小横截面赤道宽度的多个颗粒。一些实施例包括在半导体衬底上形成多个交叉碳纳米管的方法。 CNT形成延伸跨过CNT并且在CNT之间的空间内的波状上部形貌。全局最大横向宽度被定义为任何空间的最大横向宽度。材料沉积在CNT上，其中材料被沉积成具有超过全局最大横向宽度的最小横截面赤道宽度的颗粒。

40. 发明申请

US20110193190A1 SEMICONDUCTOR MATERIAL MANUFACTURE 有权
标题翻译：半导体材料制造
公开(公告)号：US20110193190A1
公开(公告)日：2011-08-11
申请号：US13088863
申请日：2011-04-18
申请人： Nishant Sinha , Gurtej S. Sandhu , John Smythe
发明人： Nishant Sinha , Gurtej S. Sandhu , John Smythe
IPC分类号： H01L29/06 , H01L21/762
CPC分类号： H01L21/76254
摘要： Electronic apparatus, systems, and methods include a semiconductor layer bonded to a bulk region of a wafer or a substrate, in which the semiconductor layer can be bonded to the bulk region using electromagnetic radiation. Additional apparatus, systems, and methods are disclosed.
摘要翻译：电子设备，系统和方法包括结合到晶片或基板的主体区域的半导体层，其中半导体层可以使用电磁辐射结合到主体区域。公开了附加装置，系统和方法。

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