专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明申请

US20060197136A1 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US20060197136A1
公开(公告)日：2006-09-07
申请号：US11346293
申请日：2006-02-03
申请人： Takuya Futatsuyama , Toshiya Kotani , Hiromitsu Mashita , Atsushi Maesono , Ayako Nakano , Tadahito Fujisawa
发明人： Takuya Futatsuyama , Toshiya Kotani , Hiromitsu Mashita , Atsushi Maesono , Ayako Nakano , Tadahito Fujisawa
IPC分类号： H01L29/76
CPC分类号： H01L27/115 , H01L27/11517
摘要： According to this invention, the NAND type flash memory of high reliability is realized. It provides a semiconductor memory device comprising: a plurality of memory cells; a plurality of word lines formed by a first gate wiring layer; a plurality of first transistors for providing voltages to said word lines; and electrical connections for connection said word lines and sources or drains of said first transistors, said electrical connections being formed of both first wirings of a first wiring layer formed above said first gate wiring layer and second wirings of a second wiring layers formed above said first wiring layer.
摘要翻译：根据本发明，实现了高可靠性的NAND型闪速存储器。它提供一种半导体存储器件，包括：多个存储单元; 由第一栅极布线层形成的多个字线; 用于向所述字线提供电压的多个第一晶体管; 以及用于连接所述字线和所述第一晶体管的源极或漏极的电连接，所述电连接由形成在所述第一栅极布线层上方的第一布线层的第一布线和形成在所述第一晶体管上方的第二布线层的第二布线形成接线层。

32. 发明授权

US08617999B2 Method of manufacturing semiconductor device and computer readable medium for storing pattern size setting program 有权
标题翻译：制造用于存储图案尺寸设定程序的半导体装置和计算机可读介质的方法
公开(公告)号：US08617999B2
公开(公告)日：2013-12-31
申请号：US13397750
申请日：2012-02-16
申请人： Hiromitsu Mashita , Toshiya Kotani , Fumiharu Nakajima , Takafumi Taguchi , Chikaaki Kodama
发明人： Hiromitsu Mashita , Toshiya Kotani , Fumiharu Nakajima , Takafumi Taguchi , Chikaaki Kodama
IPC分类号： H01L21/302
CPC分类号： H01L21/0337
摘要： A method of manufacturing a semiconductor device, which forms a pattern by performing pattern transformation steps multiple times, comprises setting finished pattern sizes for patterns to be formed in each consecutive two pattern transformation steps among the plurality of pattern transformation steps based on a possible total amount of in-plane size variation of the patterns to be formed in the consecutive two pattern transformation steps.
摘要翻译：通过多次执行图案变换步骤来形成图案的半导体器件的制造方法包括：在多个图案变换步骤中，基于可能的总量，在每个连续的两个图案变换步骤中设定要形成的图案的完成图案尺寸在连续的两个图案变换步骤中要形成的图案的平面尺寸变化。

33. 发明授权

US08307310B2 Pattern generating method, method of manufacturing semiconductor device, computer program product, and pattern-shape-determination-parameter generating method 失效
标题翻译：图案生成方法，制造半导体器件的方法，计算机程序产品和图案形状确定参数生成方法
公开(公告)号：US08307310B2
公开(公告)日：2012-11-06
申请号：US12683993
申请日：2010-01-07
申请人： Toshiya Kotani , Hiromitsu Mashita , Takafumi Taguchi , Ryuji Ogawa
发明人： Toshiya Kotani , Hiromitsu Mashita , Takafumi Taguchi , Ryuji Ogawa
IPC分类号： G06F17/50 , G06F19/00 , G06F17/10 , G06F7/60 , G06K9/00
CPC分类号： G06F17/5081
摘要： A pattern generating method includes: extracting, from a shape of a pattern generated on a substrate, a contour of the pattern shape; setting evaluation points as verification points for the pattern shape on the contour; calculating curvatures on the contour in the evaluation points; and verifying the pattern shape based on whether the curvatures satisfy a predetermined threshold set in advance.
摘要翻译：图案生成方法包括：从在基板上产生的图案的形状提取图案形状的轮廓; 将评估点设置为轮廓上图案形状的验证点; 计算评估点轮廓上的曲率; 以及基于曲率是否满足预先设定的预定阈值来验证图案形状。

34. 发明申请

US20100216064A1 SEMICONDUCTOR-DEVICE MANUFACTURING METHOD, COMPUTER PROGRAM PRODUCT, AND EXPOSURE-PARAMETER CREATING METHOD 审中-公开
标题翻译：半导体器件制造方法，计算机程序产品和曝光参数创建方法
公开(公告)号：US20100216064A1
公开(公告)日：2010-08-26
申请号：US12683943
申请日：2010-01-07
申请人： Michiya Takimoto , Hiromitsu Mashita , Toshiya Kotani
发明人： Michiya Takimoto , Hiromitsu Mashita , Toshiya Kotani
IPC分类号： G03F7/20 , G06F17/50
CPC分类号： G03F7/70441 , G03F1/70 , G03F7/70525
摘要： A semiconductor-device manufacturing method includes: correcting a systematic component of process proximity effect, which occurs in a process other than exposure processing to thereby set a target pattern after exposure; adjusting an exposure parameter such that a difference between a dimension of the target pattern and a pattern dimension after the exposure is within tolerance; and forming, when an exposure margin calculated from the exposure parameter by using the exposure the random component of fluctuation in the process proximity effect is within the tolerance, a pattern on a semiconductor substrate with the adjusted exposure parameter.
摘要翻译：半导体器件制造方法包括：校正在曝光处理之外的处理中发生的过程接近效应的系统分量，从而在曝光之后设置目标图案; 调整曝光参数，使得目标图案的尺寸与曝光后的图案尺寸之间的差在公差之内; 并且当通过使用曝光从曝光参数计算出的曝光余量时，在处理接近效应中的随机波动分量在容差内的情况下，形成具有调整曝光参数的半导体衬底上的图案。

35. 发明申请

US20100168895A1 MASK VERIFICATION METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND COMPUTER READABLE MEDIUM 审中-公开
标题翻译：掩模验证方法，制造半导体器件的方法和计算机可读介质
公开(公告)号：US20100168895A1
公开(公告)日：2010-07-01
申请号：US12561626
申请日：2009-09-17
申请人： Hiromitsu MASHITA , Fumiharu Nakajima , Toshiya Kotani , Hidefumi Mukai , Issui Aiba
发明人： Hiromitsu MASHITA , Fumiharu Nakajima , Toshiya Kotani , Hidefumi Mukai , Issui Aiba
IPC分类号： G05B13/04 , G06F17/50
CPC分类号： G03F7/705 , G03F1/36
摘要： A mask verification method includes setting optical parameters, verifying whether a pattern, which is obtained when a mask pattern other than a reference pattern of patterns on a mask is transferred on a substrate with use of the set optical parameters, satisfies dimensional specifications, and varying, when the pattern which is obtained when the mask pattern is transferred on the substrate is determined to fail to satisfy the dimensional specifications, the optical parameters at the time of transfer such that the pattern, which is obtained when the reference pattern is transferred on the substrate, satisfies a target dimensional condition, and verifying whether a pattern, which is obtained when the mask pattern other than the reference pattern of the patterns on the mask is transferred on the substrate with use of the varied optical parameters, satisfies the dimensional specifications.
摘要翻译：掩模验证方法包括设置光学参数，验证当掩模上的图案的参考图案之外的掩模图案使用所设置的光学参数在基板上转印时获得的图案是否满足尺寸规格，并且变化当将掩模图案转印到基板上时获得的图案被确定为不能满足尺寸规格，转印时的光学参数使得当在基板上转印参考图案时获得的图案基板，满足目标尺寸条件，并且验证当使用变化的光学参数在掩模上的图案的参考图案之外的掩模图案被转印到基板上时获得的图案是否满足尺寸规格。

36. 发明授权

US07716617B2 Semiconductor device, method for making pattern layout, method for making mask pattern, method for making layout, method for manufacturing photo mask, photo mask, and method for manufacturing semiconductor device 失效
标题翻译：半导体器件，制造图案布局的方法，制造掩模图案的方法，制作布局的方法，制造光掩模的方法，光掩模和半导体器件的制造方法
公开(公告)号：US07716617B2
公开(公告)日：2010-05-11
申请号：US11299843
申请日：2005-12-13
申请人： Hiromitsu Mashita , Toshiya Kotani , Atsushi Maesono , Ayako Nakano , Tadahito Fujisawa
发明人： Hiromitsu Mashita , Toshiya Kotani , Atsushi Maesono , Ayako Nakano , Tadahito Fujisawa
IPC分类号： G06F17/50 , H03K19/177 , H01L25/00
CPC分类号： H01L27/0207 , G03F1/00 , G03F1/36 , G06F17/5068 , H01L27/115 , H01L27/11517 , H01L27/11519
摘要： A semiconductor device includes a semiconductor substrate, and a circuit pattern group comprising at least N (≧2) circuit pattern on the semiconductor substrate, at least one vicinity of end portion among the at least of N circuit patterns including a connection area to electrically connect to a circuit pattern in another circuit pattern group different from the circuit pattern group, the at least N wirings pattern including a circuit pattern N1 and at least one circuit pattern Ni (i≧2) arranged in one direction different from longitudinal direction of the circuit pattern N1, the at least one circuit patterns Ni having larger i being arranged at further position away from the circuit pattern N1, and in terms of a pattern including the connection area among the at least of Ni circuit patterns, the larger the i, the connection area being arranged at a further position in longitudinal direction.
摘要翻译：半导体器件包括半导体衬底和在半导体衬底上至少包括N（≥2）个电路图案的电路图案组，至少N个电路图案中的至少一个端部附近包括连接区域以电连接涉及与电路图案组不同的另一个电路图案组中的电路图案，所述至少N个布线图案包括电路图案N1和沿与电路的纵向方向不同的一个方向布置的至少一个电路图案Ni（i≥2）图案N1中，具有较大i的至少一个电路图案Ni布置在远离电路图案N1的更远位置处，并且根据包括至少Ni电路图案中的连接区域的图案，i，连接区域布置在纵向方向上的另一位置。

37. 发明申请

US20100081265A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20100081265A1
公开(公告)日：2010-04-01
申请号：US12557111
申请日：2009-09-10
申请人： Hiromitsu Mashita , Toshiya Kotani , Hidefumi Mukai , Fumiharu Nakajima , Chikaaki Kodama
发明人： Hiromitsu Mashita , Toshiya Kotani , Hidefumi Mukai , Fumiharu Nakajima , Chikaaki Kodama
IPC分类号： H01L21/28
CPC分类号： H01L27/11524 , H01L21/0337 , H01L21/32139
摘要： According to an aspect of the present invention, there is provided a method of manufacturing a semiconductor device, the method including: forming a first film on a target film; forming resist patterns on the first film; processing the first film with the resist patterns to form first patterns including: periodic patterns; and aperiodic patterns; removing the resist patterns; forming a second film over the target film; processing the second film to form second side wall patterns on side walls of the first patterns; removing the periodic patterns; and processing the target film with the aperiodic patterns and the second side wall patterns, thereby forming a target patterns including: periodic target patterns; aperiodic target patterns; and dummy patterns arranged between the periodic target patterns and the aperiodic patterns and arranged periodically with the periodic target patterns.
摘要翻译：根据本发明的一个方面，提供一种制造半导体器件的方法，所述方法包括：在靶膜上形成第一膜; 在第一膜上形成抗蚀剂图案; 用抗蚀剂图案处理第一膜以形成第一图案，包括：周期图案; 和非周期性模式; 去除抗蚀剂图案; 在目标膜上形成第二膜; 处理所述第二膜以在所述第一图案的侧壁上形成第二侧壁图案; 去除周期性模式; 用非周期图案和第二侧壁图案处理目标薄膜，从而形成包括周期性目标图案的目标图案; 非周期目标模式; 以及布置在周期性目标图案和非周期性图案之间的虚拟图案，并且周期性地布置有周期性目标图案。

38. 发明授权

US08527914B2 Flare map calculating method and recording medium 有权
标题翻译：耀斑图计算方法和记录介质
公开(公告)号：US08527914B2
公开(公告)日：2013-09-03
申请号：US13615691
申请日：2012-09-14
申请人： Taiga Uno , Toshiya Kotani , Satoshi Tanaka
发明人： Taiga Uno , Toshiya Kotani , Satoshi Tanaka
IPC分类号： G06F17/50
CPC分类号： G03F7/70941 , G03F1/70
摘要： A flare map calculating method of an embodiment calculates an optical image intensity distribution in each division region set in a pattern region. Furthermore, an average value of the optical image intensity distribution is calculated in each division region. A pattern or plural patterns, which has a pattern density corresponding to the average value, is calculated as a corresponding density pattern in each division region. Furthermore, a density map, which represents a pattern density distribution within the pattern region, is generated based on the corresponding density pattern, and a flare map representing a flare intensity distribution within the pattern region is calculated by convolution integral of the density map and a point spread function.
摘要翻译：实施例的耀斑映射计算方法计算在图案区域中设置的每个划分区域中的光学图像强度分布。此外，在每个划分区域中计算出光学图像强度分布的平均值。在每个划分区域中计算具有对应于平均值的图案密度的图案或多个图案作为相应的浓度图案。此外，基于对应的浓度模式生成表示图案区域内的图案密度分布的密度图，并且通过密度图和a的卷积积分来计算表示图案区域内的耀斑强度分布的耀斑图点扩散功能。

39. 发明申请

US20100030545A1 PATTERN SHAPE PREDICTING METHOD AND PATTERN SHAPE PREDICTING APPARATUS 审中-公开
标题翻译：图案形状预测方法和图案形状预测装置
公开(公告)号：US20100030545A1
公开(公告)日：2010-02-04
申请号：US12512686
申请日：2009-07-30
申请人： Taiga UNO , Toshiya Kotani
发明人： Taiga UNO , Toshiya Kotani
IPC分类号： G06F17/50
CPC分类号： G03F1/36 , G03F1/68
摘要： A pattern shape predicting method comprising: predicting, with simulation, an intensity distribution of a pattern image concerning a pattern shape of a pattern on substrate formed on a substrate based on pattern data; calculating a first pattern edge position from the intensity distribution of the pattern image; calculating a feature value of the intensity distribution of the pattern image in a predetermined range including the first pattern edge position; calculating a fluctuation amount of the first pattern edge position from the feature value using a correlation; and predicting a second pattern edge position taking into account the fluctuation amount with respect to the first pattern edge position.
摘要翻译：一种图案形状预测方法，包括：基于图案数据，通过模拟预测与形成在基板上的基板上的图案的图案形状有关的图案图像的强度分布; 根据图案图像的强度分布计算第一图案边缘位置; 在包括所述第一图案边缘位置的预定范围内计算所述图案图像的强度分布的特征值; 使用相关性从特征值计算第一图案边缘位置的变动量; 并且考虑到相对于第一图案边缘位置的波动量来预测第二图案边缘位置。

40. 发明授权

US08809072B2 Sub-resolution assist feature arranging method and computer program product and manufacturing method of semiconductor device 有权
标题翻译：分解辅助功能布置方法和计算机程序产品及半导体器件的制造方法
公开(公告)号：US08809072B2
公开(公告)日：2014-08-19
申请号：US13051961
申请日：2011-03-18
申请人： Chikaaki Kodama , Toshiya Kotani , Shigeki Nojima , Shoji Mimotogi
发明人： Chikaaki Kodama , Toshiya Kotani , Shigeki Nojima , Shoji Mimotogi
IPC分类号： H01L21/66 , G01R31/26
CPC分类号： G03F1/36
摘要： According to a sub-resolution assist feature arranging method in embodiments, it is selected which of a rule base and a model base is set for which pattern region on pattern data corresponding to a main pattern as a type of the method of arranging the sub-resolution assist feature for improving resolution of the main pattern formed on a substrate. Then, the sub-resolution assist feature by the rule base is arranged in a pattern region set as the rule base and the sub-resolution assist feature by the model base is arranged in a pattern region set as the model base.
摘要翻译：根据实施例中的子分辨率辅助特征排列方法，选择规则库和模型库中的哪一个被设置为对应于主图案的图案数据上的哪个图案区域作为安排子图形的方法的类型，分辨率辅助功能，用于提高在基板上形成的主图案的分辨率。然后，将规则库的子分辨率辅助特征设置在设置为规则库的图案区域中，并且由模型库将子分辨率辅助特征排列在设置为模型库的图案区域中。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式