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31. 发明授权

US06697005B2 Analog to digital converter with interpolation of reference ladder 失效
标题翻译：具有参考梯形图插补的模数转换器
公开(公告)号：US06697005B2
公开(公告)日：2004-02-24
申请号：US10158774
申请日：2002-05-31
申请人： Jan Mulder
发明人： Jan Mulder
IPC分类号： H03M112
CPC分类号： H03K17/04106 , H03M1/146 , H03M1/204 , H03M1/365 , H04L25/026 , H04L25/0276
摘要： An N-bit analog to digital converter includes a reference ladder connected to an input voltage at one end, and to ground at another end, an array of differential amplifiers whose differential inputs are connected to taps from the reference ladder, wherein each amplifier has a first differential input connected to the same tap as a neighboring amplifier, and a second differential input shifted by one tap from the neighboring amplifier, and an encoder that converts outputs of the array to an N-bit output.
摘要翻译： N位模数转换器包括连接到一端的输入电压并在另一端接地的参考梯形图，其差分放大器的阵列与差分输入端连接到来自参考梯形图的抽头，其中每个放大器具有连接到与相邻放大器相同的抽头的第一差分输入和从相邻放大器偏移一抽头的第二差分输入，以及将阵列的输出转换为N位输出的编码器。

32. 发明授权

US08598906B2 Low-power ethernet transmitter 有权
标题翻译：低功耗以太网发射机
公开(公告)号：US08598906B2
公开(公告)日：2013-12-03
申请号：US11798334
申请日：2007-05-11
申请人： Frank van der Goes , Christopher M. Ward , Jan Mulder , Ovidiu Bajdechi
发明人： Frank van der Goes , Christopher M. Ward , Jan Mulder , Ovidiu Bajdechi
IPC分类号： H03K19/17
CPC分类号： H03K3/012 , H03K19/0005 , H04L25/0278
摘要： An electrical circuit comprising a line driver for providing Ethernet signals is disclosed. The line driver comprises a voltage mode line driver for producing 1000BT and 100BT Ethernet signals and an active output impedance line driver arranged parallel to the voltage mode line driver. The line driver is capable of producing 1000BT or 100BT or 10BT Ethernet signals, wherein either the voltage mode line driver or the active impedance line driver is active.
摘要翻译：公开了一种包括用于提供以太网信号的线路驱动器的电路。线路驱动器包括用于产生1000BT和100BT以太网信号的电压模式线路驱动器和与电压模式线路驱动器并联布置的有源输出阻抗线路驱动器。线路驱动器能够产生1000BT或100BT或10BT以太网信号，其中电压模式线路驱动器或有源阻抗线路驱动器是活动的。

33. 发明授权

US08253470B2 Offset calibration for amplifiers 失效
标题翻译：放大器偏移校准
公开(公告)号：US08253470B2
公开(公告)日：2012-08-28
申请号：US12881434
申请日：2010-09-14
申请人： Jan Mulder
发明人： Jan Mulder
IPC分类号： H03L5/00
CPC分类号： H03F3/45475 , H03F3/45192 , H03F3/45928 , H03F2203/45048 , H03F2203/45138 , H03F2203/45586 , H03M1/1023 , H03M1/165
摘要： An apparatus, a method, and a system are provided to calibrate an offset in an amplifier. The apparatus can include an amplifier, a voltage control unit, a comparator, and a processing unit. The amplifier can have four terminals: a positive differential input (VIN+), a negative differential input (VIN−), a positive differential output (VOUT+), and a negative differential output (VOUT−). The voltage control unit can be configured to adjust a first voltage on VOUT+ and a second voltage on VOUT−. The comparator can be configured to compare the first voltage on VOUT+ to the second voltage on VOUT− when VIN+ and VIN− are coupled to a common voltage. Further, the processing unit can be configured to provide a control signal to the voltage control unit based on the comparison of the first and second voltages on VOUT+ and VOUT−, respectively.
摘要翻译：提供了一种装置，方法和系统来校准放大器中的偏移。该装置可以包括放大器，电压控制单元，比较器和处理单元。放大器可以有四个端子：正差分输入（VIN +），负差分输入（VIN-），正差分输出（VOUT +）和负差分输出（VOUT-））。电压控制单元可配置为调节VOUT +上的第一电压和VOUT-上的第二电压。当VIN +和VIN-耦合到公共电压时，比较器可以配置为将VOUT +上的第一个电压与VOUT-上的第二个电压进行比较。此外，处理单元可以被配置为基于VOUT +和VOUT-上的第一和第二电压的比较来向电压控制单元提供控制信号。

34. 发明申请

US20100162957A1 DEVICE FOR COATING A PLURALITY OF CLOSEST PACKED SUBSTRATES ARRANGED ON A SUSCEPTOR 审中-公开
标题翻译：用于涂覆多个封闭基板的装置安装在SUSCEPTOR上
公开(公告)号：US20100162957A1
公开(公告)日：2010-07-01
申请号：US12601234
申请日：2008-05-21
申请人： Adam Boyd , Victor Saywell , Jan Mulder , Olivier Feron , Johannes Käppeler
发明人： Adam Boyd , Victor Saywell , Jan Mulder , Olivier Feron , Johannes Käppeler
IPC分类号： C23C16/46 , C23C16/458
CPC分类号： C23C16/4583 , H01L21/68735 , H01L21/68757 , H01L21/68771
摘要： The invention relates to a device for coating a plurality of substrates (3) which are regularly arranged on a bearing surface (2) of a susceptor (1) associated to a process chamber (14), wherein the bearing surface (2) forms abutment flanks (5) for the edge mounting of each substrate (3). In order to reduce the free susceptor surface to a minimum, it is proposed that the abutment flanks of the lateral walls (5) are formed by bases (4) which project from the bearing surface (2) and are separated at a distance from one another. Said bases are arranged on the corner points (10) of a honeycomb structure and have an outline essentially corresponding to an equilateral triangle with inwardly curved sides (5).
摘要翻译：本发明涉及一种用于涂覆多个基板（3）的装置，其定期地布置在与处理室（14）相关联的基座（1）的支承表面（2）上，其中支承表面（2）形成支座用于每个基板（3）的边缘安装的侧面（5）。为了将自由基座表面最小化，提出侧壁（5）的邻接侧面由从轴承表面（2）突出的基部（4）形成，并且距离一个距离另一个。所述底座布置在蜂窝结构的角点（10）上，并且具有基本对应于具有向内弯曲侧面（5）的等边三角形的轮廓。

35. 发明授权

US07589655B2 Method and system for a control scheme on power and common-mode voltage reduction for a transmitter 失效
标题翻译：用于发射机功率和共模降压控制方案和系统
公开(公告)号：US07589655B2
公开(公告)日：2009-09-15
申请号：US12204482
申请日：2008-09-04
申请人： Yee Ling Cheung , Kevin T. Chan , Jan Mulder
发明人： Yee Ling Cheung , Kevin T. Chan , Jan Mulder
IPC分类号： H03M1/66
CPC分类号： H03F3/45183 , H03F2203/45466
摘要： Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The method includes identifying a phase control signal from an adjacent current cell preceding the particular current cell in time and logically ORing the phase control signal from the preceding cell with a phase control signal from the particular current cell.
摘要翻译：提供了一种用于控制具有发射机的收发机中的电流特性的方法和系统。该方法包括在时间上识别来自特定当前小区之前的相邻当前小区的相位控制信号，并且将来自前一小区的相位控制信号与来自特定当前小区的相位控制信号进行逻辑或运算。

36. 发明授权

US07256725B2 Resistor ladder interpolation for subranging ADC 有权
公开(公告)号：US07256725B2
公开(公告)日：2007-08-14
申请号：US11651454
申请日：2007-01-10
申请人： Jan Mulder
发明人： Jan Mulder
IPC分类号： H03M1/12
CPC分类号： H03K17/04106 , H03F3/45183 , H03F3/45632 , H03F2203/45352 , H03F2203/45354 , H03F2203/45511 , H03M1/204 , H03M1/365
摘要： An analog to digital converter includes a resistive ladder outputting a plurality of reference voltages and a coarse ADC receiving the reference voltages and a voltage input. A plurality of coarse comparators receive an output of the coarse ADC. A switch matrix receives an output of the coarse ADC and the reference voltages. The switch matrix inputs a plurality of control signals for selecting at least two voltage subranges. A fine ADC receives the two voltage subranges and the voltage input. A plurality of fine comparators receive an output of the fine ADC. An encoder converts outputs of the coarse and fine comparators to a digital representation of the voltage input. The voltage subranges are adjacent. Each control signal includes a plurality of control lines for controlling corresponding switches. The switches are field effect transistors.

37. 发明申请

US20070109173A1 Resistor ladder interpolation for subranging ADC 有权
标题翻译：电阻梯形图插补，用于辅助ADC
公开(公告)号：US20070109173A1
公开(公告)日：2007-05-17
申请号：US11651454
申请日：2007-01-10
申请人： Jan Mulder
发明人： Jan Mulder
IPC分类号： H03M1/12
CPC分类号： H03K17/04106 , H03F3/45183 , H03F3/45632 , H03F2203/45352 , H03F2203/45354 , H03F2203/45511 , H03M1/204 , H03M1/365
摘要： An analog to digital converter includes a resistive ladder outputting a plurality of reference voltages and a coarse ADC receiving the reference voltages and a voltage input. A plurality of coarse comparators receive an output of the coarse ADC. A switch matrix receives an output of the coarse ADC and the reference voltages. The switch matrix inputs a plurality of control signals for selecting at least two voltage subranges. A fine ADC receives the two voltage subranges and the voltage input. A plurality of fine comparators receive an output of the fine ADC. An encoder converts outputs of the coarse and fine comparators to a digital representation of the voltage input. The voltage subranges are adjacent. Each control signal includes a plurality of control lines for controlling corresponding switches. The switches are field effect transistors.
摘要翻译：模数转换器包括输出多个参考电压的电阻梯形图和接收参考电压的粗略ADC和电压输入。多个粗略比较器接收粗略ADC的输出。开关矩阵接收粗略ADC的输出和参考电压。开关矩阵输入用于选择至少两个电压子范围的多个控制信号。精密ADC接收两个电压子范围和电压输入。多个精细比较器接收精细ADC的输出。编码器将粗略和精细比较器的输出转换为电压输入的数字表示。电压子范围相邻。每个控制信号包括用于控制相应的开关的多个控制线。开关是场效应晶体管。

38. 发明授权

US07208980B2 Comparator with offset compensation 有权
标题翻译：具有偏移补偿的比较器
公开(公告)号：US07208980B2
公开(公告)日：2007-04-24
申请号：US11038386
申请日：2005-01-21
申请人： Jan Mulder
发明人： Jan Mulder
IPC分类号： G01R19/00
CPC分类号： G01R19/16519 , G01R19/16557 , H03F3/45183 , H03F3/45632 , H03F2200/78 , H03F2203/45366 , H03F2203/45644 , H03M1/0607
摘要： A differential comparator with reduced offset. The differential comparator includes a first transistor coupled to a first input current and a second transistor coupled to a second input current. The first and second transistors are biased as diodes during a reset phase to store an offset voltage on parasitic capacitances of the first and second transistors. The first and second transistors are connected together as a latch to provide an output during a latch phase. Drain currents of the first and the second transistors substantially equal the first and the second input currents, respectively, during the reset phase and at the beginning of the latch phase. During the latch phase, currents approximately twice as large as differential-mode signal currents provided by the first and the second input currents are provided to the first and the second transistors, respectively.
摘要翻译：具有减小偏移的差分比较器。差分比较器包括耦合到第一输入电流的第一晶体管和耦合到第二输入电流的第二晶体管。第一和第二晶体管在复位阶段被偏置为二极管，以便在第一和第二晶体管的寄生电容上存储偏移电压。第一和第二晶体管作为锁存器连接在一起以在锁存相位期间提供输出。第一和第二晶体管的漏极电流分别在复位阶段期间和锁存相位开始时基本上等于第一和第二输入电流。在锁存阶段期间，分别向第一和第二晶体管提供大约是由第一和第二输入电流提供的差分模式信号电流的两倍的电流。

39. 发明授权

US07170701B2 Amplifier with a strong output current 失效
标题翻译：放大器具有强大的输出电流
公开(公告)号：US07170701B2
公开(公告)日：2007-01-30
申请号：US10179356
申请日：2002-06-25
申请人： Jan Mulder , Hugo Veenstra , Giuseppe Grillo
发明人： Jan Mulder , Hugo Veenstra , Giuseppe Grillo
IPC分类号： G11B5/09
CPC分类号： G11B5/02 , G11B5/012 , G11B2005/0013 , H03F1/02 , H03F3/3432 , H03F3/4508 , H03F2203/45352
摘要： The present invention relates to an amplifier intended to deliver to a load impedance RL connected between two output terminals of the amplifier an output current Iout which is representative of an input signal (Vin, −Vin) applied to two input terminals of the amplifier, which amplifier includes a first and a second transistor T1 and T2 connected as a differential pair around the load impedance RL. The amplifier according to the invention further includes a third and a fourth transistor T3 and T4 which form a differential pair; degenerated by means of a degenerating impedance Req which has a nominal value equal to that of the load impedance RL of the amplifier, which differential pair (T3, T4) is intended to be controlled by means of a control signal (−Vin/2, Vin/2), in anti-phase with the input signal (Vin, −Vin). The invention permits to double the output current Iout of the amplifier without, however, increasing its power consumption.
摘要翻译：本发明涉及一种放大器，其用于传送到连接在放大器的两个输出端之间的负载阻抗RL，该输出电流Iout表示施加到放大器的两个输入端的输入信号（Vin，-Vin）放大器包括作为负载阻抗RL周围的差分对连接的第一和第二晶体管T 1和T 2。根据本发明的放大器还包括形成差分对的第三和第四晶体管T 3和T 4; 通过衰减阻抗Req退化，该衰减阻抗Req的标称值等于放大器的负载阻抗RL的额定值，该差分对（T 3，T 4）将通过控制信号（-Vin / 2，Vin / 2），与输入信号（Vin，-Vin）反相。本发明允许放大器的输出电流Iout加倍，而不增加其功率消耗。

40. 发明申请

US20050244796A1 Motion simulator with exchangeable unit 审中-公开
标题翻译：具有可更换单元的运动模拟器
公开(公告)号：US20050244796A1
公开(公告)日：2005-11-03
申请号：US11084432
申请日：2005-03-18
申请人： Jan Mulder , Adriaan Beukers , Max Baarspul , Michael Johannes van Tooren , Stefaan Emiel de Winter
发明人： Jan Mulder , Adriaan Beukers , Max Baarspul , Michael Johannes van Tooren , Stefaan Emiel de Winter
IPC分类号： G09B9/04 , G09B9/02
CPC分类号： G09B9/04
摘要： A motion simulator provided with a movable housing, preferably carried by a number of length-adjustable legs, in which housing projection means are arranged for visual information supply, while in the housing a control environment of a motion apparatus to be simulated is situated, the control environment being incorporated in a removable unit, which unit is exchangeable for another, comparable unit having a different control environment to be simulated.
摘要翻译：一种运动模拟器，其具有可移动的壳体，优选地由许多长度可调节的腿部承载，其中壳体突出装置设置用于视觉信息供给，而在壳体中，要被模拟的运动装置的控制环境位于，控制环境被结合在可移动单元中，该单元可交换为具有不同控制环境的另一可比单元。

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