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31. 发明授权

US5771227A Method and system for routing massages in a multi-node data communication network 失效
标题翻译：用于在多节点数据通信网络中路由消息的方法和系统
公开(公告)号：US5771227A
公开(公告)日：1998-06-23
申请号：US612712
申请日：1996-03-08
申请人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Gerard Brun
发明人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Gerard Brun
IPC分类号： H04L12/54 , H04L12/70 , H04L12/701 , H04L12/933 , H04L12/947 , H04J3/24 , H04L12/56
CPC分类号： H04L12/5601 , H04L45/00 , H04L49/107 , H04L49/256 , H04L2012/567 , H04L2012/5679
摘要： The invention relates to a method and a system for routing messages or frames through network nodes connected to each other by network links and connected to a plurality of terminals by different input/output ports also called network attachment cards (NAC) in a multi-node communication network. In such a configuration, each terminal equipment stores a network table. The network table is updated in the terminal itself by a network manager which may by the way limit the access of the terminal to some terminals of the network. To route an incoming message or frame from a source terminal (T1) to the destination terminal (T7), a routing algorithm is implemented in each NAC. Each NAC has a different and unique integer address in the node, each node has a different and unique prime number address greater than the number of NACs in the node. Each terminal connected to a node sends frames with a routing identifier (RI). The different RIs are located in the network table. When an input NAC receives a frame, the routing algorithm computes the address of the output NAC given by the remainder of the division of the RI by the node address, then this output NAC sends the frames onto its network link. This process is performed in each node until the destination terminal is reached. The RI is kept unchanged during the frame transmission. A timer is also used to test if the frame is received because a network link may be down. In such case, an alternate RI is used to take an alternate route.
摘要翻译：本发明涉及一种方法和系统，用于通过网络链路彼此连接的网络节点路由消息或帧，并通过多节点中也称为网络附加卡（NAC）的不同输入/输出端口连接到多个终端通讯网络在这种配置中，每个终端设备存储网络表。网络表在终端本身由网络管理器更新，网络管理器可以限制终端对网络的某些终端的访问。为了将来自源终端（T1）的输入消息或帧路由到目的终端（T7），在每个NAC中实现路由算法。每个NAC在节点中具有不同且唯一的整数地址，每个节点具有大于节点中NAC个数的不同且唯一的素数地址。连接到节点的每个终端发送具有路由标识符（RI）的帧。不同的RI位于网络表中。当输入NAC接收到帧时，路由算法计算由RI的除法余数由节点地址给出的输出NAC的地址，则该输出NAC将帧发送到其网络链路上。在每个节点中执行该过程，直到达到目标终端。在帧传输期间，RI保持不变。定时器也用于测试帧是否被接收，因为网络链路可能会关闭。在这种情况下，替代的RI用于采取替代路由。

32. 发明授权

US08190862B2 Hardware device for processing the tasks of an algorithm in parallel 失效
标题翻译：用于并行处理算法任务的硬件设备
公开(公告)号：US08190862B2
公开(公告)日：2012-05-29
申请号：US12109001
申请日：2008-04-24
申请人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Claude Pin
发明人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Claude Pin
IPC分类号： G06F9/30 , G06F9/46 , G06F9/54
CPC分类号： G06F9/30101 , G06F9/3836
摘要： A hardware device for processing the tasks of an algorithm of the type having a number of processes the execution of some of which depend on binary decisions has a plurality of task units (10, 12, 14), each of which are associated with a task defined as being either one process or one decision or one process together with a following decision. A task interconnection logic block (16) is connected to each task unit for communicating actions from a source task unit to a destination task unit. Each task unit includes a processor (18) for processing the steps of the associated task when a received action requests such a processing. A status manager (20) handles actions coming from other task units and builds actions to be sent to other task units.
摘要翻译：一种硬件设备，用于处理具有多个进程数量的处理类型的算法的任务取决于二进制决定的任务具有多个任务单元（10,12,14），每个任务单元与任务相关联定义为一个过程或一个决策或一个过程以及以下决定。任务互连逻辑块（16）连接到每个任务单元，用于将来自源任务单元的操作传送到目的地任务单元。每个任务单元包括处理器（18），用于在接收的动作请求这样的处理时处理相关任务的步骤。状态管理器（20）处理来自其他任务单元的动作，并构建要发送到其他任务单元的动作。

33. 发明申请

US20060112393A1 Hardware device for processing the tasks of an algorithm in parallel 失效
标题翻译：用于并行处理算法任务的硬件设备
公开(公告)号：US20060112393A1
公开(公告)日：2006-05-25
申请号：US11322378
申请日：2006-01-03
申请人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Claude Pin
发明人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Claude Pin
IPC分类号： G06F9/46
CPC分类号： G06F9/30101 , G06F9/3836
摘要： A hardware device for processing the tasks of an algorithm of the type having a number of processes the execution of some of which depend on binary decisions has a plurality of task units (10, 12, 14), each of which are associated with a task defined as being either one process or one decision or one process together with a following decision. A task interconnection logic block (16) is connected to each task unit for communicating actions from a source task unit to a destination task unit. Each task unit includes a processor (18) for processing the steps of the associated task when a received action requests such a processing. A status manager (20) handles actions coming from other task units and builds actions to be sent to other task units
摘要翻译：一种硬件设备，用于处理具有多个进程数量的处理类型的算法的任务取决于二进制决定的任务具有多个任务单元（10,12,14），每个任务单元与任务相关联定义为一个过程或一个决策或一个过程以及以下决定。任务互连逻辑块（16）连接到每个任务单元，用于将来自源任务单元的操作传送到目的地任务单元。每个任务单元包括处理器（18），用于在接收的动作请求这样的处理时处理相关任务的步骤。状态管理器（20）处理来自其他任务单元的动作，并构建要发送到其他任务单元的动作

34. 发明授权

US06950429B2 IP data transmission network using a route selection based on level 4/5 protocol information 失效
标题翻译： IP数据传输网使用基于4/5协议信息的路由选择
公开(公告)号：US06950429B2
公开(公告)日：2005-09-27
申请号：US09838406
申请日：2001-04-19
申请人： Alain Benayoun , Jacques Fieschi , Patrick Michel , Jean-Francois Le Pennec
发明人： Alain Benayoun , Jacques Fieschi , Patrick Michel , Jean-Francois Le Pennec
IPC分类号： H04L12/931 , H04L12/935 , H04L12/947 , H04L12/56
CPC分类号： H04L49/602 , H04L49/25 , H04L49/3009
摘要： Data transmission system for transmitting packets of data from a source workstation (10) to a destination workstation (18) wherein the packets of data are transmitted over at least an IP network (14) between an ingress node (16) connected to the source workstation and an egress node (20) connected to the destination workstation, wherein each router within the intermediary nodes along the data path from the ingress node to the egress node determines the best route in a routing table defined by the contents of a field contained in each packet of data being received. For this, the router of the ingress node comprises a configuration table which defines the contents of the TOS field in function of information associated with the 4/5 level protocol such as TCP or UDP.
摘要翻译：用于将数据分组从源工作站（10）发送到目的地工作站（18）的数据传输系统，其中数据分组通过至少一个IP网络（14）在连接到源工作站的入口节点（16）之间传输以及连接到目的地工作站的出口节点（20），其中沿着从入口节点到出口节点的数据路径的中间节点内的每个路由器确定由每个中包含的字段的内容定义的路由表中的最佳路由收到的数据包。为此，入口节点的路由器包括配置表，该配置表根据与诸如TCP或UDP的4/5级协议相关联的信息来定义TOS字段的内容。

35. 发明授权

US06789130B1 Automatic rate adaptation system in a local area network 失效
标题翻译：局域网自动速率调整系统
公开(公告)号：US06789130B1
公开(公告)日：2004-09-07
申请号：US09571681
申请日：2000-05-16
申请人： Alain Benayoun , Jean-Francois Le Pennec , Michel Verhaeghe , Patrick Michel
发明人： Alain Benayoun , Jean-Francois Le Pennec , Michel Verhaeghe , Patrick Michel
IPC分类号： G06F1516
CPC分类号： H04L12/5602
摘要： Automatic speed adaptation system in a Local Area Network (LAN) between a hub (10) including a hub adapter (20, 24, 28) and at least a workstation (12, 14, 16) including a workstation adapter (18, 22, 26) for exchanging data over a link connected between the hub adapter and the workstation adapter at a rate based on a frequency which is inversely proportional to the length of the link. Each adapter comprises a clock generator for generating a clock having a frequency between F1 and F2 and processing means for transmitting at least a check frame from the hub adapter to the workstation adapter at a rate based on a frequency VCLK generated by the clock generator under the control of the processing means and selected as being the frequency corresponding to the length of the link, and for transmitting an acknowledge frame from the workstation adapter to the hub adapter thereby ascertaining that the selected frequency is the right frequency resulting in the best quality of transmission.
摘要翻译：在包括轮毂适配器（20,24,28）的轮毂（10）和至少包括工作站适配器（18,22）的工作站（12,14,16）之间的局域网（LAN）中的自动速度适配系统， 26），用于以基于与链路的长度成反比的频率的速率通过连接在中继适配器和工作站适配器之间的链路交换数据。每个适配器包括用于产生具有F1和F2之间的频率的时钟的时钟发生器和用于以基于由时钟发生器下的时钟发生器产生的频率VCLK的速率从集线器适配器至工作站适配器发送至少一个校验帧的处理装置处理装置的控制并被选择为对应于链路的长度的频率，并且用于将确认帧从工作站适配器发送到集线器适配器，从而确定所选择的频率是合适的频率，从而产生最佳传输质量。

36. 发明授权

US06516319B1 Parallelized processing device for processing search keys based upon tree structure 失效
标题翻译：基于树结构处理搜索键的并行处理设备
公开(公告)号：US06516319B1
公开(公告)日：2003-02-04
申请号：US09569493
申请日：2000-05-11
申请人： Alain Benayoun , Jean-Francois Le Pennec , Claude Pin , Patrick Michel
发明人： Alain Benayoun , Jean-Francois Le Pennec , Claude Pin , Patrick Michel
IPC分类号： G06F1730
CPC分类号： G06F17/30961 , G06F17/3061 , G06F17/30952 , Y10S707/99933
摘要： A device for parallel processing of subtrees within a binary tree for searching for the tree leaf matching a search key. The search is performed at each node by applying a recursive function associated with each node and whose parameters depend on the node for determining which branch, left or right, is to be taken in accordance with the search key. The device includes subtree register blocks for storing the recursive functions, processors for processing the recursive functions, a control unit that assigns one processor to the processing of the recursive functions contained in a block that sent the request to the control unit, and means for selecting subtrees included in the sequence of branches between the root and the leaf defined in accordance with the search key in response to the processing of blocks.
摘要翻译：用于并行处理二进制树中的子树的装置，用于搜索与搜索关键字匹配的树叶。通过应用与每个节点相关联的递归函数并且其参数依赖于该节点来确定将根据搜索关键字被采取左侧或右侧的哪个分支来在每个节点处执行搜索。该装置包括用于存储递归函数的子树寄存器块，用于处理递归函数的处理器，将包含在向控制单元发送请求的块中的递归函数的处理分配给一个处理器的控制单元，以及用于选择子树包括在响应于块的处理的根据搜索关键字定义的根和叶之间的分支序列中。

37. 发明授权

US06401188B1 Method for selection on a pattern sequence 有权
标题翻译：在图案序列上选择的方法
公开(公告)号：US06401188B1
公开(公告)日：2002-06-04
申请号：US09245189
申请日：1999-02-05
申请人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Claude Pin
发明人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Claude Pin
IPC分类号： G06F1202
CPC分类号： H04M15/8044 , H04M15/00 , H04M2215/42 , H04M2215/745
摘要： A method is disclosed for making a selection on a pattern sequence depending on whether or not the sequence belongs to a routing set, the routing set having at least two keys. The selection is made in a single step by analyzing a selection word (CASE SELECT) identifying the routing set.
摘要翻译：公开了一种用于根据序列是否属于路由集合对模式序列进行选择的方法，该路由集具有至少两个密钥。通过分析识别路由集的选择字（CASE SELECT），在单个步骤中进行选择。

38. 发明授权

US06331814B1 Adapter device for the transmission of digital data over an AC power line 失效
标题翻译：用于通过交流电源线传输数字数据的适配器设备
公开(公告)号：US06331814B1
公开(公告)日：2001-12-18
申请号：US09718186
申请日：2000-11-21
申请人： Andre Albano , Patrick Michel , Alain Benayoun , Jean-Francois Le Pennec
发明人： Andre Albano , Patrick Michel , Alain Benayoun , Jean-Francois Le Pennec
IPC分类号： H04M1104
CPC分类号： H04Q11/0471 , H04B3/54 , H04B2203/5408 , H04B2203/5454 , H04Q2213/1308 , H04Q2213/13106 , H04Q2213/13176 , H04Q2213/13202 , H04Q2213/13209 , H04Q2213/13216 , H04Q2213/13299 , H04Q2213/13302 , H04Q2213/1332
摘要： An adapter device for transmitting data from a local data-handling unit to a remote data-handling unit via an AC power line includes processing facilities that receive digital data from the local data-handling unit and transform the digital data into ISDN data. The adapter device also includes a burst transceiver circuit (BTC) that converts the ISDN data into low-voltage pseudo-ternary signals on a U interface. A transformer of the adapter device transforms the low-voltage pseudo-ternary signals into high-voltage pseudo-ternary signals and transmits the high-voltage pseudo-ternary signals via the AC power line. Such an adapter device may also be used for receiving the data from the local data-handling unit at the remote data-handling unit.
摘要翻译：用于经由AC电力线将数据从本地数据处理单元发送到远程数据处理单元的适配器装置包括从本地数据处理单元接收数字数据并将数字数据变换为ISDN数据的处理设备。适配器装置还包括将ISDN数据转换成U接口上的低电压伪三态信号的突发收发器电路（BTC）。适配器件的变压器将低电压伪三态信号转换为高电压伪三态信号，并通过AC电源线传输高电压伪三态信号。这样的适配器装置也可以用于从远程数据处理单元处的本地数据处理单元接收数据。

39. 发明授权

US6016309A Apparatus for an automatic speed and data length selection of an asychronous data link 失效
标题翻译：用于同步数据链路的自动速度和数据长度选择的装置
公开(公告)号：US6016309A
公开(公告)日：2000-01-18
申请号：US751800
申请日：1996-11-19
申请人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel
发明人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel
IPC分类号： H04L29/08 , H04L25/02 , H04J3/14
CPC分类号： H04L25/0262
摘要： To establish the communication between two devices connected through an asynchronous data link, an adapter for automatically identifies configuration parameters. The configuration parameters may be the transmission speed, the data bits length (seven or eight), the parity (odd or even) if existing and the number of stop bits (one or two). Thus, there are six combinations of the four parameters. Each one of the configuration is detected by an adapter which is independent from the others. It comprises a control circuit (170) receiving deserialized data bits signal (RXD) from a connector (120), a clock generator (160) for generating clock signals and varying the clock frequency so as to adapt to asynchronous data transmission speed, a timer (220) for synchronizing the number of data bytes so as to adapt to the data bit length and counters for counting the number of times a predetermined configuration matches. A parity checker may be also implemented in case a parity bit is used in the data transmission. The six adapters may be connected in parallel by the RXD signal so that each adapter operates simultaneously so that each counter may inform first the microcontroller of the configuration detected once it is sure this configuration is not randomly detected.
摘要翻译：要建立通过异步数据链路连接的两台设备之间的通信，可以自动识别配置参数。配置参数可以是传输速度，数据位长度（七或八），奇偶校验（奇数或偶数）如果存在和停止位数（一个或两个）。因此，有四个参数的六个组合。每个配置都由独立于其他适配器的适配器检测。它包括从连接器（120）接收反序列化数据位信号（RXD）的控制电路（170），用于产生时钟信号并改变时钟频率以适应异步数据传输速度的时钟发生器（160），定时器（220），用于使数据字节的数量同步以适应数据位长度，以及用于对预定配置匹配的次数进行计数的计数器。在数据传输中使用奇偶校验位的情况下也可以实现奇偶检验器。六个适配器可以通过RXD信号并联连接，使得每个适配器同时操作，使得每当一个确认该配置不被随机检测到时，每个计数器可以首先向微控制器通知检测到的配置。

40. 发明授权

US5799158A adapter for transferring blocks of data having a variable size to other adapters via a main system bus 失效
标题翻译：适配器，用于通过主系统总线将具有可变大小的数据块传送到其他适配器
公开(公告)号：US5799158A
公开(公告)日：1998-08-25
申请号：US687071
申请日：1996-07-15
申请人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Patrick Sicsic
发明人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Patrick Sicsic
IPC分类号： G06F13/40 , G06F13/00 , G06F13/38
CPC分类号： G06F13/4072
摘要： An adapter for transferring blocks of data of a variable size to at least one destination adapter, each of the adapters being plugged in a respective slot and connected to a main system bus which is controlled by a central backplane card. In each adapter, the transmission of one block of data is provided, in part, by a device, operative in response to the detection of an ACK acknowledge word giving access to the bus, for generating a signalling word to be transmitted to a particular destination adapter which will actually receive the transmitted data; the signalling word comprising information characterizing the type of command which the transmitting adapter sends as a request to the backplane card, the address of the particular adapter which will receive the transmitted data, the size of the block of the transmitted data and the address of the transmitting adapter. The adapter is best suited for use in multimedia systems where variable size data blocks are required to transmit data, voice, video, etc.
摘要翻译：用于将可变大小的数据块传送到至少一个目的地适配器的适配器，每个适配器插入相应的插槽中并连接到由中央背板卡控制的主系统总线。在每个适配器中，一部分数据的传输部分地由设备提供，响应于检测到给予接入总线的ACK确认字而工作，用于产生要发送到特定目的地的信令字实际接收传输数据的适配器; 信令字包括表示发送适配器作为请求发送到背板的命令的类型的信息，将接收所发送的数据的特定适配器的地址，发送的数据的块的大小和发送的数据的地址传输适配器。该适配器最适用于需要可变大小数据块来传输数据，语音，视频等的多媒体系统。

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