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    • 22. 发明授权
    • Three-dimensional multi-bit non-volatile memory and method for manufacturing the same
    • 三维多位非易失性存储器及其制造方法
    • US08705274B2
    • 2014-04-22
    • US13376925
    • 2011-06-30
    • Ming LiuChenxi ZhuZongliang HuoFeng YanQin WangShibing Long
    • Ming LiuChenxi ZhuZongliang HuoFeng YanQin WangShibing Long
    • G11C16/04H01L21/336
    • H01L27/11582
    • The present disclosure relates to the field of microelectronics manufacture and memories. A three-dimensional multi-bit non-volatile memory and a method for manufacturing the same are disclosed. The memory comprises a plurality of memory cells constituting a memory array. The memory array may comprise: a gate stack structure; periodically and alternately arranged gate stack regions and channel region spaces; gate dielectric layers for discrete charge storage; periodically arranged channel regions; source doping regions and drain doping regions symmetrically arranged to each other; bit lines led from the source doping regions and the drain doping regions; and word lines led from the gate stack regions. The gate dielectric layers for discrete charge storage can provide physical storage spots to achieve single-bit or multi-bit operations, so as to achieve a high storage density. According to the present disclosure, the localized charge storage characteristic of the charge trapping layer and characteristics such as a longer effective channel length and a higher density of a vertical memory structure are utilized, to provide multiple storage spots in a single memory cell. Therefore, the storage density is improved while good performances such as high speed are ensured.
    • 本公开涉及微电子制造领域和存储器。 公开了一种三维多位非易失性存储器及其制造方法。 存储器包括构成存储器阵列的多个存储单元。 存储器阵列可以包括:栅极堆叠结构; 定期和交替布置的栅极堆叠区域和沟道区域空间; 用于离散电荷存储的栅极电介质层; 定期布置的通道区域; 源极掺杂区域和漏极掺杂区域彼此对称布置; 源极掺杂区域和漏极掺杂区域引出的位线; 和从栅极堆栈区域引出的字线。 用于离散电荷存储的栅极电介质层可以提供物理存储点以实现单位或多位操作,从而实现高存储密度。 根据本公开,利用电荷俘获层的局部电荷存储特性以及垂直存储器结构的较长有效沟道长度和较高密度等特征,以在单个存储单元中提供多个存储点。 因此,存储密度得到改善,同时保证了诸如高速的良好性能。
    • 23. 发明授权
    • Termination for superjunction VDMOSFET
    • 端接VDMOSFET
    • US08482064B2
    • 2013-07-09
    • US13493505
    • 2012-06-11
    • Yangbo YiHaisong LiQin WangPing TaoLixin Zhang
    • Yangbo YiHaisong LiQin WangPing TaoLixin Zhang
    • H01L29/78
    • H01L29/7811H01L29/0634H01L29/0653H01L29/0696
    • A termination for silicon superjunction VDMOSFET comprises heavily doped N-type silicon substrate which also works as drain region; drain metal is disposed on the back surface of the heavily doped N-type silicon substrate; an N-type silicon epitaxial layer is disposed on the heavily doped N-type silicon substrate; P-type silicon columns and N-type silicon columns are formed in the N-type silicon epitaxial layer, alternately arranged; a continuous silicon oxide layer is disposed on a part of silicon surface in the termination; structures that block the drift of mobile ions (several discontinuous silicon oxide layers arranged at intervals) are disposed on the other part of silicon surface in the termination. The structures that block the drift of mobile ions disposed in the termination region are able to effectively prevent movement of the mobile ions and improve the capability of the power device against the contamination induced by the mobile ions.
    • 硅超结VDMOSFET的终端包括也用作漏极区的重掺杂N型硅衬底; 漏极金属配置在重掺杂N型硅衬底的背表面上; 在重掺杂的N型硅衬底上设置N型硅外延层; 交替布置在N型硅外延层中形成P型硅柱和N型硅柱; 连续的氧化硅层设置在终端的硅表面的一部分上; 阻止移动离子漂移的结构(间隔布置的几个不连续的氧化硅层)设置在终端的硅表面的另一部分上。 阻止设置在终端区域中的移动离子的漂移的结构能够有效地防止移动离子的移动,并提高功率器件抵抗由移动离子引起的污染的能力。