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21. 发明授权

US07542330B2 SRAM with asymmetrical pass gates 失效
标题翻译：具有不对称传递门的SRAM
公开(公告)号：US07542330B2
公开(公告)日：2009-06-02
申请号：US11763555
申请日：2007-06-15
申请人： Brian Joseph Greene , Chun-Yung Sung , Clement Wann , Robert Chi-Foon Wong , Ying Zhang
发明人： Brian Joseph Greene , Chun-Yung Sung , Clement Wann , Robert Chi-Foon Wong , Ying Zhang
IPC分类号： G11C11/00
CPC分类号： G11C11/412
摘要： An SRAM having asymmetrical FET pass gates and a method of fabricating an SRAM having asymmetrical FET pass gates. The pass gates are asymmetrical with respect to current conduction from the drain to the source of the pass gate being different from current conduction from the source to the drain of the pass gate.
摘要翻译：具有不对称FET通孔的SRAM和制造具有不对称FET通孔的SRAM的方法。相对于从栅极的漏极到源极的电流传导，通路门不对称，不同于从通过栅极的源极到漏极的电流传导。

22. 发明申请

US20080310212A1 SRAM WITH ASYMMETRICAL PASS GATES 失效
标题翻译：带不对称门的SRAM
公开(公告)号：US20080310212A1
公开(公告)日：2008-12-18
申请号：US11763555
申请日：2007-06-15
申请人： Brian Joseph Greene , Chun-Yung Sung , Clement Wann , Robert Chi-Foon Wong , Ying Zhang
发明人： Brian Joseph Greene , Chun-Yung Sung , Clement Wann , Robert Chi-Foon Wong , Ying Zhang
IPC分类号： G11C11/40
CPC分类号： G11C11/412
摘要： An SRAM having asymmetrical FET pass gates and a method of fabricating an SRAM having asymmetrical FET pass gates. The pass gates are asymmetrical with respect to current conduction from the drain to the source of the pass gate being different from current conduction from the source to the drain of the pass gate.
摘要翻译：具有不对称FET通孔的SRAM和制造具有不对称FET通孔的SRAM的方法。相对于从栅极的漏极到源极的电流传导，通路门不对称，不同于从通过栅极的源极到漏极的电流传导。

23. 发明申请

US20080274597A1 METHOD AND STRUCTURE TO REDUCE CONTACT RESISTANCE ON THIN SILICON-ON-INSULATOR DEVICE 有权
公开(公告)号：US20080274597A1
公开(公告)日：2008-11-06
申请号：US12174683
申请日：2008-07-17
申请人： Brian J. Greene , Louis Lu-Chen Hsu , Jack Allan Mandelman , Chun-Yung Sung
发明人： Brian J. Greene , Louis Lu-Chen Hsu , Jack Allan Mandelman , Chun-Yung Sung
IPC分类号： H01L21/336
CPC分类号： H01L29/458 , H01L29/66628 , H01L29/66772
摘要： A method (and system) of reducing contact resistance on a silicon-on-insulator device, including controlling a silicide depth in a source-drain region of the device.

24. 发明申请

US20080026520A1 Semiconductor Method and Device with Mixed Orientation Substrate 有权
标题翻译：具有混合取向基板的半导体方法和器件
公开(公告)号：US20080026520A1
公开(公告)日：2008-01-31
申请号：US11868001
申请日：2007-10-05
申请人： Jiang Yan , Chun-Yung Sung , Danny Shum , Alois Gutmann
发明人： Jiang Yan , Chun-Yung Sung , Danny Shum , Alois Gutmann
IPC分类号： H01L21/336
CPC分类号： H01L27/1203 , H01L21/76232 , H01L21/76283 , H01L21/823807 , H01L21/823878 , H01L21/84 , H01L27/1207 , H01L29/045 , H01L29/78687
摘要： In a method of forming a semiconductor device, a wafer includes a first semiconductor region of a first crystal orientation and a second semiconductor region of a second crystal orientation. Insulating material is formed over the wafer. A first portion of the insulating material is removed to expose the first semiconductor region and a second portion of the insulating material is removed to expose the second semiconductor region. Semiconductor material of the first crystal orientation is epitaxially grown over the exposed first semiconductor region and semiconductor material of the second crystal orientation is epitaxially grown over the exposed second semiconductor region
摘要翻译：在形成半导体器件的方法中，晶片包括第一晶体取向的第一半导体区域和第二晶体取向的第二半导体区域。在晶片上形成绝缘材料。除去绝缘材料的第一部分以暴露第一半导体区域，并且去除绝缘材料的第二部分以暴露第二半导体区域。在暴露的第一半导体区域上外延生长第一晶体取向的半导体材料，并且在暴露的第二半导体区域上外延生长第二晶体取向的半导体材料

25. 发明授权

US07298009B2 Semiconductor method and device with mixed orientation substrate 有权
标题翻译：具有混合取向衬底的半导体方法和器件
公开(公告)号：US07298009B2
公开(公告)日：2007-11-20
申请号：US11047928
申请日：2005-02-01
申请人： Jiang Yan , Chun-Yung Sung , Danny Pak-Chum Shum , Alois Gutmann
发明人： Jiang Yan , Chun-Yung Sung , Danny Pak-Chum Shum , Alois Gutmann
IPC分类号： H01L27/12
CPC分类号： H01L27/1203 , H01L21/76232 , H01L21/76283 , H01L21/823807 , H01L21/823878 , H01L21/84 , H01L27/1207 , H01L29/045 , H01L29/78687
摘要： A semiconductor device includes a semiconductor body having semiconductor material of a first crystal orientation. A first transistor is formed in the semiconductor material of the first crystal orientation. An insulating layer overlies portions of the semiconductor body and a semiconductor layer overlies the insulating layer. The semiconductor layer has a second crystal orientation. A second transistor is formed in the semiconductor layer having the second crystal orientation. In the preferred embodiment, the semiconductor body is (100) silicon, the first transistor is an NMOS transistor, the semiconductor layer is (110) silicon and the second transistor is a PMOS transistor.
摘要翻译：半导体器件包括具有第一晶体取向的半导体材料的半导体本体。在第一晶体取向的半导体材料中形成第一晶体管。绝缘层覆盖半导体本体的部分，并且半导体层覆盖绝缘层。半导体层具有第二晶体取向。在具有第二晶体取向的半导体层中形成第二晶体管。在优选实施例中，半导体本体是（100）硅，第一晶体管是NMOS晶体管，半导体层是（110）硅，第二晶体管是PMOS晶体管。

26. 发明授权

US06964908B2 Metal-insulator-metal capacitor and method of fabricating same 失效
标题翻译：金属绝缘体金属电容器及其制造方法
公开(公告)号：US06964908B2
公开(公告)日：2005-11-15
申请号：US10643307
申请日：2003-08-19
申请人： Louis L. Hsu , Rajiv V. Joshi , Chun-Yung Sung
发明人： Louis L. Hsu , Rajiv V. Joshi , Chun-Yung Sung
IPC分类号： H01L21/02 , H01L21/768 , H01L23/522 , H01L21/28 , H01L21/308
CPC分类号： H01G4/228 , H01G4/33 , H01L21/768 , H01L23/5223 , H01L28/60 , H01L2924/0002 , Y10S438/957 , H01L2924/00
摘要： A metal-insulator-metal (MIM) capacitor including a metal layer, an insulating layer formed on the metal layer, at least a first opening and at least a second opening formed in the first insulating layer, a dielectric layer formed in the first opening, a conductive material deposited in the first and second openings, and a first metal plate formed over the first opening and a second metal plate formed over the second opening. A method for fabricating the MIM capacitor, includes forming the first metal layer, forming the insulating layer on the first metal layer, forming at least the first opening and at least the second opening in the first insulating layer, depositing a mask over the second opening, forming the dielectric layer in the first opening, removing the mask, depositing the conductive material in the first and second openings, and depositing a second metal layer over the first and second openings. MIM capacitors and methods of fabricating same are described, wherein the MIM capacitors are formed simultaneously with the BEOL interconnect and large density MIM capacitors are fabricated at low cost.
摘要翻译：一种金属绝缘体金属（MIM）电容器，包括金属层，形成在金属层上的绝缘层，至少第一开口和形成在第一绝缘层中的至少第二开口，形成在第一开口中的电介质层沉积在第一和第二开口中的导电材料和形成在第一开口上的第一金属板和形成在第二开口上的第二金属板。一种制造MIM电容器的方法，包括形成第一金属层，在第一金属层上形成绝缘层，至少形成第一开口和至少第一绝缘层中的第二开口，在第二开口上沉积掩模在第一开口中形成电介质层，去除掩模，在第一和第二开口中沉积导电材料，并在第一和第二开口上沉积第二金属层。描述MIM电容器及其制造方法，其中MIM电容器与BEOL互连同时形成，并且以低成本制造大密度MIM电容器。

27. 发明申请

US20050133846A1 Deep trench capacitor with buried plate electrode and isolation collar 有权
标题翻译：深沟槽电容器，埋置电极和隔离环
公开(公告)号：US20050133846A1
公开(公告)日：2005-06-23
申请号：US10741203
申请日：2003-12-19
申请人： Thomas Dyer , Chun-Yung Sung , Ravikumar Ramachandran , Ramachandra Divakaruni
发明人： Thomas Dyer , Chun-Yung Sung , Ravikumar Ramachandran , Ramachandra Divakaruni
IPC分类号： H01L21/8242 , H01L29/94 , H01L27/108 , H01L31/119
CPC分类号： H01L27/1087 , H01L29/945
摘要： A deep trench capacitor used in a trench DRAM includes a buried plate and an isolation collar. The deep trench is bottle-shaped, and the isolation collar is formed in upper portion of the wider region of the bottle-shaped trench. The buried plate surrounds the lower portion of the wider part of the bottle-shaped trench, and hemispherical grain polysilicon lines the walls of at least the lower portion of the wider part of the trench. A nitride liner layer lines the inner walls of the oxide collar and prevents diffusion of dopant through the oxide collar into the substrate when the HSG polysilicon and the doped buried plate are formed. The buried plate region is self-aligned to the isolation collar. The depth of the top of the wider part of the bottle shape and the bottom depth of the isolation collar are determined by successive resist deposition and recessing steps.
摘要翻译：在沟槽DRAM中使用的深沟槽电容器包括掩埋板和隔离环。深沟是瓶形的，并且隔离套环形成在瓶形沟槽的较宽区域的上部。掩埋板围绕瓶形沟槽的较宽部分的下部，半球状晶粒多晶硅线路至少沟槽较宽部分的下部的壁。当形成HSG多晶硅和掺杂掩埋板时，氮化物衬垫层线化氧化物环的内壁并防止掺杂剂通过氧化物环到衬底中的扩散。掩埋板区域与隔离套环自对准。通过连续的抗蚀剂沉积和凹陷步骤确定瓶子形状的较宽部分的顶部的深度和隔离环的底部深度。

28. 发明授权

US08610617B1 Graphene based structures and methods for broadband electromagnetic radiation absorption at the microwave and terahertz frequencies 有权
标题翻译：基于石墨烯的结构和方法，用于在微波和太赫兹频率处的宽带电磁辐射吸收
公开(公告)号：US08610617B1
公开(公告)日：2013-12-17
申请号：US13530725
申请日：2012-06-22
申请人： Phaedon Avouris , Alberto V. Garcia , Chun-Yung Sung , Fengnian Xia , Hugen Yan
发明人： Phaedon Avouris , Alberto V. Garcia , Chun-Yung Sung , Fengnian Xia , Hugen Yan
IPC分类号： H01Q17/00
CPC分类号： H01Q17/00
摘要： Structures and methods for cloaking an object to electromagnetic radiation at the microwave and terahertz frequencies include disposing a plurality of graphene sheets about the object. Intermediate layers of a transparent dielectric material can be disposed between graphene sheets to optimize the performance. In other embodiments, the graphene can be formulated into a paint formulation or a fabric and applied to the object. The structures and methods absorb at least a portion of the electromagnetic radiation at the microwave and terabyte frequencies.
摘要翻译：将物体掩盖在微波和太赫兹频率处的电磁辐射的结构和方法包括在物体周围设置多个石墨烯片。可以在石墨烯片之间设置透明介电材料的中间层以优化性能。在其它实施方案中，石墨烯可以配制成涂料配方或织物并施加到物体上。该结构和方法以微波和太字节频率吸收至少一部分电磁辐射。

29. 发明申请

US20130309402A1 INTERDIGITATED SUBSTRATE SUPPORT ASSEMBLY FOR SYNTHESIS OF LARGE AREA THIN FILMS 有权
标题翻译：用于合成大面积薄膜的互连衬底支撑组件
公开(公告)号：US20130309402A1
公开(公告)日：2013-11-21
申请号：US13475167
申请日：2012-05-18
申请人： Xuesong Li , Yu-Ming Lin , Chun-Yung Sung
发明人： Xuesong Li , Yu-Ming Lin , Chun-Yung Sung
IPC分类号： C23C16/458 , C23C16/34 , C23C16/26 , B82Y30/00
CPC分类号： C23C16/26 , B82Y30/00 , C01B32/186 , C23C16/342 , C23C16/458 , C23C16/545
摘要： The invention provides methods and apparatus for supporting a substrate in a chemical vapor deposition reactor, and methods and apparatus for synthesizing large area thin films. The invention provides a substrate support assembly comprising at least two interdigitable substrate support fixtures, each fixture carrying at least one finger-like formation for engaging and positioning the substrate during the deposition process that creates the thin film. When two such fixtures are interdigitated, the substrate may be positioned not only in between and around the finger-like substrate engagement members, but also on the outside of each fixture, thus achieving a many-fold increase in the effective width of the substrate.
摘要翻译：本发明提供了用于在化学气相沉积反应器中支撑衬底的方法和装置，以及用于合成大面积薄膜的方法和装置。本发明提供了一种基板支撑组件，其包括至少两个相互交叉的基板支撑固定装置，每个固定装置承载至少一个指形结构，用于在沉积过程中接合和定位基板，从而产生薄膜。当两个这样的夹具相互交错时，衬底可以不仅位于指状衬底接合构件之间和周围，而且位于每个夹具的外侧上，从而实现衬底的有效宽度的多倍增加。

30. 发明申请

US20130015375A1 GENERATION OF TERAHERTZ ELECTROMAGNETIC WAVES IN GRAPHENE BY COHERENT PHOTON-MIXING 有权
标题翻译：通过相干光子混合在石墨中生成TERAHERTZ电磁波
公开(公告)号：US20130015375A1
公开(公告)日：2013-01-17
申请号：US13182621
申请日：2011-07-14
申请人： PHAEDON AVOURIS , Chun-Yung Sung , Alberto Valdes Garcia , Fengnian Xia
发明人： PHAEDON AVOURIS , Chun-Yung Sung , Alberto Valdes Garcia , Fengnian Xia
IPC分类号： H01L33/58 , B82Y20/00
CPC分类号： G02B6/10 , B82Y20/00 , G02F1/353 , G02F1/3551 , G02F2202/36 , G02F2203/13
摘要： An electromagnetic device and method for fabrication includes a substrate and a layer of graphene formed on the substrate. A metallization layer is patterned on the graphene. The metallization layer forms electrodes such that when the graphene is excited by light, terahertz frequency radiation is generated.
摘要翻译：一种用于制造的电磁装置和方法包括在衬底上形成的衬底和石墨烯层。在石墨烯上图案化金属化层。金属化层形成电极，使得当石墨烯被光激发时，产生太赫兹频率辐射。

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