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21. 发明授权

US06757886B2 Alternating phase shift mask design with optimized phase shapes 有权
标题翻译：交替相移掩模设计，具有优化的相位形状
公开(公告)号：US06757886B2
公开(公告)日：2004-06-29
申请号：US10014707
申请日：2001-11-13
申请人： Lars W. Liebmann , Carlos A. Fonseca , Ioana Graur , Mark A. Lavin
发明人： Lars W. Liebmann , Carlos A. Fonseca , Ioana Graur , Mark A. Lavin
IPC分类号： G06F1750
CPC分类号： G03F1/30
摘要： A method is described for designing an alternating phase shifted mask (altPSM) by optimally selecting the width of phase shapes. The selection of optimal phase shape widths is achieved by providing a lithography metric that describes the relationship between phase shape width and the target image dimension such that the metric, such as process window or across chip linewidth variation (ACLV), is optimized. In a preferred embodiment, ACLV is computed by Monte Carlo simulation by providing a set of error distributions for lithographic parameters such as focus, dose, lens aberrations, and the like. Alternatively, a lookup table of optimal phase widths associated with target image dimensions may be provided. The resulting altPSM is characterized by phase shapes having widths that vary according to the widths of the target image dimensions.
摘要翻译：描述了通过最佳地选择相位宽度的宽度来设计交替相移掩模（altPSM）的方法。通过提供描绘相位形状宽度和目标图像尺寸之间的关系的光刻度量来实现最佳相位形状宽度的选择，使得诸如处理窗口或跨芯片线宽变化（ACLV）的度量被优化。在优选实施例中，通过提供一组用于光刻参数（例如焦点，剂量，透镜像差等）的误差分布，通过蒙特卡罗模拟计算ACLV。或者，可以提供与目标图像尺寸相关联的最佳相位宽度的查找表。所得到的altPSM的特征在于具有根据目标图像尺寸的宽度而变化的宽度的相位形状。

22. 发明授权

US08219943B2 Physical design system and method 有权
标题翻译：物理设计系统及方法
公开(公告)号：US08219943B2
公开(公告)日：2012-07-10
申请号：US12425603
申请日：2009-04-17
申请人： John M Cohn , James A. Culp , Ulrich A. Finkler , Fook-Luen Heng , Mark A. Lavin , Jin Fuw Lee , Lars W. Liebmann , Gregory A. Northrop , Nakgeuon Seong , Rama N. Singh , Leon Stok , Pieter J. Woeltgens
发明人： John M Cohn , James A. Culp , Ulrich A. Finkler , Fook-Luen Heng , Mark A. Lavin , Jin Fuw Lee , Lars W. Liebmann , Gregory A. Northrop , Nakgeuon Seong , Rama N. Singh , Leon Stok , Pieter J. Woeltgens
IPC分类号： G06F17/50 , G06F19/00 , G03F1/00 , G21K5/00
CPC分类号： G06F17/5081 , G06F17/5009 , G06F17/5072
摘要： A design system for designing complex integrated circuits (ICs), a method of IC design and program product therefor. A layout unit receives a circuit description representing portions in a grid and glyph format. A checking unit checks grid and glyph portions of the design. An elaboration unit generates a target layout from the checked design. A data prep unit prepares the target layout for mask making. A pattern caching unit selectively replaces portions of the design with previously cached results for improved design efficiency.
摘要翻译：一种用于设计复杂集成电路（IC）的设计系统，一种IC设计方法和程序产品。布局单元接收表示网格和字形格式的部分的电路描述。检查单元检查设计的网格和字形部分。精心设计单元从检查的设计生成目标布局。数据准备单元准备掩模制作的目标布局。模式高速缓存单元用先前缓存的结果有选择地替换设计的部分，以提高设计效率。

23. 发明申请

US20090204930A1 IPHYSICAL DESIGN SYSTEM AND METHOD 有权
标题翻译：物理设计系统与方法
公开(公告)号：US20090204930A1
公开(公告)日：2009-08-13
申请号：US12425603
申请日：2009-04-17
申请人： John M. Cohn , James A. Culp , Ulrich A. Finkler , Fook-Luen Heng , Mark A. Lavin , Jin Fuw Lee , Lars W. Liebmann , Gregory A. Northrop , Nakgeuon Seong , Rama N. Singh , Leon Stok , Pieter J. Woltgens
发明人： John M. Cohn , James A. Culp , Ulrich A. Finkler , Fook-Luen Heng , Mark A. Lavin , Jin Fuw Lee , Lars W. Liebmann , Gregory A. Northrop , Nakgeuon Seong , Rama N. Singh , Leon Stok , Pieter J. Woltgens
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/5009 , G06F17/5072
摘要： A design system for designing complex integrated circuits (ICs), a method of IC design and program product therefor. A layout unit receives a circuit description representing portions in a grid and glyph format. A checking unit checks grid and glyph portions of the design. An elaboration unit generates a target layout from the checked design. A data prep unit prepares the target layout for mask making. A pattern caching unit selectively replaces portions of the design with previously cached results for improved design efficiency.
摘要翻译：一种用于设计复杂集成电路（IC）的设计系统，一种IC设计方法和程序产品。布局单元接收表示网格和字形格式的部分的电路描述。检查单元检查设计的网格和字形部分。精心设计单元从检查的设计生成目标布局。数据准备单元准备掩模制作的目标布局。模式高速缓存单元用先前缓存的结果有选择地替换设计的部分，以提高设计效率。

24. 发明授权

US5671152A Efficient generation of negative fill shapes for chips and packages 失效
标题翻译：为芯片和封装提供有效的负填充形状
公开(公告)号：US5671152A
公开(公告)日：1997-09-23
申请号：US444471
申请日：1995-05-19
申请人： Mark A. Lavin , Lars W. Liebmann
发明人： Mark A. Lavin , Lars W. Liebmann
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F2217/12 , Y02P90/265
摘要： An efficient method for modifying a chip or package design allows for the creation of small shapes without excessive expansion of design data. A computer program takes a physical design, represented in a computer data file, and generates a modified version of the design in which fill holes have been added. Subsequently, when the modified design is processed, the resulting semiconductor chip or package will contain physical images of the added fill holes, with the effect of making local pattern density more uniform and hence reducing process-induced variations in feature size and shape.
摘要翻译：修改芯片或封装设计的有效方法允许创建小形状而不会过度扩展设计数据。计算机程序采用计算机数据文件中的物理设计，并生成其中添加了填充孔的设计的修改版本。随后，当改进的设计被处理时，所得到的半导体芯片或封装将包含所添加的填充孔的物理图像，具有使局部图案密度更均匀并因此减少特征尺寸和形状的工艺引起的变化的效果。

25. 发明授权

US06338922B1 Optimized alternating phase shifted mask design 失效
标题翻译：优化交替相移掩模设计
公开(公告)号：US06338922B1
公开(公告)日：2002-01-15
申请号：US09566885
申请日：2000-05-08
申请人： Lars W. Liebmann , Alfred K. Wong
发明人： Lars W. Liebmann , Alfred K. Wong
IPC分类号： G03F900
CPC分类号： G03F7/70425 , G03F1/30
摘要： A method for reducing lens aberrations sensitivity and proximity effects of alternating phase shifted masks is described. The critical features of a chip design layout are first identified. Multiple, narrow phase regions and auxiliary phase transitions, which provide additional opaque features, are then formed alongside the critical features such that a grating pattern of substantially uniform pitch is printed. Together with a complementary trim mask, the circuit pattern so delineated has reduced sensitivity to lens aberrations and proximity effects.
摘要翻译：描述了用于减少交替相移掩模的透镜像差灵敏度和邻近效应的方法。首先确定了芯片设计布局的关键特征。然后，在临界特征旁边形成提供附加的不透明特征的多个窄相位区域和辅助相位转变，使得印刷基本均匀的间距的光栅图案。与互补的修剪掩模一起，如此描绘的电路图案降低了对透镜像差和邻近效应的敏感性。

26. 发明授权

US5932377A Exact transmission balanced alternating phase-shifting mask for photolithography 失效
标题翻译：用于光刻的精确传输平衡交替移相掩模
公开(公告)号：US5932377A
公开(公告)日：1999-08-03
申请号：US28833
申请日：1998-02-24
申请人： Richard A. Ferguson , Lars W. Liebmann , Scott M. Mansfield , David S. O'Grady , Alfred K. Wong
发明人： Richard A. Ferguson , Lars W. Liebmann , Scott M. Mansfield , David S. O'Grady , Alfred K. Wong
IPC分类号： G03F1/30 , G03F9/00
CPC分类号： G03F1/30
摘要： A two-step method for eliminating transmission errors in alternating phase-shifting masks is described. Initially, the design data is selectively biased to provide a coarse reduction in the inherent transmission error between features of different phase, size, shape, and/or location. During fabrication of the mask with the modified data, residual transmission errors are then eliminated via the positioning of the edges of the etched-quartz trenches which define the phase of a given feature to a set location beneath the opaque chrome film. Application of feedback, in which the aerial image of the mask is monitored during the positioning of the etched-quartz edges, provides additional and precise control of the residual transmission error.
摘要翻译：描述了用于消除交替移相掩模中的传输误差的两步法。最初，设计数据被选择性地偏置以提供不同相位，大小，形状和/或位置的特征之间的固有传输误差的粗略减小。在具有修改数据的掩模制造期间，通过将限定给定特征的相位的蚀刻石英沟槽的边缘定位到不透明铬膜下方的设定位置，残留透射误差被消除。在蚀刻石英边缘的定位期间监测掩模的空中图像的反馈的应用提供对残留传输误差的附加且精确的控制。

27. 发明授权

US06596442B1 Asymmetric halftone biasing for sub-grid pattern adjustment 失效
标题翻译：非对称半色调偏压用于子网格图案调整
公开(公告)号：US06596442B1
公开(公告)日：2003-07-22
申请号：US09533831
申请日：2000-03-23
申请人： Alfred K. Wong , Richard A. Ferguson , Lars W. Liebmann
发明人： Alfred K. Wong , Richard A. Ferguson , Lars W. Liebmann
IPC分类号： G03F900
CPC分类号： G03F1/36
摘要： A technique is described, based on concepts of halftone printing, for controlling feature dimensions in a printed image at increments smaller than the smallest addressable unit of the template used to produce that image. Accordingly, photomasks may be fabricated to yield images with sizes differing from a nominal width by increments which are small fractions of the minimum template size or pixel size. A template fabricated according to this technique includes a feature having one or more edges, and a first array and a second array of shapes (protrusions or indentations) disposed on the edges. The first and second arrays have respective segmentation periods; the first and second segmentation periods are different. Each array is formed of a plurality of identical shapes repeating at every corresponding segmentation period, each shape having a predetermined length and a predetermined width. The shapes (protrusions or indentations) in the first array and the second array may have different lengths, in addition to the two arrays having different segmentation periods; a line feature on a template will thus appear asymmetric with respect to both the length and period of the shapes along the edges of the feature.
摘要翻译：基于半色调打印的概念描述了一种技术，用于以小于用于生成该图像的模板的最小可寻址单位的增量来控制打印图像中的特征尺寸。因此，可以制造光掩模以产生具有与标称宽度不同的尺寸的图像，增量是最小模板尺寸或像素尺寸的小部分。根据该技术制造的模板包括具有一个或多个边缘的特征，以及设置在边缘上的第一阵列和第二阵列的形状（突起或凹陷）。第一和第二阵列具有各自的分割周期; 第一和第二分割周期是不同的。每个阵列由在每个相应的分割周期重复的多个相同形状形成，每个形状具有预定长度和预定宽度。除了具有不同分割周期的两个阵列之外，第一阵列和第二阵列中的形状（突起或凹痕）可以具有不同的长度; 因此，模板上的线特征将相对于沿着特征边缘的形状的长度和周期呈现不对称。

28. 发明授权

US06553559B2 Method to determine optical proximity correction and assist feature rules which account for variations in mask dimensions 有权
公开(公告)号：US06553559B2
公开(公告)日：2003-04-22
申请号：US09754910
申请日：2001-01-05
申请人： Lars W. Liebmann , Scott Mansfield , Alfred K. Wong
发明人： Lars W. Liebmann , Scott Mansfield , Alfred K. Wong
IPC分类号： G06F1750
CPC分类号： G03F1/36 , G03F7/70441
摘要： Optical proximity correction (OPC) and assist feature rules are generated using a process window (PW) analysis. A reference pitch is chosen and the mask bias is found that optimizes the process window. This can be done using standard process window analysis or through a weighted process window (WPW) analysis which accounts for focus and dose distributions that are expected in a real process. The WPW analysis gives not only the optimum mask bias, but also the center focus and dose conditions for the optimum process centering. A series of other pitches and mask biases are then analyzed by finding the common process window with the reference pitch. For the standard PW analysis, a common process window is found. For the WPW analysis, the WPW is computed at the center focus and dose conditions found for the reference pitch. If mask or lens errors are to be accounted for, then multiple structures can be included in the analysis. Once the common process windows for the mask features of interest have been computed, functional fits to the data can be found. Once the functional forms have been found for each of the OPC parameters, the rules table can be determined by solving for the spacings of interest in the design.

29. 发明授权

US06602728B1 Method for generating a proximity model based on proximity rules 失效
标题翻译：基于接近度规则生成邻近度模型的方法
公开(公告)号：US06602728B1
公开(公告)日：2003-08-05
申请号：US09754920
申请日：2001-01-05
申请人： Lars W. Liebmann , Scott Mansfield , Alfred K. Wong
发明人： Lars W. Liebmann , Scott Mansfield , Alfred K. Wong
IPC分类号： G01R3126
CPC分类号： G03F1/36 , G03F1/68 , G03F7/70441 , G03F7/705
摘要： A method for generating an optical proximity correction (OPC) model includes generating a set of correction rules for a wafer design containing at least one of lines and assist features, determining a set of corrections that need to be made over a range of sizes and spaces of the lines and assist features based on the set of correction rules, and creating an optical proximity correction model for correcting the wafer design based on the set of corrections.
摘要翻译：一种用于产生光学邻近校正（OPC）模型的方法包括为包含线和辅助特征中的至少一个的晶片设计生成一组校正规则，确定需要在一定范围的尺寸和空间上进行的一组校正基于该组校正规则的线和辅助特征，以及基于该校正集创建用于校正晶片设计的光学邻近校正模型。

30. 发明授权

US06795961B2 Priority coloring for VLSI designs 失效
标题翻译： VLSI设计的优先着色
公开(公告)号：US06795961B2
公开(公告)日：2004-09-21
申请号：US10430148
申请日：2003-05-06
申请人： Lars W. Liebmann , Carlos A. Fonseca , Ioana Graur , Young O. Kim
发明人： Lars W. Liebmann , Carlos A. Fonseca , Ioana Graur , Young O. Kim
IPC分类号： G06F1750
CPC分类号： G03F1/30
摘要： A method and computer program product is described for optimizing the design of a circuit layout that assigns binary properties to the design elements according to a hierarchy of rules. For example, the design of an alternating phase shifted mask (altPSM) is optimized first according to rules that assign phase shapes that maximize image quality for critical circuit elements, and then further optimized to minimize mask manufacturability problems without significantly increasing the complexity of the design process flow. Further optimization of the design according to additional rules can be performed in a sequentially decreasing priority order. As the priority of rules decrease, some violation of lower priority rules may be acceptable, as long as higher priority rules are not violated.
摘要翻译：描述了一种方法和计算机程序产品，用于优化根据规则层级将二进制属性分配给设计元素的电路布局的设计。例如，交替相移掩模（altPSM）的设计首先根据规定分配相位形状的规则进行优化，该相位形状使关键电路元件的图像质量最大化，然后进一步优化以最小化掩模可制造性问题，而不会显着增加设计的复杂性工艺流程。根据附加规则进一步优化设计可以按顺序降低的优先顺序执行。由于规则的优先级减少，只要优先级较高的规则不被侵犯，某些违反较低优先权规则就可以接受。

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